def __init__(self,x0,x1,o):
try:
(len(x0)!=1 or len(x1)!=1 or len(o)!=4)
except NotImplementedError:
print('Invalid Connections')
super(Decoder2x4,self).__init__([x0,x1,o])
input=[]
input.append(x0)
input.append(x1)
self.input=input
self.output=o
self.internalWiring = transport.wires(2)
self.components.append(Decoder1x2(x0, [self.internalWiring[0]]))
self.components.append(Decoder1x2(x1, [self.internalWiring[1]]))
self.components.append(gates.AndGate([self.internalWiring[0]],[self.internalWiring[1]],[o[0]]))
self.components.append(gates.AndGate([self.internalWiring[0]],x1, [o[1]]))
self.components.append(gates.AndGate(x0, [self.internalWiring[1]], [o[2]]))
self.components.append(gates.AndGate(x0,x1,[o[3]]))
def __init__(self, s, r, qqbar, c):
try:
(len(s) != 1 or len(r) != 1 or len(qqbar) != 2)
except NotImplementedError:
print('Invalid Connections')
super(SRFlipFlop, self).__init__([s, r, [qqbar[0]]])
input = []
input.append(s)
input.append(r)
input.append(c)
self.input = input
self.output = qqbar
self.internalWiring = transport.wires(2)
self.components.append(gates.AndGate(c, s, [self.internalWiring[0]]))
self.components.append(gates.AndGate(c, r, [self.internalWiring[1]]))
self.components.append(
gates.NorGate([self.internalWiring[0]], [qqbar[0]], [qqbar[1]]))
self.components.append(
gates.NorGate([self.internalWiring[1]], [qqbar[1]], [qqbar[0]]))
import sys
sys.path.insert(0, '../utils')
import ioManager
import new
sys.path.insert(0, '../connectors')
import transport
sys.path.insert(0, '../combinational')
import gates
inputA = transport.wires(1)
inputB = transport.wires(1)
inputC = transport.wires(1)
hWare = gates.AndGate(inputA, inputB, inputC)
ioHandler = ioManager.StringIO(hWare)
print((ioHandler.input('1', '1')))