Ejemplo n.º 1
0
    def __init__(self, pads, lasmim, clock50=None, external_clocking=None, fifo_depth=None):
        assert clock50 is not None or external_clocking is not None, "%r %r" % (clock50, external_clocking)
        pack_factor = lasmim.dw//bpp

        if hasattr(pads, "scl"):
            self.submodules.i2c = I2C(pads)

        g = DataFlowGraph()

        self.fi = FrameInitiator(lasmim.aw, pack_factor)

        intseq = misc.IntSequence(lasmim.aw, lasmim.aw)
        dma_out = AbstractActor(plumbing.Buffer)
        g.add_connection(self.fi, intseq, source_subr=self.fi.dma_subr())
        g.add_pipeline(intseq, AbstractActor(plumbing.Buffer), dma_lasmi.Reader(lasmim), dma_out)

        cast = structuring.Cast(lasmim.dw, pixel_layout(pack_factor), reverse_to=True)
        vtg = VTG(pack_factor)
        self.driver = Driver(pack_factor, pads, clock50, external_clocking, fifo_depth)

        g.add_connection(self.fi, vtg, source_subr=self.fi.timing_subr, sink_ep="timing")
        g.add_connection(dma_out, cast)
        g.add_connection(cast, vtg, sink_ep="pixels")
        g.add_connection(vtg, self.driver)
        self.submodules += CompositeActor(g)
Ejemplo n.º 2
0
    def __init__(self, pads, lasmim, external_clocking=None):
        pack_factor = lasmim.dw//bpp

        g = DataFlowGraph()

        self.fi = FrameInitiator(lasmim.aw, pack_factor)

        intseq = misc.IntSequence(lasmim.aw, lasmim.aw)
        dma_out = AbstractActor(plumbing.Buffer)
        g.add_connection(self.fi, intseq, source_subr=self.fi.dma_subr())
        g.add_pipeline(intseq, AbstractActor(plumbing.Buffer), dma_lasmi.Reader(lasmim), dma_out)

        cast = structuring.Cast(lasmim.dw, pixel_layout(pack_factor), reverse_to=True)
        vtg = VTG(pack_factor)
        self.driver = Driver(pack_factor, pads, external_clocking)

        g.add_connection(self.fi, vtg, source_subr=self.fi.timing_subr, sink_ep="timing")
        g.add_connection(dma_out, cast)
        g.add_connection(cast, vtg, sink_ep="pixels")
        g.add_connection(vtg, self.driver)
        self.submodules += CompositeActor(g)
Ejemplo n.º 3
0
    def __init__(self, pads, lasmim, external_clocking=None):
        pack_factor = lasmim.dw//bpp

        if hasattr(pads, "scl"):
            self.submodules.i2c = I2C(pads)

        g = DataFlowGraph()

        self.fi = FrameInitiator(lasmim.aw, pack_factor)

        intseq = misc.IntSequence(lasmim.aw, lasmim.aw)
        dma_out = AbstractActor(plumbing.Buffer)
        g.add_connection(self.fi, intseq, source_subr=self.fi.dma_subr())
        g.add_pipeline(intseq, AbstractActor(plumbing.Buffer), dma_lasmi.Reader(lasmim), dma_out)

        cast = structuring.Cast(lasmim.dw, pixel_layout(pack_factor), reverse_to=True)
        vtg = VTG(pack_factor)
        self.driver = Driver(pack_factor, pads, external_clocking)

        g.add_connection(self.fi, vtg, source_subr=self.fi.timing_subr, sink_ep="timing")
        g.add_connection(dma_out, cast)
        g.add_connection(cast, vtg, sink_ep="pixels")
        g.add_connection(vtg, self.driver)
        self.submodules += CompositeActor(g)