def __createbranch(self, address, opcode, target):
res = ia32.setOpcode(ia32.new(), opcode)
res = ia32.setRelativeAddress(address, res, target)
res = ia32.promoteBranch(res, 4)
return res
def __createbranch(self, address, opcode, target):
res = ia32.setOpcode( ia32.new(), opcode )
res = ia32.setRelativeAddress(address, res, target)
res = ia32.promoteBranch(res, 4)
return res
self = instrument.instruction(mm)
#address = 0x00402f64
#address = 0x00401f0d
address = int(sys.argv[2], 16)
self[address] = '\xcc\xcc\xcc\xcc\xcc'
self.commit()
print self
print self.loaded
print self.committed
if False:
import ia32, struct
instruction = ia32.setOpcode(
ia32.setImmediate(ia32.new(), '\x00\x00\x00\x00'), '\xe9')
sourceaddress, targetaddress = 0x7c36364f, 0x261000d
sourceaddress = 0x1000
targetaddress = 0x0000
x = setBranch(sourceaddress, instruction, targetaddress)
print repr(x)
#.text:7C36364F 8B C3 mov eax, ebx ; hook point 1
### things needed for rewrite. why doesn't this shit work for all cases (???)
## stuff to add to the ia32 module
# a generic way for promoting a branch from 16-bit to 32-bit
# a generic way for creating a type of branch
self = instrument.instruction(mm)
#address = 0x00402f64
#address = 0x00401f0d
address = int(sys.argv[2],16)
self[address] = '\xcc\xcc\xcc\xcc\xcc'
self.commit()
print self
print self.loaded
print self.committed
if False:
import ia32,struct
instruction = ia32.setOpcode(ia32.setImmediate(ia32.new(), '\x00\x00\x00\x00'), '\xe9')
sourceaddress,targetaddress = 0x7c36364f,0x261000d
sourceaddress = 0x1000
targetaddress = 0x0000
x = setBranch(sourceaddress, instruction, targetaddress)
print repr(x)
#.text:7C36364F 8B C3 mov eax, ebx ; hook point 1
### things needed for rewrite. why doesn't this shit work for all cases (???)
## stuff to add to the ia32 module
# a generic way for promoting a branch from 16-bit to 32-bit
# a generic way for creating a type of branch
