def detect_TXRX(num_devices, device_info, tx_bitfile_id, rx_bitfile_id):
print "\nFinding TX abd RX devices..."
for i in range(0, num_devices):
with comm.Controller(device_info[i]) as device:
device.hs_set_bit_mode(comm.HS_BIT_MODE_MPSSE)
device.hs_fpga_toggle_reset()
id = device.hs_fpga_read_data_at_address(
ID_REG) # Read FPGA ID register
if (id == tx_bitfile_id):
print " Tx board detected. Device ID: ", id
txdevice_index = i
elif (id == rx_bitfile_id):
print " Rx board detected. Device ID: ", id
rxdevice_index = i
else:
print " Board not detected"
return txdevice_index, rxdevice_index
def ltc2145_dc1620(NUM_SAMPLES, verbose=True, do_demo=True, trigger=False, timeout=1):
def vprint(s):
"""Print string only if verbose is on"""
if verbose:
print s
if(do_demo):
# Plot data to screen
plot_data = True
#Write data out to a text file
write_to_file = True
NUM_ADC_SAMPLES = NUM_SAMPLES * 2 # Total number of samples to collect
SAMPLE_BYTES = 2
EEPROM_ID_SIZE = 50
# set TEST_DATA_REG to one of these constants
DATA_REAL = 0x00
DATA_ALL_ZEROS = 0x08
DATA_ALL_ONES = 0x18
DATA_CHECKERBOARD = 0x28
DATA_ALTERNATING = 0x38
TEST_DATA_REG = DATA_REAL
num_devices = 0
descriptions = ['DC890 FastDAACS CNTLR']
vprint("Devices found:")
device_info = [None] * 2
for info in comm.list_controllers(comm.TYPE_DC890):
if info.get_description() in descriptions:
device_info[num_devices] = info
vprint(device_info)
num_devices = num_devices + 1
#break
vprint( "No: of devices = " + str(num_devices))
if device_info is None:
raise(comm.HardwareError('Could not find a compatible device'))
vprint("Device Info 1: " + str(device_info[0]))
vprint("Device Info 2: " + str(device_info[1]))
controller0 = comm.Controller(device_info[0])
controller1 = comm.Controller(device_info[1])
controller0.dc890_gpio_set_byte(0xF8)
controller0.dc890_gpio_spi_set_bits(3, 0, 1)
controller1.dc890_gpio_set_byte(0xF8)
controller1.dc890_gpio_spi_set_bits(3, 0, 1)
vprint('Configuring SPI registers')
if TEST_DATA_REG == DATA_REAL:
vprint('Set to read real data')
else:
vprint('Set to generate test data')
vprint('Configuring SPI registers...')
controller0.spi_send_byte_at_address(0x00, 0x80)
controller0.spi_send_byte_at_address(0x01, 0x00)
# Set address 0x02 to a value of 0x01 to enable DCS (useful if clock is not 50% Duty Cycle)
controller0.spi_send_byte_at_address(0x02, 0x01) # DCS on
controller0.spi_send_byte_at_address(0x03, 0x71) #
controller0.spi_send_byte_at_address(0x04, TEST_DATA_REG)
controller1.spi_send_byte_at_address(0x00, 0x80)
controller1.spi_send_byte_at_address(0x01, 0x00)
# Set address 0x02 to a value of 0x01 to enable DCS (useful if clock is not 50% Duty Cycle)
controller1.spi_send_byte_at_address(0x02, 0x01) # DCS on
controller1.spi_send_byte_at_address(0x03, 0x71) #
controller1.spi_send_byte_at_address(0x04, TEST_DATA_REG)
# Open communication to the demo board
vprint("Configuring board 0...")
# with comm.Controller(device_info[0]) as controller:
if not controller0.fpga_get_is_loaded("DLVDS"):
vprint('Loading FPGA')
controller0.fpga_load_file("DLVDS")
else:
vprint('FPGA already loaded')
if verbose:
print 'Starting data collect'
controller0.data_set_high_byte_first()
controller0.data_set_characteristics(True, SAMPLE_BYTES, True)
vprint("Configuring board 1...")
# with comm.Controller(device_info[1]) as controller:
if not controller1.fpga_get_is_loaded("DLVDS"):
vprint('Loading FPGA')
controller1.fpga_load_file("DLVDS")
else:
vprint('FPGA already loaded')
if verbose:
print 'Starting data collect'
controller1.data_set_high_byte_first()
controller1.data_set_characteristics(True, SAMPLE_BYTES, True)
if(trigger == True):
vprint("Starting capture when trigger received...")
controller0.data_start_collect(NUM_ADC_SAMPLES, comm.TRIGGER_START_POSITIVE_EDGE)
controller1.data_start_collect(NUM_ADC_SAMPLES, comm.TRIGGER_START_POSITIVE_EDGE)
for i in range(timeout):
is_done = controller0.data_is_collect_done()
if is_done:
break
sleep(1.0)
vprint("Waiting up to " + str(timeout) + " seconds... " + str(i))
if is_done:
vprint("Board 0 done!")
sleep(1.0) # Wait one extra second for board 1 to complete...
is_done = controller1.data_is_collect_done()
if is_done:
vprint("Board 1 done!")
else:
vprint("No trigger, capturing immediately...")
controller0.data_start_collect(NUM_ADC_SAMPLES, comm.TRIGGER_NONE)
controller1.data_start_collect(NUM_ADC_SAMPLES, comm.TRIGGER_NONE)
for i in range(10): # First check board 0
is_done = controller0.data_is_collect_done()
if is_done:
break
sleep(0.2)
for i in range(10): # Board 1 should be the same, but just in case...
is_done = controller1.data_is_collect_done()
if is_done:
break
if not is_done:
controller0.data_cancel_collect()
controller1.data_cancel_collect()
raise comm.HardwareError('Data collect timed out (missing clock?)')
vprint("Reading out data from board 0...")
controller0.dc890_flush()
vprint('Reading data from board 0')
num_bytes, data0 = controller0.data_receive_uint16_values(end=NUM_ADC_SAMPLES)
vprint('Data read done')
controller1.dc890_flush()
vprint('Reading data from board 1')
num_bytes, data1 = controller1.data_receive_uint16_values(end=NUM_ADC_SAMPLES)
vprint('Data read done')
controller0.close()
controller1.close()
# Data array mapping:
# data[0] = board 0, ch1
# data[1] = board 0, ch2
# data[2] = board 1, ch1
# data[3] = board 1, ch2
data = [[0 for i in range(NUM_ADC_SAMPLES/2)] for j in range(4)]
for i in range(NUM_ADC_SAMPLES/2):
data[0][i] = data0[2*i]& 0xFFFF
data[1][i] = data0[2*i + 1]& 0xFFFF
data[2][i] = data1[2*i]& 0xFFFF
data[3][i] = data1[2*i + 1]& 0xFFFF
# write the data to a file
if write_to_file == True:
vprint('Writing data to file')
with open('data.txt', 'w') as f:
for i in range(NUM_ADC_SAMPLES/2):
f.write(str(data[0][i]) + "," + str(data[1][i]) + ',' +
str(data[2][i]) + "," + str(data[3][i])+ '\n')
vprint('File write done.')
vprint('All finished!')
# Plot data if not running pattern check
if(plot_data == True):
from matplotlib import pyplot as plt
plt.figure(1)
plt.subplot(411)
plt.plot(data[0])
plt.title('Board 0, CH1')
plt.subplot(412)
plt.plot(data[1])
plt.title('Board 0, CH2')
plt.subplot(413)
plt.plot(data[2])
plt.title('Board 1, CH1')
plt.subplot(414)
plt.plot(data[3])
plt.title('Board 1, CH2')
plt.show()
# Plotting frequency domain removed for the time being...
return data
def ltc2175_dc1525(num_samples, verbose=False, do_demo=False):
def vprint(s):
"""Print string only if verbose is on"""
if verbose:
print s
if do_demo:
plot_data = True
write_to_file = True
else:
plot_data = False
write_to_file = False
NUM_ADC_SAMPLES = num_samples
TOTAL_ADC_SAMPLES = 4 * NUM_ADC_SAMPLES # Four channel part
# change this to collect real or test pattern data
use_test_data = False
# change this to set the output when using the test pattern
test_data_value = 0x2AAA
# find demo board with correct ID
expected_eeprom_id = '[0074 DEMO 10 DC1525A-A LTC2175-14 D2175\r\n' + \
'ADC 14 14 4 0000 00 00 00 00\r\n' + \
'DBFLG 0003 29 00 00 00\r\n' + \
'FPGA S2175 T2\r\n' + \
'80CB]'
controller_info = None
print 'Looking for a DC1371 with a DC1525A-X demoboard'
for info in comm.list_controllers(comm.TYPE_DC1371):
with comm.Controller(info) as controller:
found_eeprom_id = controller.eeprom_read_string(len(expected_eeprom_id))
if 'DC1525' in found_eeprom_id:
if verbose:
print 'Found a DC1525A-x demoboard'
controller_info = info
break
if controller_info is None:
raise(comm.HardwareError('Could not find a compatible device'))
# Open communication to the demo board
with comm.Controller(controller_info) as controller:
vprint('Configuring SPI registers')
if use_test_data:
vprint( 'Set to generate test data')
reg3 = 0x80 | ((test_data_value >> 8) & 0x3F)
reg4 = test_data_value & 0xFF
else:
vprint('Set to read real data')
reg3 = 0x00
reg4 = 0x00
controller.spi_send_byte_at_address(0x00, 0x80)
controller.spi_send_byte_at_address(0x01, 0x00)
controller.spi_send_byte_at_address(0x02, 0x00)
controller.spi_send_byte_at_address(0x03, reg3)
controller.spi_send_byte_at_address(0x04, reg4)
if not controller.fpga_get_is_loaded("S2175"):
vprint('Loading FPGA')
controller.fpga_load_file("S2175")
vprint('FPGA already loaded')
# demo-board specific information needed by the DC1371
controller.dc1371_set_demo_config(0x29000000)
vprint('Starting data collect')
controller.data_start_collect(TOTAL_ADC_SAMPLES, comm.TRIGGER_NONE)
for i in range(10):
is_done = controller.data_is_collect_done()
if is_done:
break
sleep(0.2)
if not is_done:
raise comm.HardwareError('Data collect timed out (missing clock?)')
vprint('Data collect done.')
vprint('Reading data')
num_bytes, data = controller.data_receive_uint16_values(end=TOTAL_ADC_SAMPLES)
vprint('Data read done')
# Split data into four channels
data_ch1 = [data[i] & 0x3FFF for i in range(0, TOTAL_ADC_SAMPLES, 4)]
data_ch2 = [data[i] & 0x3FFF for i in range(1, TOTAL_ADC_SAMPLES, 4)]
data_ch3 = [data[i] & 0x3FFF for i in range(2, TOTAL_ADC_SAMPLES, 4)]
data_ch4 = [data[i] & 0x3FFF for i in range(3, TOTAL_ADC_SAMPLES, 4)]
# write the data to a file
if write_to_file:
vprint('Writing data to file')
with open('data.txt', 'w') as f:
for i in range(NUM_ADC_SAMPLES):
f.write(str(data_ch1[i]) + "," + str(data_ch2[i]) + ","
+ str(data_ch3[i]) + "," + str(data_ch4[i]) + '\n')
vprint('File write done.')
vprint('All finished!')
# Plot data if requested
if plot_data:
from matplotlib import pyplot as plt
import numpy as np
plt.figure(1)
plt.subplot(411)
plt.plot(data_ch1)
plt.title('CH1 Time Domain')
plt.subplot(412)
plt.title('CH2 Time Domain')
plt.plot(data_ch2)
plt.subplot(413)
plt.plot(data_ch3)
plt.title('CH3 Time Domain')
plt.subplot(414)
plt.title('CH4 Time Domain')
plt.plot(data_ch4)
plt.show()
adc_amplitude = 16384.0 / 2.0
windowscale = (NUM_ADC_SAMPLES) / sum(np.blackman(NUM_ADC_SAMPLES))
vprint("Window scaling factor: " + str(windowscale))
data_ch1_nodc = data_ch1 - np.average(data_ch1)
windowed_data_ch1 = data_ch1_nodc * np.blackman(NUM_ADC_SAMPLES) * windowscale # Apply Blackman window
freq_domain_ch1 = np.fft.fft(windowed_data_ch1)/(NUM_ADC_SAMPLES) # FFT
freq_domain_magnitude_ch1 = np.abs(freq_domain_ch1) # Extract magnitude
freq_domain_magnitude_db_ch1 = 20 * np.log10(freq_domain_magnitude_ch1/adc_amplitude)
data_ch2_nodc = data_ch2 - np.average(data_ch2)
windowed_data_ch2 = data_ch2_nodc * np.blackman(NUM_ADC_SAMPLES) * windowscale # Apply Blackman window
freq_domain_ch2 = np.fft.fft(windowed_data_ch2)/(NUM_ADC_SAMPLES) # FFT
freq_domain_magnitude_ch2 = np.abs(freq_domain_ch2) # Extract magnitude
freq_domain_magnitude_db_ch2 = 20 * np.log10(freq_domain_magnitude_ch2/adc_amplitude)
data_ch3_nodc = data_ch3 - np.average(data_ch3)
windowed_data_ch3 = data_ch3_nodc * np.blackman(NUM_ADC_SAMPLES) * windowscale # Apply Blackman window
freq_domain_ch3 = np.fft.fft(windowed_data_ch3)/(NUM_ADC_SAMPLES) # FFT
freq_domain_magnitude_ch3 = np.abs(freq_domain_ch3) # Extract magnitude
freq_domain_magnitude_db_ch3 = 20 * np.log10(freq_domain_magnitude_ch3/adc_amplitude)
data_ch4_nodc = data_ch4 - np.average(data_ch4)
windowed_data_ch4 = data_ch4_nodc * np.blackman(NUM_ADC_SAMPLES) * windowscale # Apply Blackman window
freq_domain_ch4 = np.fft.fft(windowed_data_ch4)/(NUM_ADC_SAMPLES) # FFT
freq_domain_magnitude_ch4 = np.abs(freq_domain_ch4) # Extract magnitude
freq_domain_magnitude_db_ch4 = 20 * np.log10(freq_domain_magnitude_ch4/adc_amplitude)
plt.figure(2)
plt.subplot(411)
plt.title('CH1 FFT')
plt.plot(freq_domain_magnitude_db_ch1)
plt.subplot(412)
plt.title('CH2 FFT')
plt.plot(freq_domain_magnitude_db_ch2)
plt.subplot(413)
plt.title('CH3 FFT')
plt.plot(freq_domain_magnitude_db_ch3)
plt.subplot(414)
plt.title('CH4 FFT')
plt.plot(freq_domain_magnitude_db_ch4)
plt.show()
return data_ch1, data_ch2, data_ch3, data_ch4
'LTC UFO Board', 'LTC Communication Interface', 'LTC2000 Demoboard',
'LTC2000, DC2085A-A'
]
num_devices, device_info = find_devices(descriptions)
#######################################################################
# Configuration Flow Step 1, 2: Configure TX's and Rx's FTDI MPSSE mode
#######################################################################
txdevice_index, rxdevice_index = detect_TXRX(num_devices, device_info,
tx_bitfile_id, rx_bitfile_id)
####################################################################################
# Configuration Flow Step 3: Check TX FPGA board system an reference clock available
####################################################################################
print "\nChecking TX FPGA system and reference clock..."
check_reference_clock(comm.Controller(device_info[txdevice_index]),
TX_CLOCK_STATUS_REG)
print "\nChecking RX FPGA system and reference clock..."
check_reference_clock(comm.Controller(device_info[rxdevice_index]),
RX_CLOCK_STATUS_REG)
######################################################################
# Configuration Flow Step 7: TX FPGA Reset
# Configuration Flow Step 8: RX FPGA Reset and release
# Configuration Flow Step 9: Check RX reference clock and board system
######################################################################
print "\nResetting TX..."
reset_fpga(comm.Controller(device_info[txdevice_index]), do_reset)
print "Resetting RX..."
reset_fpga(comm.Controller(device_info[rxdevice_index]), do_reset)
print "\nChecking RX FPGA system and reference clock..."
print "No: of devices = ", num_devices
if device_info is None:
raise (comm.HardwareError('Could not find a compatible device'))
print "Device Info 1: ", device_info[0]
print "Device Info 2: ", device_info[1]
###############################################
# Configuration Flow Step 0: Turn on TX/RX
# reference and device clock 312.5 MHz
################################################
for i in range(0, num_devices):
with comm.Controller(device_info[i]) as device:
###############################################
# Configuration Flow Step 1, 2: Configure TX's
# and Rx's FTDI MPSSE mode
################################################
device.hs_set_bit_mode(comm.HS_BIT_MODE_MPSSE)
if do_reset:
device.hs_fpga_toggle_reset()
id = device.hs_fpga_read_data_at_address(
ID_REG) # Read FPGA ID register
print "Device ID: ", id
if (id == tx_bitfile_id):
print "Tx board detected"
txdevice_index = i
elif (id == rx_bitfile_id):
print "Rx board detected"
def ltc2323_dc1996(NUM_SAMPLES,
verbose=True,
do_demo=True,
trigger=False,
timeout=1):
def vprint(s):
"""Print string only if verbose is on"""
if verbose:
print s
NUM_ADC_SAMPLES = NUM_SAMPLES * 2 # Total number of samples to collect
SAMPLE_BYTES = 2
EEPROM_ID_SIZE = 50
# # find demo board with correct ID
# device_info = None
# print 'Looking for a DC890 with a DC1996-X demoboard'
# for info in comm.list_controllers(comm.TYPE_DC890):
# with comm.Controller(info) as device:
# eeprom_id = device.eeprom_read_string(EEPROM_ID_SIZE)
# if 'DC1996' in eeprom_id:
# if verbose:
# print 'Found a DC1996-X demoboard'
# device_info = info
# break
#
# if device_info is None:
# raise(comm.HardwareError('Could not find a compatible device'))
num_devices = 0
descriptions = ['DC890 FastDAACS CNTLR']
print "Devices found:"
device_info = [None] * 2
for info in comm.list_controllers(comm.TYPE_DC890):
if info.get_description() in descriptions:
device_info[num_devices] = info
print device_info
num_devices = num_devices + 1
#break
print "No: of devices = ", num_devices
if device_info is None:
raise (comm.HardwareError('Could not find a compatible device'))
print "Device Info 1: ", device_info[0]
print "Device Info 2: ", device_info[1]
controller0 = comm.Controller(device_info[0])
controller1 = comm.Controller(device_info[1])
# Open communication to the demo board
vprint("Configuring board 0...")
# with comm.Controller(device_info[0]) as controller:
if not controller0.fpga_get_is_loaded("CMOS"):
if verbose:
print 'Loading FPGA'
controller0.fpga_load_file("CMOS")
elif verbose:
print 'FPGA already loaded'
if verbose:
print 'Starting data collect'
controller0.data_set_high_byte_first()
controller0.data_set_characteristics(True, SAMPLE_BYTES, True)
vprint("Configuring board 1...")
# with comm.Controller(device_info[1]) as controller:
if not controller1.fpga_get_is_loaded("CMOS"):
if verbose:
print 'Loading FPGA'
controller1.fpga_load_file("CMOS")
elif verbose:
print 'FPGA already loaded'
if verbose:
print 'Starting data collect'
controller1.data_set_high_byte_first()
controller1.data_set_characteristics(True, SAMPLE_BYTES, True)
if (trigger == True):
print("Starting capture when trigger received...")
controller0.data_start_collect(NUM_ADC_SAMPLES,
comm.TRIGGER_START_POSITIVE_EDGE)
controller1.data_start_collect(NUM_ADC_SAMPLES,
comm.TRIGGER_START_POSITIVE_EDGE)
for i in range(timeout):
is_done = controller0.data_is_collect_done()
if is_done:
break
sleep(1.0)
print("Waiting up to " + str(timeout) + " seconds... " + str(i))
if is_done:
print("Board 0 done!")
sleep(1.0) # Wait one extra second for board 1 to complete...
is_done = controller1.data_is_collect_done()
if is_done:
print("Board 1 done!")
else:
print("No trigger, capturing immediately...")
controller0.data_start_collect(NUM_ADC_SAMPLES, comm.TRIGGER_NONE)
controller1.data_start_collect(NUM_ADC_SAMPLES, comm.TRIGGER_NONE)
for i in range(10): # First check board 0
is_done = controller0.data_is_collect_done()
if is_done:
break
sleep(0.2)
for i in range(10): # Board 1 should be the same, but just in case...
is_done = controller1.data_is_collect_done()
if is_done:
break
sleep(0.2)
if not is_done:
controller0.data_cancel_collect()
controller1.data_cancel_collect()
raise comm.HardwareError('Data collect timed out (missing clock?)')
vprint("Reading out data from board 0...")
controller0.dc890_flush()
if verbose:
print 'Reading data'
num_bytes, data0 = controller0.data_receive_uint16_values(
end=NUM_ADC_SAMPLES)
if verbose:
print 'Data read done'
controller1.dc890_flush()
if verbose:
print 'Reading data'
num_bytes, data1 = controller1.data_receive_uint16_values(
end=NUM_ADC_SAMPLES)
if verbose:
print 'Data read done'
controller0.close()
controller1.close()
# Split data into two channels
data_bd0_ch1 = [0] * (NUM_ADC_SAMPLES / 2)
data_bd0_ch2 = [0] * (NUM_ADC_SAMPLES / 2)
data_bd1_ch1 = [0] * (NUM_ADC_SAMPLES / 2)
data_bd1_ch2 = [0] * (NUM_ADC_SAMPLES / 2)
for i in range(NUM_ADC_SAMPLES / 2):
data_bd0_ch1[i] = data0[2 * i] & 0xFFFF
data_bd0_ch2[i] = data0[2 * i + 1] & 0xFFFF
data_bd1_ch1[i] = data1[2 * i] & 0xFFFF
data_bd1_ch2[i] = data1[2 * i + 1] & 0xFFFF
if (data_bd0_ch1[i] > 0x8000):
data_bd0_ch1[i] -= 0x10000
if (data_bd0_ch2[i] > 0x8000):
data_bd0_ch2[i] -= 0x10000
if (data_bd1_ch1[i] > 0x8000):
data_bd1_ch1[i] -= 0x10000
if (data_bd1_ch2[i] > 0x8000):
data_bd1_ch2[i] -= 0x10000
# write the data to a file
if write_to_file == True:
if verbose:
print 'Writing data to file'
with open('data.txt', 'w') as f:
for i in range(NUM_ADC_SAMPLES / 2):
f.write(
str(data_bd0_ch1[i]) + "," + str(data_bd0_ch2[i]) + ',' +
str(data_bd1_ch1[i]) + "," + str(data_bd1_ch2[i]) + '\n')
vprint('File write done.')
vprint('All finished!')
# Plot data if not running pattern check
if (plot_data == True):
from matplotlib import pyplot as plt
plt.figure(1)
plt.subplot(411)
plt.plot(data_bd0_ch1)
plt.title('Board 0, CH1')
plt.subplot(412)
plt.plot(data_bd0_ch2)
plt.title('Board 0, CH2')
plt.subplot(413)
plt.plot(data_bd1_ch1)
plt.title('Board 1, CH1')
plt.subplot(414)
plt.plot(data_bd1_ch2)
plt.title('Board 1, CH2')
plt.show()
# import numpy as np
# adc_amplitude = 65536.0 / 2.0
#
# data_ch1 -= np.average(data_ch1)
# data_ch2 -= np.average(data_ch2)
#
# windowscale = (NUM_ADC_SAMPLES/2) / sum(np.blackman(NUM_ADC_SAMPLES/2))
# print("Window scaling factor: " + str(windowscale))
#
# windowed_data_ch1 = data_ch1 * np.blackman(NUM_ADC_SAMPLES/2) * windowscale # Apply Blackman window
# freq_domain_ch1 = np.fft.fft(windowed_data_ch1)/(NUM_ADC_SAMPLES/2) # FFT
# freq_domain_magnitude_ch1 = np.abs(freq_domain_ch1) # Extract magnitude
# freq_domain_magnitude_db_ch1 = 20 * np.log10(freq_domain_magnitude_ch1/adc_amplitude)
#
# windowed_data_ch2 = data_ch2 * np.blackman(NUM_ADC_SAMPLES/2) * windowscale # Apply Blackman window
# freq_domain_ch2 = np.fft.fft(windowed_data_ch2)/(NUM_ADC_SAMPLES/2) # FFT
# freq_domain_magnitude_ch2 = np.abs(freq_domain_ch2) # Extract magnitude
# freq_domain_magnitude_db_ch2 = 20 * np.log10(freq_domain_magnitude_ch2/adc_amplitude)
#
#
# plt.figure(2)
# plt.subplot(211)
# plt.title('CH0 FFT')
# plt.plot(freq_domain_magnitude_db_ch1)
# plt.subplot(212)
# plt.title('CH1 FFT')
# plt.plot(freq_domain_magnitude_db_ch2)
# plt.show()
return data_bd0_ch1, data_bd0_ch2, data_bd1_ch1, data_bd1_ch2
raise(comm.HardwareError('Could not find a compatible device'))
print "Device Info 1: ", device_info[0]
print "Device Info 2: ", device_info[1]
###############################################
# Configuration Flow Step 0: Turn on TX/RX
# reference and device clock 312.5 MHz
################################################
###############################################
# Configuration Flow Step 1, 2: Configure TX's
# and Rx's FTDI MPSSE mode
################################################
for i in range(0, num_devices):
with comm.Controller(device_info[i]) as device:
device.hs_set_bit_mode(comm.HS_BIT_MODE_MPSSE)
if do_reset:
device.hs_fpga_toggle_reset()
id = device.hs_fpga_read_data_at_address(ID_REG) # Read FPGA ID register
print "Device ID: ", id
if(id == tx_bitfile_id):
print "Tx board detected"
txdevice_index = i
elif(id == rx_bitfile_id):
print "Rx board detected"
rxdevice_index = i
else:
print "Board not detected"