from miasm.expression.expression import ExprMem, ExprInt, ExprId, ExprOp, ExprLoc
from miasm.core.bin_stream import bin_stream
import miasm.arch.mips32.regs as regs
import miasm.core.cpu as cpu
from miasm.core.asm_ast import AstInt, AstId, AstMem, AstOp
log = logging.getLogger("mips32dis")
console_handler = logging.StreamHandler()
console_handler.setFormatter(
logging.Formatter("[%(levelname)-8s]: %(message)s"))
log.addHandler(console_handler)
log.setLevel(logging.DEBUG)
gpregs = cpu.reg_info(regs.regs32_str, regs.regs32_expr)
LPARENTHESIS = Literal("(")
RPARENTHESIS = Literal(")")
def cb_deref(tokens):
if len(tokens) != 4:
raise NotImplementedError("TODO")
return AstMem(tokens[2] + tokens[0], 32)
def cb_deref_nooff(tokens):
if len(tokens) != 3:
raise NotImplementedError("TODO")
return AstMem(tokens[1], 32)
regs64_str = [
"RAX", "RCX", "RDX", "RBX", "RSP", "RBP", "RSI", "RDI", "R8", "R9", "R10",
"R11", "R12", "R13", "R14", "R15", "RIP"
]
regs64_expr = [ExprId(x, 64) for x in regs64_str]
regs_xmm_str = ["XMM%d" % i for i in range(16)]
regs_xmm_expr = [ExprId(x, 128) for x in regs_xmm_str]
regs_mm_str = ["MM%d" % i for i in range(16)]
regs_mm_expr = [ExprId(x, 64) for x in regs_mm_str]
regs_bnd_str = ["BND%d" % i for i in range(4)]
regs_bnd_expr = [ExprId(x, 128) for x in regs_bnd_str]
gpregs08 = reg_info(regs08_str, regs08_expr)
gpregs08_64 = reg_info(regs08_64_str, regs08_64_expr)
gpregs16 = reg_info(regs16_str, regs16_expr)
gpregs32 = reg_info(regs32_str, regs32_expr)
gpregs64 = reg_info(regs64_str, regs64_expr)
gpregs_xmm = reg_info(regs_xmm_str, regs_xmm_expr)
gpregs_mm = reg_info(regs_mm_str, regs_mm_expr)
gpregs_bnd = reg_info(regs_bnd_str, regs_bnd_expr)
r08_eax = reg_info([regs08_str[0]], [regs08_expr[0]])
r16_eax = reg_info([regs16_str[0]], [regs16_expr[0]])
r32_eax = reg_info([regs32_str[0]], [regs32_expr[0]])
r64_eax = reg_info([regs64_str[0]], [regs64_expr[0]])
r08_ecx = reg_info([regs08_str[1]], [regs08_expr[1]])
from miasm.expression.expression import ExprMem, ExprInt, ExprId, ExprOp, ExprLoc
from miasm.core.bin_stream import bin_stream
import miasm.arch.mips32.regs as regs
import miasm.core.cpu as cpu
from miasm.core.asm_ast import AstInt, AstId, AstMem, AstOp
log = logging.getLogger("mips32dis")
console_handler = logging.StreamHandler()
console_handler.setFormatter(logging.Formatter("%(levelname)-5s: %(message)s"))
log.addHandler(console_handler)
log.setLevel(logging.DEBUG)
gpregs = cpu.reg_info(regs.regs32_str, regs.regs32_expr)
LPARENTHESIS = Literal("(")
RPARENTHESIS = Literal(")")
def cb_deref(tokens):
if len(tokens) != 4:
raise NotImplementedError("TODO")
return AstMem(tokens[2] + tokens[0], 32)
def cb_deref_nooff(tokens):
if len(tokens) != 3:
raise NotImplementedError("TODO")
return AstMem(tokens[1], 32)
from builtins import range
from miasm.expression.expression import *
from miasm.core.cpu import reg_info
# GP
regs16_str = ["PC", "SP", "SR"] + ["R%d" % i for i in range(3, 16)]
regs16_expr = [ExprId(x, 16) for x in regs16_str]
exception_flags = ExprId('exception_flags', 32)
gpregs = reg_info(regs16_str, regs16_expr)
PC = regs16_expr[0]
SP = regs16_expr[1]
SR = regs16_expr[2]
R3 = regs16_expr[3]
R4 = regs16_expr[4]
R5 = regs16_expr[5]
R6 = regs16_expr[6]
R7 = regs16_expr[7]
R8 = regs16_expr[8]
R9 = regs16_expr[9]
R10 = regs16_expr[10]
R11 = regs16_expr[11]
R12 = regs16_expr[12]
R13 = regs16_expr[13]
R14 = regs16_expr[14]
R15 = regs16_expr[15]
regs64_str = ["RAX", "RCX", "RDX", "RBX", "RSP", "RBP", "RSI", "RDI",
"R8", "R9", "R10", "R11", "R12", "R13", "R14", "R15",
"RIP"]
regs64_expr = [ExprId(x, 64) for x in regs64_str]
regs_xmm_str = ["XMM%d" % i for i in range(16)]
regs_xmm_expr = [ExprId(x, 128) for x in regs_xmm_str]
regs_mm_str = ["MM%d" % i for i in range(16)]
regs_mm_expr = [ExprId(x, 64) for x in regs_mm_str]
regs_bnd_str = ["BND%d" % i for i in range(4)]
regs_bnd_expr = [ExprId(x, 128) for x in regs_bnd_str]
gpregs08 = reg_info(regs08_str, regs08_expr)
gpregs08_64 = reg_info(regs08_64_str, regs08_64_expr)
gpregs16 = reg_info(regs16_str, regs16_expr)
gpregs32 = reg_info(regs32_str, regs32_expr)
gpregs64 = reg_info(regs64_str, regs64_expr)
gpregs_xmm = reg_info(regs_xmm_str, regs_xmm_expr)
gpregs_mm = reg_info(regs_mm_str, regs_mm_expr)
gpregs_bnd = reg_info(regs_bnd_str, regs_bnd_expr)
r08_eax = reg_info([regs08_str[0]], [regs08_expr[0]])
r16_eax = reg_info([regs16_str[0]], [regs16_expr[0]])
r32_eax = reg_info([regs32_str[0]], [regs32_expr[0]])
r64_eax = reg_info([regs64_str[0]], [regs64_expr[0]])
r08_ecx = reg_info([regs08_str[1]], [regs08_expr[1]])
from builtins import range
from miasm.expression.expression import *
from miasm.core.cpu import reg_info
# GP
regs16_str = ["PC", "SP", "SR"] + ["R%d" % i for i in range(3, 16)]
regs16_expr = [ExprId(x, 16) for x in regs16_str]
exception_flags = ExprId('exception_flags', 32)
gpregs = reg_info(regs16_str, regs16_expr)
PC = regs16_expr[0]
SP = regs16_expr[1]
SR = regs16_expr[2]
R3 = regs16_expr[3]
R4 = regs16_expr[4]
R5 = regs16_expr[5]
R6 = regs16_expr[6]
R7 = regs16_expr[7]
R8 = regs16_expr[8]
R9 = regs16_expr[9]
R10 = regs16_expr[10]
R11 = regs16_expr[11]
R12 = regs16_expr[12]
R13 = regs16_expr[13]
R14 = regs16_expr[14]
R15 = regs16_expr[15]
PC_init = ExprId("PC_init", 16)
from builtins import range
from miasm.expression.expression import *
from miasm.core.cpu import reg_info, gen_reg
# GP
gpregs_str = ['R%d' % r for r in range(0x10)]
gpregs_expr = [ExprId(x, 32) for x in gpregs_str]
gpregs = reg_info(gpregs_str, gpregs_expr)
bgpregs_str = ['R%d_BANK' % r for r in range(0x8)]
bgpregs_expr = [ExprId(x, 32) for x in bgpregs_str]
bgpregs = reg_info(bgpregs_str, bgpregs_expr)
fregs_str = ['FR%d' % r for r in range(0x10)]
fregs_expr = [ExprId(x, 32) for x in fregs_str]
fregs = reg_info(fregs_str, fregs_expr)
dregs_str = ['DR%d' % r for r in range(0x8)]
dregs_expr = [ExprId(x, 32) for x in dregs_str]
dregs = reg_info(dregs_str, dregs_expr)
PC, reg_info_pc = gen_reg('PC')
PR, reg_info_pr = gen_reg('PR')
R0, reg_info_r0 = gen_reg('R0')
GBR, reg_info_gbr = gen_reg('GBR')
SR, reg_info_sr = gen_reg('SR')
VBR, reg_info_vbr = gen_reg('VBR')
SSR, reg_info_ssr = gen_reg('SSR')
SPC, reg_info_spc = gen_reg('SPC')
SGR, reg_info_sgr = gen_reg('SGR')
from builtins import range
from miasm.expression.expression import *
from miasm.core.cpu import reg_info, gen_reg
# GP
gpregs_str = ['R%d' % r for r in range(0x10)]
gpregs_expr = [ExprId(x, 32) for x in gpregs_str]
gpregs = reg_info(gpregs_str, gpregs_expr)
bgpregs_str = ['R%d_BANK' % r for r in range(0x8)]
bgpregs_expr = [ExprId(x, 32) for x in bgpregs_str]
bgpregs = reg_info(bgpregs_str, bgpregs_expr)
fregs_str = ['FR%d' % r for r in range(0x10)]
fregs_expr = [ExprId(x, 32) for x in fregs_str]
fregs = reg_info(fregs_str, fregs_expr)
dregs_str = ['DR%d' % r for r in range(0x8)]
dregs_expr = [ExprId(x, 32) for x in dregs_str]
dregs = reg_info(dregs_str, dregs_expr)
PC, reg_info_pc = gen_reg('PC')
PR, reg_info_pr = gen_reg('PR')
R0, reg_info_r0 = gen_reg('R0')
GBR, reg_info_gbr = gen_reg('GBR')
SR, reg_info_sr = gen_reg('SR')
VBR, reg_info_vbr = gen_reg('VBR')
SSR, reg_info_ssr = gen_reg('SSR')
SPC, reg_info_spc = gen_reg('SPC')
SGR, reg_info_sgr = gen_reg('SGR')
DBR, reg_info_dbr = gen_reg('DBR')