# See the License for the specific language governing permissions and
# limitations under the License.
# ============================================================================
"""CTCLoss op"""
from mindspore.ops.op_info_register import op_info_register, AiCPURegOp, DataType
ctcloss_op_info = AiCPURegOp("CTCLoss") \
.fusion_type("OPAQUE") \
.input(0, "inputs", "required") \
.input(1, "labels_indices", "required") \
.input(2, "labels_values", "required") \
.input(3, "sequence_length", "required") \
.output(0, "loss", "required") \
.output(1, "gradient", "required") \
.attr("preprocess_collapse_repeated", "bool") \
.attr("ctc_merge_repeated", "bool") \
.attr("ignore_longer_outputs_than_inputs", "bool") \
.dtype_format(DataType.F32_Default, DataType.I64_Default, DataType.I32_Default, DataType.I32_Default,
DataType.F32_Default, DataType.F32_Default) \
.dtype_format(DataType.F64_Default, DataType.I64_Default, DataType.I32_Default, DataType.I32_Default,
DataType.F64_Default, DataType.F64_Default) \
.dtype_format(DataType.F32_NCHW, DataType.I64_NCHW, DataType.I32_NCHW, DataType.I32_NCHW,
DataType.F32_NCHW, DataType.F32_NCHW) \
.dtype_format(DataType.F64_NCHW, DataType.I64_NCHW, DataType.I32_NCHW, DataType.I32_NCHW,
DataType.F64_NCHW, DataType.F64_NCHW) \
.get_op_info()
@op_info_register(ctcloss_op_info)
def _ctcloss_aicpu():
"""CTCLoss AiCPU register"""
return
reshape_op_info = AiCPURegOp("Reshape") \
.fusion_type("OPAQUE") \
.input(0, "x", "required") \
.output(0, "y", "required") \
.dtype_format(DataType.BOOL_Default, DataType.BOOL_Default) \
.dtype_format(DataType.I8_Default, DataType.I8_Default) \
.dtype_format(DataType.I16_Default, DataType.I16_Default) \
.dtype_format(DataType.I32_Default, DataType.I32_Default) \
.dtype_format(DataType.I64_Default, DataType.I64_Default) \
.dtype_format(DataType.U8_Default, DataType.U8_Default) \
.dtype_format(DataType.U16_Default, DataType.U16_Default) \
.dtype_format(DataType.U32_Default, DataType.U32_Default) \
.dtype_format(DataType.U64_Default, DataType.U64_Default) \
.dtype_format(DataType.F16_Default, DataType.F16_Default) \
.dtype_format(DataType.F32_Default, DataType.F32_Default) \
.dtype_format(DataType.F64_Default, DataType.F64_Default) \
.dtype_format(DataType.BOOL_NCHW, DataType.BOOL_NCHW) \
.dtype_format(DataType.I8_NCHW, DataType.I8_NCHW) \
.dtype_format(DataType.I16_NCHW, DataType.I16_NCHW) \
.dtype_format(DataType.I32_NCHW, DataType.I32_NCHW) \
.dtype_format(DataType.I64_NCHW, DataType.I64_NCHW) \
.dtype_format(DataType.U8_NCHW, DataType.U8_NCHW) \
.dtype_format(DataType.U16_NCHW, DataType.U16_NCHW) \
.dtype_format(DataType.U32_NCHW, DataType.U32_NCHW) \
.dtype_format(DataType.U64_NCHW, DataType.U64_NCHW) \
.dtype_format(DataType.F16_NCHW, DataType.F16_NCHW) \
.dtype_format(DataType.F32_NCHW, DataType.F32_NCHW) \
.dtype_format(DataType.F64_NCHW, DataType.F64_NCHW) \
.get_op_info()
# Copyright 2020 Huawei Technologies Co., Ltd
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
# ============================================================================
"""EndOfSequence op"""
from mindspore.ops.op_info_register import op_info_register, AiCPURegOp, DataType
end_of_sequence_op_info = AiCPURegOp("EndOfSequence") \
.fusion_type("OPAQUE") \
.input(0, "x", "required") \
.output(0, "y", "required") \
.dtype_format(DataType.U8_Default, DataType.U8_Default) \
.get_op_info()
@op_info_register(end_of_sequence_op_info)
def _end_of_sequence_aicpu():
"""EndOfSequence AiCPU register"""
return
# Copyright 2020 Huawei Technologies Co., Ltd
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
# ============================================================================
"""InitDataSetQueue op"""
from mindspore.ops.op_info_register import op_info_register, AiCPURegOp
init_data_set_queue_op_info = AiCPURegOp("InitData") \
.fusion_type("OPAQUE") \
.attr("queue_name", "str") \
.get_op_info()
@op_info_register(init_data_set_queue_op_info)
def _init_data_set_queue_aicpu():
"""InitDataSetQueue AiCPU register"""
return
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
# ============================================================================
"""RandomGamma op"""
from mindspore.ops.op_info_register import op_info_register, AiCPURegOp, DataType
gamma_op_info = AiCPURegOp("Gamma") \
.fusion_type("OPAQUE") \
.input(0, "shape", "required") \
.input(1, "alpha", "required") \
.input(2, "beta", "required") \
.output(0, "output", "required") \
.attr("seed", "int") \
.dtype_format(DataType.I32_Default, DataType.F32_Default, DataType.F32_Default, DataType.F32_Default) \
.dtype_format(DataType.I32_NCHW, DataType.F32_NCHW, DataType.F32_NCHW, DataType.F32_NCHW) \
.get_op_info()
@op_info_register(gamma_op_info)
def _gamma_aicpu():
"""RandomGamma AiCPU register"""
return
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
# ============================================================================
"""Dropout2D op"""
from mindspore.ops.op_info_register import op_info_register, AiCPURegOp, DataType
dropout2d_op_info = AiCPURegOp("Dropout2D") \
.fusion_type("OPAQUE") \
.input(0, "x", "required") \
.output(0, "y", "required") \
.output(1, "mask", "required") \
.attr("keep_prob", "float") \
.dtype_format(DataType.BOOL_Default, DataType.BOOL_Default, DataType.BOOL_Default) \
.dtype_format(DataType.I8_Default, DataType.I8_Default, DataType.BOOL_Default) \
.dtype_format(DataType.I16_Default, DataType.I16_Default, DataType.BOOL_Default) \
.dtype_format(DataType.I32_Default, DataType.I32_Default, DataType.BOOL_Default) \
.dtype_format(DataType.I64_Default, DataType.I64_Default, DataType.BOOL_Default) \
.dtype_format(DataType.U8_Default, DataType.U8_Default, DataType.BOOL_Default) \
.dtype_format(DataType.U16_Default, DataType.U16_Default, DataType.BOOL_Default) \
.dtype_format(DataType.U32_Default, DataType.U32_Default, DataType.BOOL_Default) \
.dtype_format(DataType.U64_Default, DataType.U64_Default, DataType.BOOL_Default) \
.dtype_format(DataType.F16_Default, DataType.F16_Default, DataType.BOOL_Default) \
.dtype_format(DataType.F32_Default, DataType.F32_Default, DataType.BOOL_Default) \
.dtype_format(DataType.F64_Default, DataType.F64_Default, DataType.BOOL_Default) \
.get_op_info()
@op_info_register(dropout2d_op_info)
def _dropout2d_aicpu():
"""Dropout2D AiCPU register"""
return
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
# ============================================================================
"""Unique op"""
from mindspore.ops.op_info_register import op_info_register, AiCPURegOp, DataType
unique_op_info = AiCPURegOp("Unique") \
.fusion_type("OPAQUE") \
.input(0, "x", "required") \
.output(0, "y", "required") \
.output(1, "idx", "required") \
.dtype_format(DataType.I32_Default, DataType.I32_Default, DataType.I32_Default) \
.dtype_format(DataType.I64_Default, DataType.I64_Default, DataType.I64_Default) \
.get_op_info()
@op_info_register(unique_op_info)
def _unique_aicpu():
"""Unique AiCPU register"""
return
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
# ============================================================================
"""NoRepeatNGram op"""
from mindspore.ops.op_info_register import op_info_register, AiCPURegOp, DataType
no_repeat_ngram_op_info = AiCPURegOp("NoRepeatNGram") \
.fusion_type("OPAQUE") \
.input(0, "state_seq", "required") \
.input(1, "log_probs", "required") \
.output(0, "out", "required") \
.attr("ngram_size", "int") \
.dtype_format(DataType.I32_Default, DataType.F16_Default, DataType.F16_Default) \
.dtype_format(DataType.I32_Default, DataType.F32_Default, DataType.F32_Default) \
.dtype_format(DataType.I32_Default, DataType.F64_Default, DataType.F64_Default) \
.get_op_info()
@op_info_register(no_repeat_ngram_op_info)
def _no_repeat_ngram_aicpu():
"""NoRepeatNGram AiCPU register"""
return
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
# ============================================================================
"""Flatten op"""
from mindspore.ops.op_info_register import op_info_register, AiCPURegOp, DataType
flatten_op_info = AiCPURegOp("Flatten") \
.fusion_type("OPAQUE") \
.input(0, "x", "required") \
.output(0, "y", "required") \
.dtype_format(DataType.I8_Default, DataType.I8_Default) \
.dtype_format(DataType.I16_Default, DataType.I16_Default) \
.dtype_format(DataType.I32_Default, DataType.I32_Default) \
.dtype_format(DataType.I64_Default, DataType.I64_Default) \
.dtype_format(DataType.U8_Default, DataType.U8_Default) \
.dtype_format(DataType.U16_Default, DataType.U16_Default) \
.dtype_format(DataType.U32_Default, DataType.U32_Default) \
.dtype_format(DataType.U64_Default, DataType.U64_Default) \
.dtype_format(DataType.F16_Default, DataType.F16_Default) \
.dtype_format(DataType.F32_Default, DataType.F32_Default) \
.get_op_info()
@op_info_register(flatten_op_info)
def _flatten_aicpu():
"""Flatten AiCPU register"""
return
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
# ============================================================================
"""Normal op"""
from mindspore.ops.op_info_register import op_info_register, AiCPURegOp, DataType
normal_op_info = AiCPURegOp("Normal") \
.fusion_type("OPAQUE") \
.input(0, "shape", "required") \
.input(1, "mean", "required") \
.input(2, "stddev", "required") \
.output(0, "y", "required") \
.attr("seed", "int") \
.dtype_format(DataType.I32_Default, DataType.F32_Default, DataType.F32_Default, DataType.F32_Default) \
.dtype_format(DataType.I32_NCHW, DataType.F32_NCHW, DataType.F32_NCHW, DataType.F32_NCHW) \
.get_op_info()
@op_info_register(normal_op_info)
def _normal_aicpu():
"""Normal AiCPU register"""
return
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
# ============================================================================
"""Padding op"""
from mindspore.ops.op_info_register import op_info_register, AiCPURegOp, DataType
padding_op_info = AiCPURegOp("Padding") \
.fusion_type("OPAQUE") \
.input(0, "x", "required") \
.output(0, "y", "required") \
.attr("pad_dim_size", "int") \
.dtype_format(DataType.I8_Default, DataType.I8_Default) \
.dtype_format(DataType.I16_Default, DataType.I16_Default) \
.dtype_format(DataType.I32_Default, DataType.I32_Default) \
.dtype_format(DataType.I64_Default, DataType.I64_Default) \
.dtype_format(DataType.U8_Default, DataType.U8_Default) \
.dtype_format(DataType.U16_Default, DataType.U16_Default) \
.dtype_format(DataType.U32_Default, DataType.U32_Default) \
.dtype_format(DataType.U64_Default, DataType.U64_Default) \
.dtype_format(DataType.F16_Default, DataType.F16_Default) \
.dtype_format(DataType.F32_Default, DataType.F32_Default) \
.dtype_format(DataType.F64_Default, DataType.F64_Default) \
.dtype_format(DataType.BOOL_Default, DataType.BOOL_Default) \
.get_op_info()
@op_info_register(padding_op_info)
def _padding_aicpu():
"""Padding AiCPU register"""
return
gather_grad_op_info = AiCPURegOp("GatherDGrad") \
.fusion_type("OPAQUE") \
.attr("dim", "int") \
.input(0, "index", "required") \
.input(1, "src", "required") \
.output(0, "output", "required") \
.dtype_format(DataType.I32_Default, DataType.I8_Default, DataType.I8_Default) \
.dtype_format(DataType.I32_Default, DataType.I16_Default, DataType.I16_Default) \
.dtype_format(DataType.I32_Default, DataType.I32_Default, DataType.I32_Default) \
.dtype_format(DataType.I32_Default, DataType.I64_Default, DataType.I64_Default) \
.dtype_format(DataType.I32_Default, DataType.U8_Default, DataType.U8_Default) \
.dtype_format(DataType.I32_Default, DataType.U16_Default, DataType.U16_Default) \
.dtype_format(DataType.I32_Default, DataType.U32_Default, DataType.U32_Default) \
.dtype_format(DataType.I32_Default, DataType.U64_Default, DataType.U64_Default) \
.dtype_format(DataType.I32_Default, DataType.F16_Default, DataType.F16_Default) \
.dtype_format(DataType.I32_Default, DataType.F32_Default, DataType.F32_Default) \
.dtype_format(DataType.I32_Default, DataType.F64_Default, DataType.F64_Default) \
.dtype_format(DataType.I32_Default, DataType.BOOL_Default, DataType.BOOL_Default) \
.dtype_format(DataType.I64_Default, DataType.I8_Default, DataType.I8_Default) \
.dtype_format(DataType.I64_Default, DataType.I16_Default, DataType.I16_Default) \
.dtype_format(DataType.I64_Default, DataType.I32_Default, DataType.I32_Default) \
.dtype_format(DataType.I64_Default, DataType.I64_Default, DataType.I64_Default) \
.dtype_format(DataType.I64_Default, DataType.U8_Default, DataType.U8_Default) \
.dtype_format(DataType.I64_Default, DataType.U16_Default, DataType.U16_Default) \
.dtype_format(DataType.I64_Default, DataType.U32_Default, DataType.U32_Default) \
.dtype_format(DataType.I64_Default, DataType.U64_Default, DataType.U64_Default) \
.dtype_format(DataType.I64_Default, DataType.F16_Default, DataType.F16_Default) \
.dtype_format(DataType.I64_Default, DataType.F32_Default, DataType.F32_Default) \
.dtype_format(DataType.I64_Default, DataType.F64_Default, DataType.F64_Default) \
.dtype_format(DataType.I64_Default, DataType.BOOL_Default, DataType.BOOL_Default) \
.get_op_info()
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
# ============================================================================
"""RandomLaplace op"""
from mindspore.ops.op_info_register import op_info_register, AiCPURegOp, DataType
laplace_op_info = AiCPURegOp("Laplace") \
.fusion_type("OPAQUE") \
.input(0, "shape", "required") \
.input(1, "mean", "required") \
.input(2, "lambda_param", "required") \
.output(0, "output", "required") \
.attr("seed", "int") \
.dtype_format(DataType.I32_Default, DataType.F32_Default, DataType.F32_Default, DataType.F32_Default) \
.dtype_format(DataType.I32_NCHW, DataType.F32_NCHW, DataType.F32_NCHW, DataType.F32_NCHW) \
.get_op_info()
@op_info_register(laplace_op_info)
def _laplace_aicpu():
"""RandomLaplace AiCPU register"""
return
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
# ============================================================================
"""RandomLaplace op"""
from mindspore.ops.op_info_register import op_info_register, AiCPURegOp, DataType
laplace_op_info = AiCPURegOp("StandardLaplace") \
.fusion_type("OPAQUE") \
.input(0, "shape", "required") \
.output(0, "output", "required") \
.attr("seed", "int") \
.attr("seed2", "int") \
.dtype_format(DataType.I32_Default, DataType.F32_Default) \
.get_op_info()
@op_info_register(laplace_op_info)
def _standard_laplace_aicpu():
"""RandomLaplace AiCPU register"""
return
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
# ============================================================================
"""CTCGreedyDecoder op"""
from mindspore.ops.op_info_register import op_info_register, AiCPURegOp, DataType
ctc_greedy_decoder_op_info = AiCPURegOp("CTCGreedyDecoder") \
.fusion_type("OPAQUE") \
.input(0, "inputs", "required") \
.input(1, "sequence_length", "required") \
.output(0, "decoded_indices", "required") \
.output(1, "decoded_values", "required") \
.output(2, "decoded_shape", "required") \
.output(3, "log_probability", "required") \
.dtype_format(DataType.F32_Default, DataType.I32_Default, DataType.I64_Default, DataType.I64_Default,
DataType.I64_Default, DataType.F32_Default) \
.dtype_format(DataType.F64_Default, DataType.I32_Default, DataType.I64_Default, DataType.I64_Default,
DataType.I64_Default, DataType.F64_Default) \
.get_op_info()
@op_info_register(ctc_greedy_decoder_op_info)
def _ctc_greedy_decoder_aicpu():
"""CTCGreedyDecoder AiCPU register"""
return
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
# ============================================================================
"""TopK op"""
from mindspore.ops.op_info_register import op_info_register, AiCPURegOp, DataType
top_k_op_info = AiCPURegOp("TopK") \
.fusion_type("OPAQUE") \
.attr("sorted", "bool")\
.input(0, "intput", "required") \
.input(1, "k", "required") \
.output(0, "values", "required") \
.output(1, "indices", "required") \
.dtype_format(DataType.F16_Default, DataType.I32_Default, DataType.F16_Default, DataType.I32_Default) \
.get_op_info()
@op_info_register(top_k_op_info)
def _top_k_aicpu():
"""TopK aicpu register"""
return
# See the License for the specific language governing permissions and
# limitations under the License.
# ============================================================================
"""ComputeAccidentalHits op"""
from mindspore.ops.op_info_register import op_info_register, AiCPURegOp, DataType
compute_accidental_hits_op_info = AiCPURegOp("ComputeAccidentalHits") \
.fusion_type("OPAQUE") \
.input(0, "true_classes", "required") \
.input(1, "sampled_candidates", "required") \
.output(0, "indices", "required") \
.output(1, "ids", "required") \
.output(2, "weights", "required") \
.attr("num_true", "int") \
.dtype_format(DataType.I32_Default, DataType.I32_Default, DataType.I32_Default,
DataType.I32_Default, DataType.F64_Default) \
.dtype_format(DataType.I32_Default, DataType.I32_Default, DataType.I32_Default,
DataType.I32_Default, DataType.F32_Default) \
.dtype_format(DataType.I32_Default, DataType.I32_Default, DataType.I32_Default,
DataType.I32_Default, DataType.F16_Default) \
.dtype_format(DataType.I64_Default, DataType.I64_Default, DataType.I64_Default,
DataType.I64_Default, DataType.F64_Default) \
.dtype_format(DataType.I64_Default, DataType.I64_Default, DataType.I64_Default,
DataType.I64_Default, DataType.F32_Default) \
.dtype_format(DataType.I64_Default, DataType.I64_Default, DataType.I64_Default,
DataType.I64_Default, DataType.F16_Default) \
.get_op_info()
@op_info_register(compute_accidental_hits_op_info)
def _compute_accidental_hits_aicpu():
"""ComputeAccidentalHits AiCPU register"""
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
# ============================================================================
"""RNNTLoss op"""
from mindspore.ops.op_info_register import op_info_register, AiCPURegOp, DataType
rnnt_loss_op_info = AiCPURegOp("RNNTLoss") \
.fusion_type("OPAQUE") \
.input(0, "acts", "required") \
.input(1, "labels", "required") \
.input(2, "input_lengths", "required") \
.input(3, "label_lengths", "required") \
.output(0, "costs", "required") \
.output(1, "grads", "required") \
.attr("blank_label", "int") \
.dtype_format(DataType.F32_Default, DataType.I32_Default, DataType.I32_Default, DataType.I32_Default,
DataType.F32_Default, DataType.F32_Default) \
.get_op_info()
@op_info_register(rnnt_loss_op_info)
def _rnnt_loss_aicpu():
"""RNNTLoss AiCPU register"""
return
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
# ============================================================================
"""UniformCandidateSampler op"""
from mindspore.ops.op_info_register import op_info_register, AiCPURegOp, DataType
uniform_candidate_sampler_op_info = AiCPURegOp("UniformCandidateSampler") \
.fusion_type("OPAQUE") \
.input(0, "true_classes", "required") \
.output(0, "sampled_candidates", "required") \
.output(1, "true_expected_count", "required") \
.output(2, "true_expected_count", "required") \
.attr("num_true", "int") \
.attr("num_sampled", "int") \
.attr("unique", "bool") \
.attr("range_max", "int") \
.attr("seed", "int") \
.dtype_format(DataType.I64_Default, DataType.I64_Default, DataType.F32_Default, DataType.F32_Default) \
.get_op_info()
@op_info_register(uniform_candidate_sampler_op_info)
def _uniform_candidate_sampler_aicpu():
"""UniformCandidateSampler AiCPU register"""
return
cache_swap_table_op_info = AiCPURegOp("CacheSwapTable") \
.fusion_type("OPAQUE") \
.input(0, "cache_table", "required") \
.input(1, "swap_cache_idx", "required") \
.input(2, "miss_value", "required") \
.output(0, "old_value", "required") \
.dtype_format(DataType.I8_Default, DataType.I32_Default, \
DataType.I8_Default, DataType.I8_Default) \
.dtype_format(DataType.I16_Default, DataType.I32_Default, \
DataType.I16_Default, DataType.I16_Default) \
.dtype_format(DataType.I32_Default, DataType.I32_Default, \
DataType.I32_Default, DataType.I32_Default) \
.dtype_format(DataType.I64_Default, DataType.I32_Default, \
DataType.I64_Default, DataType.I64_Default) \
.dtype_format(DataType.U8_Default, DataType.I32_Default, \
DataType.U8_Default, DataType.U8_Default) \
.dtype_format(DataType.U16_Default, DataType.I32_Default, \
DataType.U16_Default, DataType.U16_Default) \
.dtype_format(DataType.U32_Default, DataType.I32_Default, \
DataType.U32_Default, DataType.U32_Default) \
.dtype_format(DataType.U64_Default, DataType.I32_Default, \
DataType.U64_Default, DataType.U64_Default) \
.dtype_format(DataType.F16_Default, DataType.I32_Default, \
DataType.F16_Default, DataType.F16_Default) \
.dtype_format(DataType.F32_Default, DataType.I32_Default, \
DataType.F32_Default, DataType.F32_Default) \
.dtype_format(DataType.F64_Default, DataType.I32_Default, \
DataType.F64_Default, DataType.F64_Default) \
.dtype_format(DataType.BOOL_Default, DataType.I32_Default, \
DataType.BOOL_Default, DataType.BOOL_Default) \
.dtype_format(DataType.I8_Default, DataType.I64_Default, \
DataType.I8_Default, DataType.I8_Default) \
.dtype_format(DataType.I16_Default, DataType.I64_Default, \
DataType.I16_Default, DataType.I16_Default) \
.dtype_format(DataType.I32_Default, DataType.I64_Default, \
DataType.I32_Default, DataType.I32_Default) \
.dtype_format(DataType.I64_Default, DataType.I64_Default, \
DataType.I64_Default, DataType.I64_Default) \
.dtype_format(DataType.U8_Default, DataType.I64_Default, \
DataType.U8_Default, DataType.U8_Default) \
.dtype_format(DataType.U16_Default, DataType.I64_Default, \
DataType.U16_Default, DataType.U16_Default) \
.dtype_format(DataType.U32_Default, DataType.I64_Default, \
DataType.U32_Default, DataType.U32_Default) \
.dtype_format(DataType.U64_Default, DataType.I64_Default, \
DataType.U64_Default, DataType.U64_Default) \
.dtype_format(DataType.F16_Default, DataType.I64_Default, \
DataType.F16_Default, DataType.F16_Default) \
.dtype_format(DataType.F32_Default, DataType.I64_Default, \
DataType.F32_Default, DataType.F32_Default) \
.dtype_format(DataType.F64_Default, DataType.I64_Default, \
DataType.F64_Default, DataType.F64_Default) \
.dtype_format(DataType.BOOL_Default, DataType.I64_Default, \
DataType.BOOL_Default, DataType.BOOL_Default) \
.dtype_format(DataType.I8_Default, DataType.I64_Default, \
DataType.I8_Default, DataType.I8_Default) \
.dtype_format(DataType.I16_Default, DataType.I64_Default, \
DataType.I16_Default, DataType.I16_Default) \
.dtype_format(DataType.I32_Default, DataType.I64_Default, \
DataType.I32_Default, DataType.I32_Default) \
.dtype_format(DataType.I64_Default, DataType.I64_Default, \
DataType.I64_Default, DataType.I64_Default) \
.dtype_format(DataType.U8_Default, DataType.I64_Default, \
DataType.U8_Default, DataType.U8_Default) \
.dtype_format(DataType.U16_Default, DataType.I64_Default, \
DataType.U16_Default, DataType.U16_Default) \
.dtype_format(DataType.U32_Default, DataType.I64_Default, \
DataType.U32_Default, DataType.U32_Default) \
.dtype_format(DataType.U64_Default, DataType.I64_Default, \
DataType.U64_Default, DataType.U64_Default) \
.dtype_format(DataType.F16_Default, DataType.I64_Default, \
DataType.F16_Default, DataType.F16_Default) \
.dtype_format(DataType.F32_Default, DataType.I64_Default, \
DataType.F32_Default, DataType.F32_Default) \
.dtype_format(DataType.F64_Default, DataType.I64_Default, \
DataType.F64_Default, DataType.F64_Default) \
.dtype_format(DataType.BOOL_Default, DataType.I64_Default, \
DataType.BOOL_Default, DataType.BOOL_Default) \
.get_op_info()
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
# ============================================================================
"""FusedSparseProximalAdagrad op"""
from mindspore.ops.op_info_register import op_info_register, AiCPURegOp, DataType
fused_sparse_proximal_adagrad_op_info = AiCPURegOp("FusedSparseProximalAdagrad") \
.fusion_type("OPAQUE") \
.attr("use_locking", "bool") \
.input(0, "var", "required") \
.input(1, "accum", "required") \
.input(2, "lr", "required") \
.input(3, "l1", "required") \
.input(4, "l2", "required") \
.input(5, "grad", "required") \
.input(6, "indices", "required") \
.output(0, "var", "required") \
.output(1, "accum", "required") \
.dtype_format(DataType.F32_Default, DataType.F32_Default, DataType.F32_Default, DataType.F32_Default,
DataType.F32_Default, DataType.F32_Default, DataType.I32_Default, DataType.F32_Default,
DataType.F32_Default) \
.get_op_info()
@op_info_register(fused_sparse_proximal_adagrad_op_info)
def _fused_sparse_proximal_adagrad_aicpu():
"""FusedSparseProximalAdagrad aicpu register"""
return
"""RandomCategorical op"""
from mindspore.ops.op_info_register import op_info_register, AiCPURegOp, DataType
random_categorical_op_info = AiCPURegOp("RandomCategorical") \
.fusion_type("OPAQUE") \
.input(0, "logits", "required") \
.input(1, "num_sample", "required") \
.input(2, "seed", "required") \
.output(0, "output", "required") \
.dtype_format(DataType.F16_Default, DataType.I32_Default, DataType.I32_Default, DataType.I16_Default) \
.dtype_format(DataType.F32_Default, DataType.I32_Default, DataType.I32_Default, DataType.I16_Default) \
.dtype_format(DataType.F64_Default, DataType.I32_Default, DataType.I32_Default, DataType.I16_Default) \
.dtype_format(DataType.F16_Default, DataType.I32_Default, DataType.I32_Default, DataType.I32_Default) \
.dtype_format(DataType.F32_Default, DataType.I32_Default, DataType.I32_Default, DataType.I32_Default) \
.dtype_format(DataType.F64_Default, DataType.I32_Default, DataType.I32_Default, DataType.I32_Default) \
.dtype_format(DataType.F16_Default, DataType.I32_Default, DataType.I32_Default, DataType.I64_Default) \
.dtype_format(DataType.F32_Default, DataType.I32_Default, DataType.I32_Default, DataType.I64_Default) \
.dtype_format(DataType.F64_Default, DataType.I32_Default, DataType.I32_Default, DataType.I64_Default) \
.dtype_format(DataType.F16_Default, DataType.I64_Default, DataType.I64_Default, DataType.I16_Default) \
.dtype_format(DataType.F32_Default, DataType.I64_Default, DataType.I64_Default, DataType.I16_Default) \
.dtype_format(DataType.F64_Default, DataType.I64_Default, DataType.I64_Default, DataType.I16_Default) \
.dtype_format(DataType.F16_Default, DataType.I64_Default, DataType.I64_Default, DataType.I32_Default) \
.dtype_format(DataType.F32_Default, DataType.I64_Default, DataType.I64_Default, DataType.I32_Default) \
.dtype_format(DataType.F64_Default, DataType.I64_Default, DataType.I64_Default, DataType.I32_Default) \
.dtype_format(DataType.F16_Default, DataType.I64_Default, DataType.I64_Default, DataType.I64_Default) \
.dtype_format(DataType.F32_Default, DataType.I64_Default, DataType.I64_Default, DataType.I64_Default) \
.dtype_format(DataType.F64_Default, DataType.I64_Default, DataType.I64_Default, DataType.I64_Default) \
.get_op_info()
@op_info_register(random_categorical_op_info)
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
# ============================================================================
"""Stack op"""
from mindspore.ops.op_info_register import op_info_register, AiCPURegOp, DataType
stack_op_info = AiCPURegOp("Stack") \
.fusion_type("OPAQUE") \
.attr("axis", "int") \
.input(0, "x", "dynamic") \
.output(0, "y", "required") \
.dtype_format(DataType.I8_Default, DataType.I8_Default) \
.dtype_format(DataType.I16_Default, DataType.I16_Default) \
.dtype_format(DataType.I32_Default, DataType.I32_Default) \
.dtype_format(DataType.I64_Default, DataType.I64_Default) \
.dtype_format(DataType.U8_Default, DataType.U8_Default) \
.dtype_format(DataType.U16_Default, DataType.U16_Default) \
.dtype_format(DataType.U32_Default, DataType.U32_Default) \
.dtype_format(DataType.U64_Default, DataType.U64_Default) \
.dtype_format(DataType.F16_Default, DataType.F16_Default) \
.dtype_format(DataType.F32_Default, DataType.F32_Default) \
.dtype_format(DataType.F64_Default, DataType.F64_Default) \
.dtype_format(DataType.BOOL_Default, DataType.BOOL_Default) \
.get_op_info()
@op_info_register(stack_op_info)
def _stack_aicpu():
"""Stack AiCPU register"""
return
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
# ============================================================================
"""RandomChoiceWithMask op"""
from mindspore.ops.op_info_register import op_info_register, AiCPURegOp, DataType
random_choice_with_mask_op_info = AiCPURegOp("RandomChoiceWithMask") \
.fusion_type("OPAQUE") \
.input(0, "x", "required") \
.output(0, "y", "required") \
.output(1, "mask", "required") \
.attr("count", "int") \
.attr("seed", "int") \
.attr("seed2", "int") \
.dtype_format(DataType.BOOL_NCHW, DataType.I32_NCHW, DataType.BOOL_NCHW) \
.dtype_format(DataType.BOOL_Default, DataType.I32_Default, DataType.BOOL_Default) \
.get_op_info()
@op_info_register(random_choice_with_mask_op_info)
def _random_choice_with_mask_aicpu():
"""RandomChoiceWithMask AiCPU register"""
return
# See the License for the specific language governing permissions and
# limitations under the License.
# ============================================================================
"""StridedSliceGrad op"""
from mindspore.ops.op_info_register import op_info_register, AiCPURegOp, DataType
strided_slice_grad_op_info = AiCPURegOp("StridedSliceGradAICPU") \
.fusion_type("OPAQUE") \
.input(0, "dy", "required") \
.input(1, "shape", "required") \
.input(2, "begin", "required") \
.input(3, "end", "required") \
.input(4, "stride", "required") \
.output(0, "output", "required") \
.attr("begin_mask", "int") \
.attr("end_mask", "int") \
.attr("ellipsis_mask", "int") \
.attr("new_axis_mask", "int") \
.attr("shrink_axis_mask", "int") \
.dtype_format(DataType.F32_Default,
DataType.I32_Default,
DataType.I32_Default,
DataType.I32_Default,
DataType.I32_Default,
DataType.F32_Default) \
.get_op_info()
@op_info_register(strided_slice_grad_op_info)
def _strided_slice_grad_aicpu():
"""StridedSliceGrad AiCPU register"""
return
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
# ============================================================================
"""StackPush and StackPop op"""
from mindspore.ops.op_info_register import op_info_register, AiCPURegOp, DataType
stack_init_op_info = AiCPURegOp("StackInit") \
.fusion_type("OPAQUE") \
.attr("index", "int") \
.get_op_info()
stack_push_op_info = AiCPURegOp("StackPush") \
.fusion_type("OPAQUE") \
.input(0, "src", "required") \
.attr("index", "int") \
.dtype_format(DataType.U8_Default) \
.dtype_format(DataType.U16_Default) \
.dtype_format(DataType.U32_Default) \
.dtype_format(DataType.U64_Default) \
.dtype_format(DataType.I8_Default) \
.dtype_format(DataType.I16_Default) \
.dtype_format(DataType.I32_Default) \
.dtype_format(DataType.I64_Default) \
.dtype_format(DataType.F16_Default) \
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
# ============================================================================
"""TransData op"""
from mindspore.ops.op_info_register import op_info_register, AiCPURegOp, DataType
trans_data_op_info = AiCPURegOp("TransData") \
.fusion_type("OPAQUE") \
.input(0, "src", "required") \
.output(0, "dst", "required") \
.attr("src_format", "str") \
.attr("dst_format", "str") \
.dtype_format(DataType.U16_NCHW, DataType.U16_5HD) \
.dtype_format(DataType.U16_5HD, DataType.U16_NCHW) \
.dtype_format(DataType.U16_Default, DataType.U16_5HD) \
.dtype_format(DataType.U16_5HD, DataType.U16_Default) \
.get_op_info()
@op_info_register(trans_data_op_info)
def _trans_data_aicpu():
"""TransData aicpu register"""
return
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
# ============================================================================
"""PadAndShift op"""
from mindspore.ops.op_info_register import op_info_register, AiCPURegOp, DataType
pad_and_shift_op_info = AiCPURegOp("PadAndShift") \
.fusion_type("OPAQUE") \
.input(0, "x", "required") \
.input(1, "cum_sum_arr", "required") \
.input(2, "shift_idx", "required") \
.output(0, "output", "required") \
.dtype_format(DataType.I32_Default, DataType.I32_Default, DataType.I32_Default, DataType.I32_Default) \
.dtype_format(DataType.I64_Default, DataType.I64_Default, DataType.I64_Default, DataType.I64_Default) \
.get_op_info()
@op_info_register(pad_and_shift_op_info)
def _pad_and_shift_aicpu():
"""PadAndShift AiCPU register"""
return
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
# ============================================================================
"""RandomUniformInt op"""
from mindspore.ops.op_info_register import op_info_register, AiCPURegOp, DataType
uniform_int_op_info = AiCPURegOp("UniformInt") \
.fusion_type("OPAQUE") \
.input(0, "shape", "required") \
.input(1, "a", "required") \
.input(2, "b", "required") \
.output(0, "output", "required") \
.attr("seed", "int") \
.attr("seed2", "int") \
.dtype_format(DataType.I32_Default, DataType.I32_Default, DataType.I32_Default, DataType.I32_Default) \
.get_op_info()
@op_info_register(uniform_int_op_info)
def _uniform_int_aicpu():
"""RandomUniformInt AiCPU register"""
return
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
# ============================================================================
"""InitDataSetQueue op"""
from mindspore.ops.op_info_register import op_info_register, AiCPURegOp, DataType
get_next_op_info = AiCPURegOp("GetNext") \
.fusion_type("OPAQUE") \
.output(0, "y", "dynamic") \
.attr("shared_name", "str") \
.dtype_format(DataType.BOOL_Default) \
.dtype_format(DataType.I8_Default) \
.dtype_format(DataType.I16_Default) \
.dtype_format(DataType.I32_Default) \
.dtype_format(DataType.I64_Default) \
.dtype_format(DataType.F16_Default) \
.dtype_format(DataType.U8_Default) \
.dtype_format(DataType.U16_Default) \
.dtype_format(DataType.U32_Default) \
.dtype_format(DataType.U64_Default) \
.dtype_format(DataType.F32_Default) \
.get_op_info()
@op_info_register(get_next_op_info)
def _get_next_aicpu():
"""GetNext AiCPU register"""
return
