def main():
scb = Scoreboard("RemapCache")
test = scb.GetTest(f"test{RMC_CONF}")
st = Stacker(0,
callbacks=[
lambda mat: npd.savetxt("rmc_got.txt", mat[0], fmt="%d"),
test.Get
])
bg = BusGetter(callbacks=[st.Get])
wad_master = OneWire.Master(wad_dval_bus, wad_bus, ck_ev)
ra_master = TwoWire.Master(ra_rdy_bus, ra_ack_bus, ra_bus, ck_ev)
rd_slave = TwoWire.Slave(rd_rdy_bus,
rd_ack_bus,
rd_bus,
ck_ev,
callbacks=[bg.Get])
wad_data = wad_master.values
ra_data = ra_master.values
yield rst_out_ev
# start simulation
npd.copyto(cfg_bus.values.i_xor_srcs[0], xsrc)
cfg_bus.values.i_xor_swaps[0] = xswap
cfg_bus.Write()
yield ck_ev
def IterWrite():
for i in range(N_VEC):
wad_data[0][0] = 0
wad_data[1][0] = i
npd.copyto(wad_data[2], npi.arange(i * VSIZE, (i + 1) * VSIZE))
yield wad_data
yield from wad_master.SendIter(IterWrite())
for i in range(10):
yield ck_ev
NTEST = N_VEC * VSIZE - npd.sum(stride, dtype=npd.int32) - 1
raddr = npi.arange(NTEST)[:, newaxis] + STEP
st.Resize(NTEST)
test.Expect((raddr, ))
def IterRead():
for i in raddr:
ra_data[0][0] = 0
npd.copyto(ra_data[1], i)
yield ra_data
yield from ra_master.SendIter(IterRead())
for i in range(100):
yield ck_ev
assert st.is_clean
FinishSim()
def main():
scb = Scoreboard("ChunkAddrLooper")
test = scb.GetTest("test")
st = Stacker(0, callbacks=[test.Get])
bg = BusGetter(callbacks=[st.Get])
master = TwoWire.Master(mrdy_bus, mack_bus, mofs_bus, ck_ev)
i_data = master.values
slave = TwoWire.Slave(crdy_bus,
cack_bus,
cmd_bus,
ck_ev,
callbacks=[bg.Get])
yield rst_out_ev
# simulation
n_bofs, bofs = cfg.CreateBlockTransaction()
TEST0 = not getenv("TEST0") is None
print(f"Testing {0 if TEST0 else 1}...")
TEST_UMCFG = cfg.umcfg_i0 if TEST0 else cfg.umcfg_i1
OFS = int(bool(TEST0))
for i in range(n_bofs):
(n_i, bofs_i, abeg_i, aend_i, abeg_id_i, aend_id_i,
dummy) = cfg.CreateAccumBlockTransaction(bofs[i])[OFS]
for j in range(n_i):
# only use the first one
TEST_ABMOFS = cfg.CreateChunkHead(bofs_i[j], abeg_i[j],
abeg_id_i[j], aend_id_i[j],
TEST_UMCFG)[0]
ans = cfg.CreateDramReadTransaction(TEST_ABMOFS, TEST_UMCFG, 0)
st.Resize(ans.shape[0])
npd.copyto(i_data[0], TEST_ABMOFS)
npd.copyto(i_data[1], TEST_UMCFG["lmpad"][0])
npd.copyto(i_data[2], TEST_UMCFG["mboundary"][0])
npd.copyto(i_data[3], TEST_UMCFG["mboundary_lmwidth"][0])
i_data[4][0] = TEST_UMCFG["mlinear"][0]
i_data[5][
0] = 1 if TEST_UMCFG["mwrap"][0] == UmiModel.MEM_WRAP else 0
test.Expect(
tuple(ans[k][:, newaxis]
for k in ("cmd_type", "islast", "addr", "ofs", "len")))
yield from master.Send(i_data)
for i in range(100):
yield ck_ev
for i in range(300):
yield ck_ev
assert st.is_clean
FinishSim()
def main():
scb = Scoreboard("AccumBlockLooper")
test_i0 = scb.GetTest("test_i0")
test_i1 = scb.GetTest("test_i1")
test_dma = scb.GetTest("test_dma")
test_o = scb.GetTest("test_o")
test_alu = scb.GetTest("test_alu")
st_i0 = Stacker(0, callbacks=[test_i0.Get])
st_i1 = Stacker(0, callbacks=[test_i1.Get])
st_dma = Stacker(0, callbacks=[test_dma.Get])
st_o = Stacker(0, callbacks=[test_o.Get])
st_alu = Stacker(0, callbacks=[test_alu.Get])
bg_i0 = BusGetter(callbacks=[st_i0.Get])
bg_i1 = BusGetter(callbacks=[st_i1.Get])
bg_dma = BusGetter(callbacks=[st_dma.Get])
bg_o = BusGetter(callbacks=[st_o.Get])
bg_alu = BusGetter(callbacks=[st_alu.Get])
master = TwoWire.Master(s_rdy_bus, s_ack_bus, s_bus, ck_ev)
i_data = master.values
slave_i0 = TwoWire.Slave(i0_rdy_bus,
i0_ack_bus,
i0_bus,
ck_ev,
callbacks=[bg_i0.Get])
slave_i1 = TwoWire.Slave(i1_rdy_bus,
i1_ack_bus,
i1_bus,
ck_ev,
callbacks=[bg_i1.Get])
slave_dma = TwoWire.Slave(dma_rdy_bus,
dma_ack_bus,
dma_bus,
ck_ev,
callbacks=[bg_dma.Get])
slave_o = TwoWire.Slave(o_rdy_bus,
o_ack_bus,
o_bus,
ck_ev,
callbacks=[bg_o.Get])
slave_alu = TwoWire.Slave(alu_rdy_bus,
alu_ack_bus,
alu_bus,
ck_ev,
callbacks=[bg_alu.Get])
yield rst_out_ev
yield ck_ev
n_bofs, bofs, = cfg.CreateBlockTransaction()
ans_i0, ans_i1, ans_dma, ans_o, ans_alu, = cfg.CreateAccumBlockTransaction(
bofs[0])
n_i0, bofs_i0, abeg_i0, aend_i0, abeg_id_i0, aend_id_i0, dummy, = ans_i0
n_i1, bofs_i1, abeg_i1, aend_i1, abeg_id_i1, aend_id_i1, dummy, = ans_i1
n_dma, bofs_dma, abeg_dma, aend_dma, abeg_id_dma, aend_id_dma, which_dma = ans_dma
n_o, bofs_o, abeg_o, aend_o, abeg_id_o, aend_id_o, dummy, = ans_o
n_alu, bofs_alu, abeg_alu, aend_alu, abeg_id_alu, aend_id_alu, dummy, = ans_alu
# start simulation
npd.copyto(i_data[0], bofs[0])
npd.copyto(i_data[1], cfg.acfg['local'][0])
npd.copyto(i_data[2], cfg.acfg['end'][0])
npd.copyto(i_data[3], cfg.acfg['total'][0])
npd.copyto(i_data[4], cfg.n_i0[0])
npd.copyto(i_data[5], cfg.n_i0[1])
npd.copyto(i_data[6], cfg.n_i1[0])
npd.copyto(i_data[7], cfg.n_i1[1])
npd.copyto(i_data[8], cfg.n_o[0])
npd.copyto(i_data[9], cfg.n_o[1])
npd.copyto(i_data[10], cfg.n_inst[0])
npd.copyto(i_data[11], cfg.n_inst[1])
test_i0.Expect(
(bofs_i0, abeg_i0, aend_i0, abeg_id_i0[:,
newaxis], aend_id_i0[:,
newaxis]))
test_i1.Expect(
(bofs_i1, abeg_i1, aend_i1, abeg_id_i1[:,
newaxis], aend_id_i1[:,
newaxis]))
test_dma.Expect((bofs_dma, which_dma[:, newaxis], abeg_dma,
abeg_id_dma[:, newaxis], aend_id_dma[:, newaxis]))
test_o.Expect(
(bofs_o, abeg_o, aend_o, abeg_id_o[:, newaxis], aend_id_o[:, newaxis]))
test_alu.Expect((bofs_alu, abeg_alu, aend_alu))
st_i0.Resize(n_i0)
st_i1.Resize(n_i1)
st_dma.Resize(n_dma)
st_o.Resize(n_o)
st_alu.Resize(n_alu)
yield from master.Send(i_data)
for i in range(300):
yield ck_ev
assert st_i0.is_clean
assert st_i1.is_clean
assert st_dma.is_clean
assert st_o.is_clean
assert st_alu.is_clean
FinishSim()
def main():
scb = Scoreboard("WriteCollector")
test = scb.GetTest("test")
st = Stacker(callbacks=[test.Get])
bg = BusGetter(callbacks=[st.Get])
master_a = TwoWire.Master(a_rdy_bus, a_ack_bus, a_bus, ck_ev)
master_d = TwoWire.Master(d_rdy_bus, d_ack_bus, d_bus, ck_ev)
slave = TwoWire.Slave(w_rdy_bus,
w_ack_bus,
w_bus,
ck_ev,
callbacks=[bg.Get])
yield rst_out_ev
# global
master_ad = master_a.values
master_dd = master_d.values
# simulation
n_bofs, bofs = conf.CreateBlockTransaction()
for i in range(n_bofs):
(n_o, bofs_o, abeg_o, aend_o, abeg_id_o, aend_id_o,
dummy) = conf.CreateAccumBlockTransaction(bofs[i])[3]
for j in range(n_o):
# Expect?
(n_aofs_o, agofs_o, alofs_o, rt_i_o, rg_li_o,
rg_ri_o) = conf.CreateAccumTransaction(abeg_o[j], aend_o[j])
accum_idx_o, warpid_o, rg_flat_o, rt_flat_o = conf.CreateAccumWarpTransaction(
abeg_o[j], aend_o[j], rt_i_o, rg_li_o, rg_ri_o, conf.n_o)
bgofs_o, blofs_o, valid_o = conf.CreateBofsValidTransaction(
bofs[i], warpid_o)
addr_o = conf.CreateVectorAddressTransaction(
bgofs_o[:, 0, :], agofs_o[accum_idx_o], rg_flat_o,
conf.umcfg_o['mlinear'], conf.umcfg_o, False)
valid_o_packed = npd.bitwise_or.reduce(
valid_o << npi.arange(VSIZE)[newaxis, :], axis=1).astype('u4')
# output part
if addr_o.size:
da, dm = conf.CreateDramWriteTransaction(valid_o, addr_o)
dm_packed = npd.bitwise_or.reduce(
dm << npi.arange(conf.DRAM_ALIGN)[newaxis, :], axis=1)
st.Resize(da.shape[0])
test.Expect((da[:, newaxis], dm_packed[:, newaxis]))
# Send
def iter_a():
for k in range(addr_o.shape[0]):
npd.copyto(master_ad[0], addr_o[k])
master_ad[1][0] = valid_o_packed[k]
yield master_ad
Fork(master_d.SendIter(repeat(tuple(), da.shape[0])))
yield from master_a.SendIter(iter_a())
for i in range(100):
yield ck_ev
for i in range(100):
yield ck_ev
assert st.is_clean
FinishSim()