def setup_default_configs(s, m, irepr):
if not hasattr(m, 'config_placeholder'):
m.config_placeholder = VerilogPlaceholderConfigs()
cfg = m.config_placeholder
if cfg.is_valid:
# If top_module is unspecified, infer it from the component and its
# parameters. Note we need to make sure the infered top_module matches
# the default translation result.
if not cfg.top_module:
cfg.top_module = irepr.get_name()
cfg.unique_top_module = get_component_unique_name(irepr)
# if m.get_parent_object() is None:
# # This is a top level module -- use the module name without the
# # parameters because we will generate a different wrapper for top!
# cfg.top_module = irepr.get_name()
# else:
# # Otherwise use the full name
# cfg.top_module = get_component_unique_name( irepr )
else:
cfg.unique_top_module = cfg.top_module
# Only try to infer the name of Verilog source file if both
# flist and the source file are not specified.
if not cfg.src_file and not cfg.v_flist:
cfg.src_file = f"{cfg.top_module}.v"
def pickle(s, m, cfg, irepr):
# In the namespace cfg:
# pickled_dependency_file: path to the pickled Verilog dependency file
# pickled_wrapper_file: path to the pickled Verilog wrapper file
# pickled_top_module: name of the top module in the pickled Verilog
pickled_dependency_file = f'{cfg.unique_top_module}_pickled_dependency.v'
pickled_wrapper_file = f'{cfg.unique_top_module}_pickled_wrapper.v'
pickled_top_module = f'{cfg.unique_top_module}_wrapper'
orig_comp_name = get_component_unique_name(irepr)
pickle_dependency = s._get_dependent_verilog_modules(m, cfg, irepr)
pickle_wrapper, tplt = s._gen_verilog_wrapper(m, cfg, irepr,
pickled_top_module)
def_symbol = pickled_top_module.upper()
# The directives are there to prevent potential duplicated definitions
# pickle_template = dedent(
# '''\
# // This is a wrapper module that wraps PyMTL placeholder {orig_comp_name}
# // This file was generated by PyMTL VerilogPlaceholderPass
# `ifndef {def_symbol}
# `define {def_symbol}
# {pickle_dependency}
# {pickle_wrapper}
# `endif /* {def_symbol} */
# '''
# )
cfg.pickled_dependency_file = pickled_dependency_file
cfg.pickled_wrapper_file = pickled_wrapper_file
cfg.pickled_top_module = pickled_top_module
cfg.pickled_wrapper_template = tplt
cfg.pickled_orig_file = cfg.src_file
cfg.def_symbol = def_symbol
cfg.orig_comp_name = orig_comp_name
cfg.pickle_dependency = pickle_dependency
with open(pickled_dependency_file, 'w') as fd:
fd.write(pickle_dependency)
with open(pickled_wrapper_file, 'w') as fd:
fd.write(pickle_wrapper)
def setup_default_configs(s, m, irepr):
c = s.__class__
cfg = m.get_metadata(c.placeholder_config)
if cfg.enable:
# If top_module is unspecified, infer it from the component and its
# parameters. Note we need to make sure the infered top_module matches
# the default translation result.
if not cfg.top_module:
cfg.top_module = irepr.get_name()
# If the placeholder has parameters, use the mangled unique component
# name. Otherwise use {class_name}_noparam to avoid duplicated defs.
has_params = bool(irepr.get_params()) or bool(cfg.params)
if has_params:
cfg.pickled_top_module = get_component_unique_name(irepr)
else:
cfg.pickled_top_module = f"{irepr.get_name()}_noparam"
# Only try to infer the name of Verilog source file if both
# flist and the source file are not specified.
if not cfg.src_file and not cfg.v_flist:
parent_dir = os.path.dirname(inspect.getfile(m.__class__))
cfg.src_file = f"{parent_dir}{os.sep}{cfg.top_module}.v"
# Pickled file name should always be the same as the top level
# module name.
cfg.pickled_source_file = f"{cfg.pickled_top_module}__pickled.v"
# What is the original file/flist of the pickled source file?
if cfg.src_file:
cfg.pickled_orig_file = cfg.src_file
else:
cfg.pickled_orig_file = cfg.v_flist
# The unique placeholder name
cfg.orig_comp_name = get_component_unique_name(irepr)
# The `ifdef dependency guard is a function of the placeholder
# class name
cfg.dependency_guard_symbol = m.__class__.__name__.upper()
# The `ifdef placeholder guard is a function of the placeholder
# wrapper name
cfg.wrapper_guard_symbol = cfg.pickled_top_module.upper()
# Scan through src_file to check for clk and reset
if cfg.is_default('has_clk'):
cfg.has_clk = s._has_pin(cfg.src_file, 'input', 1, 'clk')
if cfg.is_default('has_reset'):
cfg.has_reset = s._has_pin(cfg.src_file, 'input', 1, 'reset')
# By default, the separator of placeholders is single underscore
cfg.separator = '_'
# Look for pymtl.ini starting from the directory that includes the def
# of class m.__class__
auto_prefix = s._get_auto_prefix(m)
# Apply auto_prefix to top_module
cfg.top_module = auto_prefix + cfg.top_module