def test_invalid_powers(self): gcirq = cirq.Circuit() qreg = [cirq.LineQubit(i) for i in range(5)] cirq_to_qlm(gcirq) try: gcirq.append(cirq.H(qreg[0])**pi) except ValueError: pass try: gcirq.append(cirq.SWAP(qreg[0], qreg[1])**pi) except ValueError: pass
def test_param(self): """ Ensure that parametrized gate can be translated from myQLM to cirq """ # Init program prog = Program() qbits = prog.qalloc(1) # Apply gates for gate in [RX, RY, RZ, PH]: prog.apply(gate(uniform(0, 2 * pi)), qbits) # Generate the circuit and translate it twice qlm_circ = prog.to_circ() cirq_circ = qlm_to_cirq(qlm_circ) qlm_circ_cp, _ = cirq_to_qlm(cirq_circ, sep_measures=True) # Check output assert len(qlm_circ_cp) == len(qlm_circ) for result, expected in zip(qlm_circ_cp.iterate_simple(), qlm_circ.iterate_simple()): # Check names assert (result[0] == expected[0]) or sorted( [result[0], expected[0]]) == ["PH", "RZ"] # Check values assert result[1:] == expected[1:]
def test_no_param(self): """ Ensure that not parametrized gate can be translated from myQLM to cirq """ # Init program prog = Program() qbits = prog.qalloc(3) # Add non parametrized gate for gate in [H, X, Y, Z, S, T, SWAP, ISWAP, CNOT, CSIGN, CCNOT]: prog.apply(gate, qbits[0:gate.arity]) qlm_circ = prog.to_circ() # Translate the circuit twice cirq_circ = qlm_to_cirq(qlm_circ) qlm_circ_cp, _ = cirq_to_qlm(cirq_circ, sep_measures=True) # Check output assert len(qlm_circ_cp) == len(qlm_circ) for result, expected in zip(qlm_circ_cp.iterate_simple(), qlm_circ.iterate_simple()): # Fix result if the name is invalid if result[0] == "C-C-X": result = ("CCNOT", result[1], result[2]) assert result == expected
def test_valid_powers(self): gcirq = cirq.Circuit() qreg = [cirq.LineQubit(i) for i in range(5)] gcirq.append(cirq.X(qreg[0])**-3.67) gcirq.append(cirq.Y(qreg[0])**7.9) gcirq.append(cirq.Z(qreg[0])**sqrt(5)) gcirq.append(cirq.S(qreg[0])**-pi) gcirq.append(cirq.T(qreg[0])**(sqrt(7) - pi)) gcirq.append(cirq.SWAP(qreg[0], qreg[1])**-0.5) gcirq.append(cirq.ISWAP(qreg[0], qreg[1])**16.0) result = cirq_to_qlm(gcirq) for i, op in enumerate(result.ops): name, params = extract_syntax(result.gateDic[op.gate], result.gateDic) if i == 0: self.assertEqual(params[0], -3.67 * pi) elif i == 1: self.assertEqual(params[0], 7.9 * pi) elif i == 2: self.assertEqual(params[0], sqrt(5) * pi) elif i == 3: self.assertEqual(params[0], -pi * pi / 2) elif i == 4: self.assertEqual(params[0], (sqrt(7) - pi) * pi / 4) else: continue
def test_default_gates_and_qbit_reorder(self): gcirq = cirq.Circuit() qreg1 = [cirq.GridQubit(i, 0) for i in range(2)] qreg2 = [cirq.LineQubit(0)] qreg3 = [cirq.LineQubit(i) for i in range(1, 3)] for op in gates_1qb: gcirq.append(op(qreg2[0])**-1.0) for op in gates_2qb: gcirq.append(op(qreg3[0], qreg1[1])**-1.0) gcirq.append(cirq.CCX(qreg1[0], qreg3[1], qreg2[0])) gcirq.append(cirq.CSWAP(qreg1[0], qreg3[1], qreg2[0])) gcirq.append(cirq.CCZ(qreg1[0], qreg3[1], qreg2[0])) # Toffoli | (qreg3[1], qreg1[0], qreg2[0]) for qbit in qreg1 + qreg2 + qreg3: gcirq.append(cirq.measure(qbit)) # Generating qlm circuit result = cirq_to_qlm(gcirq) # Generating equivalent qlm circuit prog = Program() qubits = prog.qalloc(5) cbits = prog.calloc(5) for op in pygates_1qb: prog.apply(op.dag(), qubits[2]) for op in pygates_2qb: prog.apply(op.dag(), qubits[3], qubits[1]) prog.apply(CCNOT, qubits[0], qubits[4], qubits[2]) prog.apply(SWAP.ctrl(), qubits[0], qubits[4], qubits[2]) prog.apply(Z.ctrl().ctrl(), qubits[0], qubits[4], qubits[2]) for i in range(5): prog.measure(qubits[i], cbits[i]) expected = prog.to_circ() self.assertEqual(len(result.ops), len(expected.ops)) for i in range(len(result.ops)): res_op = result.ops[i] exp_op = expected.ops[i] if res_op.type == OpType.MEASURE: self.assertEqual(res_op, exp_op) continue result_gate_name, result_gate_params = extract_syntax( result.gateDic[res_op.gate], result.gateDic) # print("got gate {} with params {} on qbits {}" # .format(result_gate_name, result_gate_params, # res_op.qbits)) expected_gate_name, expected_gate_params = extract_syntax( expected.gateDic[exp_op.gate], expected.gateDic) # print("expected gate {} with params {} on qbits {}" # .format(expected_gate_name, expected_gate_params, # exp_op.qbits)) self.assertEqual(expected_gate_name, result_gate_name) self.assertEqual(expected_gate_params, result_gate_params)