def __init__(self): self.MEMORY_SIZE = 0x800 # 2kB self.rom = None self.ram = RAM(self.MEMORY_SIZE) self.cpu = CPU(self.cpu_read, self.cpu_write) self.ppu = PPU(self.ppu_read, self.ppu_write) self.system_clock = 0
def __init__(self): """Construct a new CPU.""" self.reg = [0b0] * 8 self.ram = RAM() self.pc = 0 self.mar = None # holds address currently being read or written self.mdr = None # holds value to write or value just read self.dispatch_table = {} self.setup_instructions()
def __init__(self, config, original_speed, fps, no_ui): self.config = config self.original_speed = original_speed self.fps = fps self.no_ui = no_ui self.ram = RAM() self.keyboard = Keyboard(self.ram) self.z80 = Z80(self.ram) self.cmd = CMD(self.ram) self.entry_addr = self.cmd.load(config["cmd"]) self.ram.backup() self.reset()
def __init__(self, run_state=1, run_next_inst=False, mem_size=2**12): super(SPECTRE_VM, self).__init__() # this must be a daemon, so it exits with the main program self.setDaemon(True) # cpu registers # self.mem = RAM(2**11) # 2048 bits | 0.25 kB = 256 bytes self.mem = RAM(mem_size) # 4096 bits | 0.50 kB = 512 bytes print(f'mem size: {self.mem.size_bytes} bytes') # self.mem = RAM(2**13) # 8192 bits | 1.00 kB = 1024 bytes self.memlock = threading.Lock() self.cpu = CPU(self.mem, self.memlock) self.__run_state = run_state return
def test_ld_SP_addr_nn_correctly_loads_value_to_SP(self): ram = RAM() ram[0x2130] = 0x65 ram[0x2131] = 0x78 cpu = CPU(ROM(b'\xED\x7b\x30\x21'), ram) cpu.readOp() self.assertEqual(0x7865, cpu.SP)
def test_rst_does_sets_PC_correctly(self): ram = RAM() cpu = CPU(ROM(b'\x00' * 0x15b3 + b'\xdf'), ram) cpu.PC = 0x15B3 cpu.SP = 0x2000 cpu.readOp() self.assertEqual(0x18, cpu.PC)
def test_rst_takes_11_t_states(self): ram = RAM() cpu = CPU(ROM(b'\x00' * 0x15b3 + b'\xff'), ram) cpu.PC = 0x15B3 cpu.SP = 0x2000 cpu.readOp() self.assertEqual(11, cpu.t_states)
def test_rst_takes_3_m_cycles(self): ram = RAM() cpu = CPU(ROM(b'\x00' * 0x15b3 + b'\xff'), ram) cpu.PC = 0x15B3 cpu.SP = 0x2000 cpu.readOp() self.assertEqual(3, cpu.m_cycles)
def test_ld_a_iy_correctly_copies_value_to_a(self): ram = RAM() ram[0x25af + 0x19] = 0x39 cpu = CPU(ROM(b'\xFD\x7e\x19'), ram) cpu.IY = 0x25AF cpu.readOp() self.assertEqual(0x39, cpu.A)
def test_ld_b_iy_takes_19_t_states(self): ram = RAM() ram[0x25af + 0x19] = 0x39 cpu = CPU(ROM(b'\xFD\x46\x19'), ram) cpu.IY = 0x25AF cpu.readOp() self.assertEqual(19, cpu.t_states)
def test_ld_b_iy_takes_5_m_cycles(self): ram = RAM() ram[0x25af + 0x19] = 0x39 cpu = CPU(ROM(b'\xFD\x46\x19'), ram) cpu.IY = 0x25AF cpu.readOp() self.assertEqual(5, cpu.m_cycles)
def test_ld_a_de_loads_corect_value(self): ram = RAM() ram[0x30A2] = 0x22 cpu = CPU(ROM(b'\x1a'), ram) cpu.DE = 0x30A2 cpu.readOp() self.assertEqual(0x22, cpu.A)
def test_ld_a_de_takes_7_t_states(self): ram = RAM() ram[0x30A2] = 0x22 cpu = CPU(ROM(b'\x1a'), ram) cpu.DE = 0x30A2 cpu.readOp() self.assertEqual(7, cpu.t_states)
def test_ld_BC_addr_nn_takes_20_t_states(self): ram = RAM() ram[0x2130] = 0x65 ram[0x2131] = 0x78 cpu = CPU(ROM(b'\xED\x4b\x30\x21'), ram) cpu.readOp() self.assertEqual(20, cpu.t_states)
def test_ld_a_bc_loads_corect_value(self): ram = RAM() ram[0x4747] = 0x12 cpu = CPU(ROM(b'\x0a'), ram) cpu.BC = 0x4747 cpu.readOp() self.assertEqual(0x12, cpu.A)
def test_ld_a_bc_takes_7_t_states(self): ram = RAM() ram[0x4747] = 0x12 cpu = CPU(ROM(b'\x0a'), ram) cpu.BC = 0x4747 cpu.readOp() self.assertEqual(7, cpu.t_states)
def test_ld_hl_E_correctly_stores_value_from_given_address_to_hl(self): ram = RAM() cpu = CPU(ROM(b'\x73'), ram) cpu.HL = 0x2000 cpu.E = 0x20 cpu.readOp() self.assertEqual(0x20, ram[0x2000])
def test_ld_bc_a_loads_corect_value(self): ram = RAM() cpu = CPU(ROM(b'\x02'), ram) cpu.A = 0x7a cpu.BC = 0x1212 cpu.readOp() self.assertEqual(0x7a, cpu.ram[cpu.BC])
def test_dec_ix_takes_6_m_cycles(self): ram = RAM() ram[0x105] = 0xDD cpu = CPU(ROM(b'\xdd\x35\x05'), ram) cpu.IX = 0x100 cpu.readOp() self.assertEqual(6, cpu.m_cycles)
def test_dec_ix_takes_23_t_states(self): ram = RAM() ram[0x105] = 0xDD cpu = CPU(ROM(b'\xdd\x35\x05'), ram) cpu.IX = 0x100 cpu.readOp() self.assertEqual(23, cpu.t_states)
def test_inc_hl_takes_11_t_states(self): ram = RAM() ram[0x100] = 0xDD cpu = CPU(ROM(b'\x34'), ram) cpu.HL = 0x100 cpu.readOp() self.assertEqual(11, cpu.t_states)
def test_dec_ix_sets_correct_value_is_set(self): ram = RAM() ram[0x105] = 0xDD cpu = CPU(ROM(b'\xdd\x35\x05'), ram) cpu.IX = 0x100 cpu.readOp() self.assertEqual(0xDC, ram[cpu.IX+5])
def test_ld_b_hl_takes_2_m_cycles(self): ram = RAM() ram[0x25af] = 0x39 cpu = CPU(ROM(b'\x46'), ram) cpu.HL = 0x25AF cpu.readOp() self.assertEqual(2, cpu.m_cycles)
def test_ld_b_hl_takes_7_t_states(self): ram = RAM() ram[0x25af] = 0x39 cpu = CPU(ROM(b'\x46'), ram) cpu.HL = 0x25AF cpu.readOp() self.assertEqual(7, cpu.t_states)
def test_ld_ix_nn_correctly_copies_nn_value_to_ix(self): ram = RAM() ram[0x6666] = 0x92 ram[0x6667] = 0xDA cpu = CPU(ROM(b'\xDD\x2A\x66\x66'), ram) cpu.readOp() self.assertEqual(0xDA92, cpu.IX)
def test_ld_a_hl_correctly_copies_value_to_a(self): ram = RAM() ram[0x25af] = 0x39 cpu = CPU(ROM(b'\x7e'), ram) cpu.HL = 0x25AF cpu.readOp() self.assertEqual(0x39, cpu.A)
def test_ld_ix_nn_takes_20_t_states(self): ram = RAM() ram[0x6666] = 0x92 ram[0x6667] = 0xDA cpu = CPU(ROM(b'\xDD\x2A\x66\x66'), ram) cpu.readOp() self.assertEqual(20, cpu.t_states)
def test_ld_ix_nn_takes_6_m_cycles(self): ram = RAM() ram[0x6666] = 0x92 ram[0x6667] = 0xDA cpu = CPU(ROM(b'\xDD\x2A\x66\x66'), ram) cpu.readOp() self.assertEqual(6, cpu.m_cycles)
def test_ld_a_de_takes_2_m_cycles(self): ram = RAM() ram[0x30A2] = 0x22 cpu = CPU(ROM(b'\x1a'), ram) cpu.DE = 0x30A2 cpu.readOp() self.assertEqual(2, cpu.m_cycles)
def test_ld_a_bc_takes_2_m_cycles(self): ram = RAM() ram[0x4747] = 0x12 cpu = CPU(ROM(b'\x0a'), ram) cpu.BC = 0x4747 cpu.readOp() self.assertEqual(2, cpu.m_cycles)
i, j = np.random.randint(0, w_o-w_i, size=2) data[k, :, i:i+w_i, j:j+w_i] += batch[k] for _ in range(4): clt = train_data[np.random.randint(0, train_data.shape[0]-1)] c1, c2 = np.random.randint(0, w_i-8, size=2) i1, i2 = np.random.randint(0, w_o-8, size=2) data[k, :, i1:i1+8, i2:i2+8] += clt[:, c1:c1+8, c2:c2+8] data = np.clip(data, 0., 1.) return data process = clutter # init RAM model from ram import RAM model = RAM( g_size=g_size, n_steps=n_steps, n_scales=n_scales, use_lstm=args.lstm) print('load model from {}'.format(args.model)) serializers.load_hdf5(args.model, model) gpuid = args.gpuid if gpuid >= 0: cuda.get_device(gpuid).use() model.to_gpu() # inference test_data = process(test_data) test_data.flags.writeable = False index = np.random.randint(0, 9999) image = PIL.Image.fromarray(test_data[index][0]*255).convert('RGB')