def test_regalloc_lists(self):
v1 = Variable()
v1.concretetype = lltype.Signed
v2 = Variable()
v2.concretetype = lltype.Signed
v3 = Variable()
v3.concretetype = lltype.Signed
v4 = Variable()
v4.concretetype = lltype.Signed
v5 = Variable()
v5.concretetype = lltype.Signed
block = Block([v1])
block.operations = [
SpaceOperation('int_add', [v1, Constant(1, lltype.Signed)], v2),
SpaceOperation('rescall', [ListOfKind('int', [v1, v2])], v5),
SpaceOperation('rescall', [ListOfKind('int', [v1, v2])], v3),
]
graph = FunctionGraph('f', block, v4)
block.closeblock(Link([v3], graph.returnblock))
#
self.check_assembler(
graph, """
int_add %i0, $1 -> %i1
rescall I[%i0, %i1] -> %i2
rescall I[%i0, %i1] -> %i0
int_return %i0
""")
def test_assemble_list():
ssarepr = SSARepr("test")
i0, i1 = Register('int', 0x16), Register('int', 0x17)
ssarepr.insns = [
('foobar', ListOfKind('int',
[i0, i1, Constant(42, lltype.Signed)]),
ListOfKind('ref', [])),
]
assembler = Assembler()
jitcode = assembler.assemble(ssarepr)
assert jitcode.code == "\x00\x03\x16\x17\xFF\x00"
assert assembler.insns == {'foobar/IR': 0}
assert jitcode.constants_i == [42]
def test_arg_sublist_1(self):
v1 = varoftype(lltype.Signed)
v2 = varoftype(lltype.Char)
v3 = varoftype(rclass.OBJECTPTR)
v4 = varoftype(lltype.Ptr(rstr.STR))
v5 = varoftype(lltype.Float)
op = SpaceOperation('residual_call_ir_f',
[Constant(12345, lltype.Signed), # function ptr
ListOfKind('int', [v1, v2]), # int args
ListOfKind('ref', [v3, v4])], # ref args
v5) # result
flattener = GraphFlattener(None, fake_regallocs())
flattener.serialize_op(op)
assert_format(flattener.ssarepr, """
residual_call_ir_f $12345, I[%i0, %i1], R[%r0, %r1] -> %f0
""")
def test_unformat_assembler_lists():
input = """
foo F[%f0, %f3]
"""
regs = {}
ssarepr = unformat_assembler(input, regs)
assert ssarepr.insns == [('foo',
ListOfKind('float', [regs['%f0'], regs['%f3']]))]
def test_format_assembler_list():
ssarepr = SSARepr("test")
i0, i1 = Register('int', 0), Register('int', 1)
ssarepr.insns = [
('foobar', ListOfKind('int', [i0, Constant(123, lltype.Signed), i1])),
]
asm = format_assembler(ssarepr)
expected = """
foobar I[%i0, $123, %i1]
"""
assert asm == str(py.code.Source(expected)).strip() + '\n'
def test_assemble_list_semibug():
# the semibug is that after forcing 42 into the dict of constants,
# it would be reused for all future 42's, even ones that can be
# encoded directly.
ssarepr = SSARepr("test")
ssarepr.insns = [
('foobar', ListOfKind('int', [Constant(42, lltype.Signed)])),
('foobar', ListOfKind('int', [Constant(42, lltype.Signed)])),
('baz', Constant(42, lltype.Signed)),
('bok', Constant(41, lltype.Signed)),
]
assembler = Assembler()
jitcode = assembler.assemble(ssarepr)
assert jitcode.code == ("\x00\x01\xFF"
"\x00\x01\xFF"
"\x01\x2A"
"\x02\xFE")
assert assembler.insns == {
'foobar/I': 0,
'baz/c': 1, # in USE_C_FORM
'bok/i': 2
} # not in USE_C_FORM
assert jitcode.constants_i == [42, 41]
def unformat_arg(s):
if s.endswith(','):
s = s[:-1].rstrip()
if s[0] == '%':
try:
return registers[s]
except KeyError:
num = int(s[2:])
if s[1] == 'i': reg = Register('int', num)
elif s[1] == 'r': reg = Register('ref', num)
elif s[1] == 'f': reg = Register('float', num)
else: raise AssertionError("bad register type")
registers[s] = reg
return reg
elif s[0] == '$':
intvalue = int(s[1:])
return Constant(intvalue, lltype.Signed)
elif s[0] == 'L':
return TLabel(s)
elif s[0] in 'IRF' and s[1] == '[' and s[-1] == ']':
items = split_words(s[2:-1])
items = map(unformat_arg, items)
return ListOfKind({'I': 'int', 'R': 'ref', 'F': 'float'}[s[0]],
items)
elif s.startswith('<SwitchDictDescr '):
assert s.endswith('>')
switchdict = SwitchDictDescr()
switchdict._labels = []
items = split_words(s[len('<SwitchDictDescr '):-1])
for item in items:
key, value = item.split(':')
value = value.rstrip(',')
switchdict._labels.append((int(key), TLabel(value)))
return switchdict
else:
raise AssertionError("unsupported argument: %r" % (s,))