def main(default_directory='.'): path_fpga_loader = '../firmwares/fpga_loader' path_firmware = '../firmwares/test06.bin' firmware_loader = os.path.join(default_directory, path_fpga_loader) bitstream = os.path.join(default_directory, path_firmware) os.system(firmware_loader + ' ' + bitstream) time.sleep(2) gennum = rr.Gennum() i2c = COpenCoresI2C(gennum, 0x40000, 99) # Prescaler value calculated using 50 MHz clock # The address of the SI570 is fixed in the part number si570 = CSI570(i2c, 0x55) si570.setup_oscillator(1, 0, 0) time.sleep(1) if (gennum.iread(0, 0x80000, 4)): print "SI570 CLK present: OK" else: raise TpsError("SIS570 CLK present: FAILED")
def main(default_directory='.'): path_fpga_loader = '../firmwares/fpga_loader' path_firmware = '../firmwares/test08.bin' firmware_loader = os.path.join(default_directory, path_fpga_loader) bitstream = os.path.join(default_directory, path_firmware) os.system(firmware_loader + ' ' + bitstream) time.sleep(2) global double_counter gennum = rr.Gennum() double_counter = WB_2CLK_COUNTER(gennum, BASE_WB_2CLK_COUNTER) print "-------------------------------------------------------------------" print "-- SPEC V.1.1 Clocks testing --" print "-- - - - - - - - - - - - - - - - -- - - - - - - - - - - - - - - --" print " CERN BE-CO-HT Visit us! www.ohwr.org " print " " print " This test is intended for testing the system clock (20 MHz) and " print " the PLL clock (CDCM61004)" print " The following circuits are tested as well:" print " - IC3 AD5662BRMZ-1" print " - OSC1 IVT3205CR 25.0MHz" print "-- - - - - - - - - - - - - - - - --" print " TEST PARAMS" print "-- - - - - - - - - - - - - - - - --" print "Wishbone counter address\t" + "%.8X" % BASE_WB_2CLK_COUNTER print "Wishbone SPI address\t\t" + "%.8X" % BASE_WB_SPI print "Number of tests\t\t\t" + str(TOTAL_OF_TESTS) print "Elapsed time per test\t\t" + str(TEST_TIME_SLOW) spi_device = COpenCoresSPI( gennum, BASE_WB_SPI, 0x0004) # Configuring with a 4 means a SCLK frequency of 5 MHz dac = AD5662_1(spi_device) dac.operation_mode(dac.OM_NORMAL) dac.set_dac_voltage(1.65) dac.update_output() print "* AD5662_1 set up for PLL reference clock\tOK" for i in range(0, TOTAL_OF_TESTS): double_counter.run_test(TEST_TIME_SLOW) for i in range(0, len(double_counter.results)): if (double_counter.results[i] == False): print "Test " + str(i) + ":\tFAIL" raise TpsCritical( "Mismatch between expected fast cycles and expected ones") else: print "Test " + str(i) + ":\tPASS" double_counter.write_report()
def main(default_directory='.'): path_fpga_loader = '../firmwares/fpga_loader' path_firmware = '../firmwares/test00.bin' firmware_loader = os.path.join(default_directory, path_fpga_loader) bitstream = os.path.join(default_directory, path_firmware) os.system(firmware_loader + ' ' + bitstream) time.sleep(2) gennum = rr.Gennum() i2c = COpenCoresI2C(gennum, 0x40000, 99) # Prescaler value calculated using 50 MHz clock # The address of the AD7997 is 0x23, pin 15 connected to GND. adc = ADC_AD7997(i2c, 0x23) value8 = adc_value(adc.rd_reg16(0xF0)) value7 = adc_value(adc.rd_reg16(0xE0)) value6 = adc_value(adc.rd_reg16(0xD0)) value5 = adc_value(adc.rd_reg16(0xC0)) value4 = adc_value(adc.rd_reg16(0xB0)) value3 = adc_value(adc.rd_reg16(0xA0)) value2 = adc_value(adc.rd_reg16(0x90)) value1 = adc_value(adc.rd_reg16(0x80)) # Check the values of the ADC. if (float(value8) < 1.61) or (float(value8) > 1.73): raise TpsError("Error in VS_VADJ, value x=" + value8 + ". x > 1.73 V or x < 1.61 V") print "VS_VADJ = " + value8 if (float(value7) < 1.90) or (float(value7) > 2.11): raise TpsError("Error in VS_P12V_x, value x=" + value7 + ". x< 1.90 V or x > 2.11 V") print "VS_P12V_x = " + value7 if (float(value6) < 1.66) or (float(value6) > 1.80): raise TpsError("Error in VS_P3V3_x, value x=" + value6 + ". x < 1.66 V or x > 1.80 V") print "VS_P3V3_x = " + value6
def main(default_directory='.'): path_fpga_loader = '../firmwares/fpga_loader' path_firmware = '../firmwares/test02.bin' firmware_loader = os.path.join(default_directory, path_fpga_loader) bitstream = os.path.join(default_directory, path_firmware) os.system(firmware_loader + ' ' + bitstream) time.sleep(2) gennum = rr.Gennum() eeprom = EEPROM_GENNUM(gennum) eeprom.eeprom_dump_to_file("/tmp/eeprom.dat") eeprom.file_dump_to_eeprom(default_directory + "/eeprom_test_A.dat") eeprom.eeprom_dump_to_screen() eeprom.compare_eeprom_with_file(default_directory + "/eeprom_test_A.dat") eeprom.file_dump_to_eeprom("/tmp/eeprom.dat") eeprom.eeprom_dump_to_screen() eeprom.compare_eeprom_with_file("/tmp/eeprom.dat")
def main (default_directory='.'): gennum = rr.Gennum(); flash = CGennumFlash(gennum, default_directory); start = time.time(); flash.lib.gpio_bootselect(flash.GENNUM_FLASH); version = hex(flash.lib.flash_read_id()); if (version != "0x202016"): raise TpsError('Error: version of the flash is not correct: ' + version); # Load a new firmware to the Flash memory. print "Starting the process to load a FW into Flash memory" flash.lib.load_mcs_to_flash(default_directory + "/test_flash.bin"); time.sleep(1); print "Forcing to load FW from Flash memory to FPGA" # Force the FPGA to load the FW from the Flash memory flash.lib.force_load_fpga_from_flash(); finish = time.time(); print "Time elapsed: " + str(finish - start) + " seconds" ask = ""; tmp_stdout = sys.stdout; sys.stdout = sys.__stdout__; tmp_stdin = sys.stdin; sys.stdin = sys.__stdin__; while ((ask != "Y") and (ask != "N")) : ask = raw_input("Are the LEDs blinking? [Y/N]") ask = ask.upper() sys.stdout = tmp_stdout; sys.stdin = tmp_stdin; if (ask == "N") : raise TpsError("Error loading FW through the Flash memory or there is a problem with the LEDs");
def main(default_directory='.'): path_fpga_loader = '../firmwares/fpga_loader' path_firmware = '../firmwares/test05.bin' firmware_loader = os.path.join(default_directory, path_fpga_loader) bitstream = os.path.join(default_directory, path_firmware) os.system(firmware_loader + ' ' + bitstream) time.sleep(2) gennum = rr.Gennum() i2c = COpenCoresI2C(gennum, 0x40000, 99) adn4600 = SWITCH_ADN4600(i2c, 0x48) adn4600.enable_tx(0) adn4600.enable_tx(1) adn4600.enable_tx(2) adn4600.enable_tx(3) adn4600.enable_tx(4) # channel 6 adn4600.enable_tx(5) # channel 7 adn4600.enable_tx(6) # channel 5 adn4600.enable_tx(7) # channel 4 print "adn4600 tx 1-0: " + hex(adn4600.rd_reg8(0xC8)) + " " + hex( adn4600.rd_reg8(0xC0)) print "adn4600 tx 3-2: " + hex(adn4600.rd_reg8(0xD8)) + " " + hex( adn4600.rd_reg8(0xD0)) print "adn4600 tx 5-4: " + hex(adn4600.rd_reg8(0xF0)) + " " + hex( adn4600.rd_reg8(0xF8)) print "adn4600 tx 7-6: " + hex(adn4600.rd_reg8(0xE0)) + " " + hex( adn4600.rd_reg8(0xE8)) adn4600.rx_logic(0, 1) adn4600.rx_logic(1, 1) adn4600.rx_logic(2, 1) adn4600.rx_logic(3, 1) adn4600.rx_logic(4, 1) adn4600.rx_logic(5, 1) adn4600.rx_logic(6, 1) adn4600.rx_logic(7, 1) print "adn4600 rx logic 1-0: " + hex(adn4600.rd_reg8(0x88)) + " " + hex( adn4600.rd_reg8(0x80)) print "adn4600 rx logic 3-2: " + hex(adn4600.rd_reg8(0x98)) + " " + hex( adn4600.rd_reg8(0x90)) print "adn4600 rx logic 5-4: " + hex(adn4600.rd_reg8(0xA8)) + " " + hex( adn4600.rd_reg8(0xA0)) print "adn4600 rx logic 7-6: " + hex(adn4600.rd_reg8(0xB8)) + " " + hex( adn4600.rd_reg8(0xB0)) time.sleep(1) adn4600.passby_input_output(0x4, 0x1) adn4600.passby_input_output(0x6, 0x6) print "adn4600 1-0: " + hex(adn4600.rd_reg8(0x51)) + " " + hex( adn4600.rd_reg8(0x50)) print "adn4600 3-2: " + hex(adn4600.rd_reg8(0x53)) + " " + hex( adn4600.rd_reg8(0x52)) print "adn4600 5-4: " + hex(adn4600.rd_reg8(0x55)) + " " + hex( adn4600.rd_reg8(0x54)) print "adn4600 7-6: " + hex(adn4600.rd_reg8(0x57)) + " " + hex( adn4600.rd_reg8(0x56)) time.sleep(1) minic_sata = CMinic(gennum, 0x20000, 0) minic_sata.init_ep() minic_dp0 = CMinic(gennum, 0x60000, 1) minic_dp0.init_ep() minic_sata1 = CMinic(gennum, 0xA0000, 2) minic_sata1.init_ep() minic_sfp = CMinic(gennum, 0x80000, 3) minic_sfp.init_ep() size = 129 p = Process(target=rx_thread, args=(minic_dp0, size)) p.start() # Send the data time.sleep(1) print "SATA 0 tx: " for i in range(1, 10): minic_sata.test_tx() time.sleep(1) print "Transmitted [" + str(i) + "]" print "Done" if (p.is_alive()): p.terminate() raise TpsError("Test SATA -> DP0: Error in DP0, RX") time.sleep(2) p = Process(target=rx_thread, args=(minic_sata, size)) p.start() # Send the data time.sleep(1) print "DP0 tx: " for i in range(1, 10): minic_dp0.test_tx() time.sleep(1) print "Transmitted [" + str(i) + "]" print "Done" if (p.is_alive()): p.terminate() raise TpsError("Test DP0 -> SATA 0: Error in SATA 0, RX") time.sleep(2) ask = "" print "\n*************************************************************" while ((ask != "Y") and (ask != "N")): ask = raw_input( "Please, now connect a SATA cable between FMC tester and SATA 1 connector. Is it done? [Y/N]" ) ask = ask.upper() if (ask == "N"): raise TpsWarning("Test DP0-SATA 1 cancelled") p = Process(target=rx_thread, args=(minic_dp0, size)) p.start() # Send the data time.sleep(1) print "SATA 1 tx: " for i in range(1, 10): minic_sata1.test_tx() time.sleep(1) print "Transmitted [" + str(i) + "]" print "Done" if (p.is_alive()): p.terminate() raise TpsError("Test SATA1 -> DP0: Error in DP0, RX") time.sleep(2) p = Process(target=rx_thread, args=(minic_sata1, size)) p.start() # Send the data time.sleep(1) print "DP0 tx: " for i in range(1, 10): #minic_sata.send(); minic_dp0.test_tx() time.sleep(1) print "Transmitted [" + str(i) + "]" print "Done" if (p.is_alive()): p.terminate() raise TpsError("Test DP0 -> SATA1: Error in SATA 1, RX")
#! /usr/bin/env python # coding: utf8 import sys import rr if __name__ == '__main__': # bind to the Gennum kit card = rr.Gennum() # Find the physical addresses of the three first pages of the buffer pages = card.getplist() # get page list pages = pages[:3] # list slicing: get only 0, 1, 2 page pages = [ addr << 12 for addr in pages ] # shift by 12 bit # Change local bus frequency to 100MHz print 'Set local bus freq to 100MHz' card.iwrite(4, 0x0808, 4, 0xe001f07c) # Gennum config for interrupt generation from GPIO card.iwrite(4, 0x0A04, 4, 0x00000100) # set GPIO8 as input card.iwrite(4, 0x0A1C, 4, 0x0000FEFF) # set GPIO interrupt mask card.iwrite(4, 0x0A18, 4, 0x00000100) # set GPIO interrupt mask card.iwrite(4, 0x0A28, 4, 0x00000100) # set GPIO8 polarity to rising edge card.iwrite(4, 0x0820, 4, 0x00008000) # enable GPIO interrupt on INT0 line # Get pages 0-2 addresses address0 = pages[0] address1 = pages[1]
def main(default_directory='.'): path_fpga_loader = '../firmwares/fpga_loader' path_firmware = '../firmwares/test07.bin' firmware_loader = os.path.join(default_directory, path_fpga_loader) bitstream = os.path.join(default_directory, path_firmware) os.system(firmware_loader + ' ' + bitstream) time.sleep(2) # Objects declaration spec = rr.Gennum() # bind to the SPEC board gennum = gn4124.CGN4124(spec, GN4124_CSR) print '\n### Configuration ###' # Set local bus frequency gennum.set_local_bus_freq(160) print("GN4124 local bus frequency: %d") % gennum.get_local_bus_freq() print '\nStart test' # Get host memory pages physical address pages = gennum.get_physical_addr() num_addr_lines = 64 num_data_lines = 16 if (len(pages) < (num_addr_lines + 2)): raise Exception("Not enough pages") # Clear memory pages gennum.set_memory_page(0, 0x0) gennum.set_memory_page(1, 0xFFFFFFFF) gennum.set_memory_page(2, 0x0) dma_length = 0x400 # DMA length in bytes t1 = time.time() print "Test Address lines" print "Checking if some pin is tied to GND" error = 0 for i in range(num_addr_lines): gennum.add_dma_item(0, pages[2], dma_length, 1, 1) gennum.add_dma_item(0, pages[3], dma_length, 0, 0) gennum.start_dma() gennum.wait_irq() for j in range(num_addr_lines / 2): if (i != 2 * j): gennum.add_dma_item((1 << 2 * j), pages[2], dma_length, 1, 1) gennum.add_dma_item((1 << 2 * j), pages[4 + 2 * j], dma_length, 0, 0) gennum.start_dma() gennum.wait_irq() if ((2 * j + 1) != i): gennum.add_dma_item((1 << (2 * j + 1)), pages[2], dma_length, 1, 1) gennum.add_dma_item((1 << (2 * j + 1)), pages[4 + (2 * j + 1)], dma_length, 0, 0) gennum.start_dma() gennum.wait_irq() gennum.add_dma_item((1 << i), pages[1], dma_length, 1, 1) gennum.add_dma_item((1 << i), pages[4 + i], dma_length, 0, 0) gennum.start_dma() gennum.wait_irq() page_data = [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ] for j in range(num_addr_lines): page_data[j] = gennum.get_memory_page(3 + j) if (j == (i + 1)): if (page_data[j][0] != 0xFFFFFFFF): print( "\n### Compare error (pin is tied to GND?) @ addr line: %d wr:0x%.8X rd:0x%.8X" ) % (j, 0xFFFFFFFF, page_data[j][0]) error = 1 else: if (page_data[j][0] != 0x0): print( "\n### Compare error (pin is tied to GND?) @ addr line: %d wr:0x%.8X rd:0x%.8X" ) % (j, 0x0, page_data[j][0]) error = 1 print "Checking if some pin is tied to Vcc" addr_mask = 0xFFFFFFFFFFFFFFFF for i in range(num_addr_lines): gennum.add_dma_item(addr_mask, pages[2], dma_length, 1, 1) gennum.add_dma_item(addr_mask, pages[3], dma_length, 0, 0) gennum.start_dma() gennum.wait_irq() for j in range(num_addr_lines / 2): if (i != 2 * j): gennum.add_dma_item(addr_mask & (~(1 << 2 * j)), pages[2], dma_length, 1, 1) gennum.add_dma_item(addr_mask & (~(1 << 2 * j)), pages[4 + 2 * j], dma_length, 0, 0) gennum.start_dma() gennum.wait_irq() if ((2 * j + 1) != i): gennum.add_dma_item(addr_mask & (~(1 << 2 * j)), pages[2], dma_length, 1, 1) gennum.add_dma_item(addr_mask & (~(1 << 2 * j)), pages[4 + (2 * j + 1)], dma_length, 0, 0) gennum.start_dma() gennum.wait_irq() gennum.add_dma_item(addr_mask & (~(1 << i)), pages[1], dma_length, 1, 1) gennum.add_dma_item(addr_mask & (~(1 << i)), pages[4 + i], dma_length, 0, 0) gennum.start_dma() gennum.wait_irq() page_data = [ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 ] for j in range(num_addr_lines): page_data[j] = gennum.get_memory_page(3 + j) if (j == (i + 1)): if (page_data[j][0] != 0xFFFFFFFF): print( "\n### Compare error (pin is tied to Vcc?) @ addr line:0x%.8X wr:0x%.8X rd:0x%.8X" ) % (j, 0xFFFFFFFF, page_data[j][0]) error = 1 else: if (page_data[j][0] != 0x0): print( "\n### Compare error (pin is tied to Vcc?) @ addr line:0x%.8X wr:0x%.8X rd:0x%.8X" ) % (j, 0x0, page_data[j][0]) error = 1 if (error): print "RESULT: [FAILED]" raise TpsError( "Error in DDR address lines. Please check log file for more information" ) else: print "RESULT: [OK]" print "Test Data lines" error = 0 for i in range(num_data_lines): gennum.set_memory_page(1, (1 << i)) gennum.add_dma_item(0, pages[1], dma_length, 1, 1) gennum.add_dma_item(0, pages[2], dma_length, 0, 0) gennum.start_dma() gennum.wait_irq() page_data = gennum.get_memory_page(2) if (page_data[0] != (1 << i)): print("### Compare error @ data line:0x%.8X wr:0x%.8X rd:0x%.8X" ) % (i, (1 << i), page_data[0]) error = 1 if (error): print "RESULT: [FAILED]" raise TpsError( "Error in DDR data lines. Please check log file for more information" ) else: print "RESULT: [OK]" t2 = time.time() print 'End of test' print 'Time DDR test: ' + str(t2 - t1) + ' seconds'
def preloop(self): print 'Initializing...' self.gennum = rr.Gennum() self.do_info('') self.prompt = 'rr> '
def do_getdmasize(self, args): print hex(self.gennum.getdmasize()) def do_getplist(self, args): plist = self.gennum.getplist() width = 8 for i, addr in enumerate(plist): if i % width == 0: print '%08x ' % i, addr <<= 12 print '%08x ' % addr, if i % width == width - 1: print else: if i % width != width - 1: print def emptyline(self): pass def do_EOF(self, args): return True do_quit = do_exit = do_EOF if __name__ == '__main__': gennum = rr.Gennum() cmd = RrCmd() cmd.cmdloop()