def __init__(self, ddr):
GPIOBank.__init__(
self,
'zynq_gpio',
self.FP_GPIO_OFFSET + self.EMIO_BASE,
0xFFF, # use_mask
ddr)
def __init__(self):
GPIOBank.__init__(
self,
'zynq_gpio',
self.BP_GPIO_OFFSET + self.EMIO_BASE,
0x7, # use_mask
0x7, # ddr
)
def __init__(self, ddr):
GPIOBank.__init__(
self,
{'label': 'zynq_gpio'},
self.FP_GPIO_OFFSET + self.EMIO_BASE,
0xFF, # use_mask
ddr
)
def __init__(self):
GPIOBank.__init__(
self,
{'label': 'zynq_gpio'},
self.BP_GPIO_OFFSET + self.EMIO_BASE,
0x7, # use_mask
0x7, # ddr
)
def __init__(self, slot_idx):
pwr_base = self.EMIO_BASE + 2*slot_idx
GPIOBank.__init__(
self,
{'label': 'zynq_gpio'},
pwr_base,
0x3, # use_mask
0x3, # ddr
)
def get_gpio_controls():
"""
Instantiates an object to control JTAG related GPIO pins
Bank 3 - Pin 0: Allows toggle of JTAG Enable and additional signals
Bank 3 - Pin 1: JTAG Enable signal to the CPLD
"""
# Bank 3 starts at pin 78
offset = 78
mask = 0x03
ddr = 0x03
return GPIOBank({'label': 'zynqmp_gpio'}, offset, mask, ddr)
