sim_speed = 10 # 10 is 1x realtime
availableFPGAs = [rawxem.GetDeviceListSerial(i) for i in xrange(count)]
print availableFPGAs
""" Device registration """
#for i in xrange(count):
#serX = rawxem.GetDeviceListSerial(i)
#print "serial = ", serX
#nerfModel = FpgaDevice(serX, BIT_FILE_LIST[i])
#nerfModel.onClkRate(10) # 1x realtime
#xemList.append(nerfModel)
""" Typing in the series numbers directly for each boards"""
""" working board choices: 1137000222 / 1201000216/ 12320003RM / 12320003RN """
"""By 012514: '0000000550', '000000053X', '000000054K', '11160001CJ', '12320003RN', '12430003T2'"""
nerfModel = FpgaDevice("12320003RN", BIT_FILE_LIST[0]) # BS
print "serial = 12320003RN \n"
nerfModel.onClkRate(sim_speed) # 1x realtime
xemList.append(nerfModel)
nerfModel = FpgaDevice("12430003T2", BIT_FILE_LIST[1]) # BM
print "serial = 12430003T2 \n"
nerfModel.onClkRate(sim_speed) # 1x realtime
xemList.append(nerfModel)
nerfModel = FpgaDevice("000000054K", BIT_FILE_LIST[0]) # TS
print "serial = 000000054K \n"
nerfModel.onClkRate(sim_speed) # 1x realtime
xemList.append(nerfModel)
nerfModel = FpgaDevice("0000000550", BIT_FILE_LIST[1]) # TM
print "serial = 0000000550 \n"
nerfModel.onClkRate(sim_speed) # 1x realtime
##
rawxem = ok.FrontPanel()
# count = 2
count = rawxem.GetDeviceCount()
print "Found %d devices" % count
assert count == 2, "Missing enough FPGA boards!"
xemList = []
# BIT_FILE_LIST = [BIT_FILE]
for i in xrange(count):
serX = rawxem.GetDeviceListSerial(i)
print "serial = ", serX
nerfModel = FpgaDevice(serX, BIT_FILE_LIST[i])
nerfModel.onClkRate(10) # 1x realtime
xemList.append(nerfModel)
# test WaveGen
import os
from WaveGen.utils import importPluginModulesIn, findPluginCreator
plugin_path = os.path.dirname(WaveGen.__file__) + "/plugins"
plugin_name = "Sine"
available_plugins = importPluginModulesIn(plugin_path)
plugin_creator = findPluginCreator(plugin_name, available_plugins)
# sampling rate 1024
param = {"SAMPLING_RATE": 128, "BIAS": 0.0, "F": 1.0, "AMP": 20.0}
