def __init__(self):
TargetTemplate.__init__(self)
readers = pluginmanager.getPluginsInDictFromPackage(
"chipwhisperer.capture.targets.smartcard_readers", True, True)
protocols = pluginmanager.getPluginsInDictFromPackage(
"chipwhisperer.capture.targets.smartcard_protocols", True, True)
self.driver = None
self.protocol = None
self.params.addChildren([{
'name': 'Reader Hardware',
'type': 'list',
'values': readers,
'get': self.getConnection,
'set': self.setConnection
}, {
'name': 'SmartCard Protocol',
'type': 'list',
'values': protocols,
'get': self.getProtocol,
'set': self.setProtocol
}, {
'name': 'SmartCard Explorer Dialog',
'type': 'action',
'action': lambda _: self.getScgui().show()
}])
def __init__(self):
TargetTemplate.__init__(self)
self.hdev = HIDSPI()
self.keylength = 16
self.params.addChildren([
{'name':'Jump to Bootloader', 'type':'action', 'action':self.hdev.jumpBootloader}
])
def __init__(self):
TargetTemplate.__init__(self)
self.getParams().addChildren([
{'name': 'USB Serial #:', 'key': 'serno', 'type': 'list', 'values': ['Press Refresh'], 'value': 'Press Refresh'},
{'name': 'Enumerate Attached Devices', 'key': 'pushsno', 'type': 'action', 'action': self.refreshSerial},
])
self.sasebo = None
def __init__(self):
TargetTemplate.__init__(self)
self.hdev = HIDSPI()
self.keylength = 16
self.params.addChildren([{
'name': 'Jump to Bootloader',
'type': 'action',
'action': self.hdev.jumpBootloader
}])
def __init__(self):
TargetTemplate.__init__(self)
self.getParams().addChildren([
{'name': 'USB Serial #:', 'key': 'serno', 'type': 'list', 'values': ['Press Refresh'], 'value': 'Press Refresh'},
{'name': 'Enumerate Attached Devices', 'key': 'pushsno', 'type': 'action', 'action': lambda _: self.refreshSerial()},
])
self.sasebo = None
def __init__(self):
TargetTemplate.__init__(self)
spi_cons = pluginmanager.getPluginsInDictFromPackage(
"chipwhisperer.capture.targets.spiflash_programmers", True, True)
self.spi = None
for c in spi_cons:
if c is not None:
self.spi = c
break
self.input = ""
self.textlength = 16
chip_names = []
for c in self.supported_chips:
chip_names.append(c['name'])
self._chip = self.supported_chips[0]
self.params.addChildren([
{
'name': 'Connection',
'type': 'list',
'key': 'con',
'values': spi_cons,
'get': self.getConnection,
'set': self.setConnection
},
{
'name': 'Input Length (Bytes)',
'type': 'int',
'range': (1, 512),
'default': 16,
'get': self.textLen,
'set': self.setTextLen
},
{
'name': 'Write Address (Hex)',
'key': 'addr',
'type': 'str',
'value': '0x1000'
},
{
'name': 'Flash Chip',
'type': 'list',
'values': chip_names,
'get': self.chipname,
'set': self.setChipname
},
])
if self.spi:
self.setConnection(self.spi, blockSignal=True)
def __init__(self):
TargetTemplate.__init__(self)
readers = pluginmanager.getPluginsInDictFromPackage("chipwhisperer.capture.targets.smartcard_readers", True, True)
protocols = pluginmanager.getPluginsInDictFromPackage("chipwhisperer.capture.targets.smartcard_protocols", True, True)
self.driver = None
self.protocol = None
self.params.addChildren([
{'name':'Reader Hardware', 'type':'list', 'values':readers, 'get':self.getConnection, 'set':self.setConnection},
{'name':'SmartCard Protocol', 'type':'list', 'values':protocols, 'get':self.getProtocol, 'set':self.setProtocol},
{'name':'SmartCard Explorer Dialog', 'type':'action', 'action':lambda _: self.getScgui().show()}
])
def __init__(self):
TargetTemplate.__init__(self)
ser_cons = pluginmanager.getPluginsInDictFromPackage("chipwhisperer.capture.targets.simpleserial_readers", True, False)
self.ser = ser_cons[SimpleSerial_ChipWhispererLite._name]
self._active_ms = 10
self._delay_ms = 0
self.params.addChildren([
{'name':'Crash', 'type':'bool', 'key':'crash', 'default':True, 'get':self.getCrash, 'set':self.setCrash, 'psync': True}
])
self._crash = True
return
def __init__(self, parentParam=None):
TargetTemplate.__init__(self, parentParam)
self._naeusb = NAEUSB()
self.pll = PLLCDCE906(self._naeusb, ref_freq = 12.0E6, parent=self)
self.fpga = FPGA(self._naeusb)
self.hw = None
# self._fpgabs = QSettings().value("cw305-bitstream", '')
self.oa = None
self._woffset = 0x400
self.params.addChildren([
{'name':'PLL Settings', 'key':'pll', 'type':'group', 'children':[
{'name':'Enabled', 'key':'pllenabled', 'type':'bool', 'default':False, 'set':self.pll.pll_enable_set, 'get':self.pll.pll_enable_get, 'psync':False},
{'name':'CLK-SMA (X6)', 'key':'pll0', 'type':'group', 'children':[
{'name':'CLK-SMA Enabled', 'key':'pll0enabled', 'type':'bool', 'default':False, 'set':partial(self.pll.pll_outenable_set, outnum=0), 'get':partial(self.pll.pll_outenable_get, outnum=0), 'psync':False},
{'name':'CLK-SMA Source', 'key':'pll0source', 'type':'list', 'values':['PLL0', 'PLL1', 'PLL2'], 'default':'PLL0', 'set':partial(self.pll.pll_outsource_set, outnum=0), 'get':partial(self.pll.pll_outsource_get, outnum=0), 'psync':False},
{'name':'CLK-SMA Slew Rate', 'key':'pll0slew', 'type':'list', 'values':['+3nS', '+2nS', '+1nS', '+0nS'], 'default':'+0nS', 'set':partial(self.pll.pll_outslew_set, outnum=0), 'get':partial(self.pll.pll_outslew_get, outnum=0), 'psync':False},
{'name':'PLL0 Frequency', 'key':'pll0freq', 'type':'float', 'limits':(0.625E6, 167E6), 'default':0, 'step':1E6,
'siPrefix':True, 'suffix':'Hz', 'set':partial(self.pll.pll_outfreq_set, outnum=0), 'get':partial(self.pll.pll_outfreq_get, outnum=0), 'psync':False},
]},
{'name':'CLK-N13 (FGPA Pin N13)', 'key':'pll1', 'type':'group', 'children':[
{'name':'CLK-N13 Enabled', 'key':'pll1enabled', 'type':'bool', 'default':False, 'set':partial(self.pll.pll_outenable_set, outnum=1), 'get':partial(self.pll.pll_outenable_get, outnum=1), 'psync':False},
{'name':'CLK-N13 Source', 'key':'pll1source', 'type':'list', 'values':['PLL1'], 'value':'PLL1'},
{'name':'CLK-N13 Slew Rate', 'key':'pll1slew', 'type':'list', 'values':['+3nS', '+2nS', '+1nS', '+0nS'], 'default':'+0nS', 'set':partial(self.pll.pll_outslew_set, outnum=1), 'get':partial(self.pll.pll_outslew_get, outnum=1), 'psync':False},
{'name':'PLL1 Frequency', 'key':'pll1freq', 'type':'float', 'limits':(0.625E6, 167E6), 'default':0, 'step':1E6,
'siPrefix':True, 'suffix':'Hz', 'set':partial(self.pll.pll_outfreq_set, outnum=1), 'get':partial(self.pll.pll_outfreq_get, outnum=1), 'psync':False},
]},
{'name':'CLK-E12 (FGPA Pin E12)', 'key':'pll2', 'type':'group', 'children':[
{'name':'CLK-E12 Enabled', 'key':'pll2enabled', 'type':'bool', 'default':False, 'set':partial(self.pll.pll_outenable_set, outnum=2), 'get':partial(self.pll.pll_outenable_get, outnum=2), 'psync':False},
{'name':'CLK-E12 Source', 'key':'pll2source', 'type':'list', 'values':['PLL2'], 'value':'PLL2'},
{'name':'CLK-E12 Slew Rate', 'key':'pll2slew', 'type':'list', 'values':['+0nS', '+1nS', '+2nS', '+3nS'], 'default':'+0nS', 'set':partial(self.pll.pll_outslew_set, outnum=2), 'get':partial(self.pll.pll_outslew_get, outnum=2), 'psync':False},
{'name':'PLL2 Frequency', 'key':'pll2freq', 'type':'float', 'limits':(0.625E6, 167E6), 'default':0, 'step':1E6,
'siPrefix':True, 'suffix':'Hz', 'set':partial(self.pll.pll_outfreq_set, outnum=2), 'get':partial(self.pll.pll_outfreq_get, outnum=2), 'psync':False},
]},
{'name':'Save as Default (stored in EEPROM)', 'type':'action', 'action':lambda _ : self.pll.pll_writedefaults()},
]},
{'name':'Disable CLKUSB For Capture', 'key':'clkusbautooff', 'type':'bool', 'value':True},
{'name':'Time CLKUSB Disabled for', 'key':'clksleeptime', 'type':'int', 'range':(1, 50000), 'value':50, 'suffix':'mS'},
{'name':'CLKUSB Manual Setting', 'key':'clkusboff', 'type':'bool', 'value':True, 'action':self.usb_clk_setenabled_action},
{'name':'Send Trigger', 'type':'action', 'action':self.usb_trigger_toggle},
{'name':'VCC-INT', 'key':'vccint', 'type':'float', 'default':1.00, 'range':(0.6, 1.10), 'suffix':' V', 'decimals':3, 'set':self.vccint_set, 'get':self.vccint_get},
{'name':'FPGA Bitstream', 'type':'group', 'children':[
{'name':'Bitstream File', 'key':'fpgabsfile', 'type':'file', 'value':"", "filter":'*.bit'},
{'name':'Program FPGA', 'type':'action', 'action':self.gui_programfpga},
]},
])
def __init__(self):
TargetTemplate.__init__(self)
self._naeusb = NAEUSB()
self.pll = PLLCDCE906(self._naeusb, ref_freq = 12.0E6, parent=self)
self.fpga = FPGA(self._naeusb)
self.hw = None
# self._fpgabs = QSettings().value("cw305-bitstream", '')
self.oa = None
self._woffset = 0x400
self.params.addChildren([
{'name':'PLL Settings', 'key':'pll', 'type':'group', 'children':[
{'name':'Enabled', 'key':'pllenabled', 'type':'bool', 'default':False, 'set':self.pll.pll_enable_set, 'get':self.pll.pll_enable_get, 'psync':False},
{'name':'CLK-SMA (X6)', 'key':'pll0', 'type':'group', 'children':[
{'name':'CLK-SMA Enabled', 'key':'pll0enabled', 'type':'bool', 'default':False, 'set':partial(self.pll.pll_outenable_set, outnum=0), 'get':partial(self.pll.pll_outenable_get, outnum=0), 'psync':False},
{'name':'CLK-SMA Source', 'key':'pll0source', 'type':'list', 'values':['PLL0', 'PLL1', 'PLL2'], 'default':'PLL0', 'set':partial(self.pll.pll_outsource_set, outnum=0), 'get':partial(self.pll.pll_outsource_get, outnum=0), 'psync':False},
{'name':'CLK-SMA Slew Rate', 'key':'pll0slew', 'type':'list', 'values':['+3nS', '+2nS', '+1nS', '+0nS'], 'default':'+0nS', 'set':partial(self.pll.pll_outslew_set, outnum=0), 'get':partial(self.pll.pll_outslew_get, outnum=0), 'psync':False},
{'name':'PLL0 Frequency', 'key':'pll0freq', 'type':'float', 'limits':(0.625E6, 167E6), 'default':0, 'step':1E6,
'siPrefix':True, 'suffix':'Hz', 'set':partial(self.pll.pll_outfreq_set, outnum=0), 'get':partial(self.pll.pll_outfreq_get, outnum=0), 'psync':False},
]},
{'name':'CLK-N13 (FGPA Pin N13)', 'key':'pll1', 'type':'group', 'children':[
{'name':'CLK-N13 Enabled', 'key':'pll1enabled', 'type':'bool', 'default':False, 'set':partial(self.pll.pll_outenable_set, outnum=1), 'get':partial(self.pll.pll_outenable_get, outnum=1), 'psync':False},
{'name':'CLK-N13 Source', 'key':'pll1source', 'type':'list', 'values':['PLL1'], 'value':'PLL1'},
{'name':'CLK-N13 Slew Rate', 'key':'pll1slew', 'type':'list', 'values':['+3nS', '+2nS', '+1nS', '+0nS'], 'default':'+0nS', 'set':partial(self.pll.pll_outslew_set, outnum=1), 'get':partial(self.pll.pll_outslew_get, outnum=1), 'psync':False},
{'name':'PLL1 Frequency', 'key':'pll1freq', 'type':'float', 'limits':(0.625E6, 167E6), 'default':0, 'step':1E6,
'siPrefix':True, 'suffix':'Hz', 'set':partial(self.pll.pll_outfreq_set, outnum=1), 'get':partial(self.pll.pll_outfreq_get, outnum=1), 'psync':False},
]},
{'name':'CLK-E12 (FGPA Pin E12)', 'key':'pll2', 'type':'group', 'children':[
{'name':'CLK-E12 Enabled', 'key':'pll2enabled', 'type':'bool', 'default':False, 'set':partial(self.pll.pll_outenable_set, outnum=2), 'get':partial(self.pll.pll_outenable_get, outnum=2), 'psync':False},
{'name':'CLK-E12 Source', 'key':'pll2source', 'type':'list', 'values':['PLL2'], 'value':'PLL2'},
{'name':'CLK-E12 Slew Rate', 'key':'pll2slew', 'type':'list', 'values':['+0nS', '+1nS', '+2nS', '+3nS'], 'default':'+0nS', 'set':partial(self.pll.pll_outslew_set, outnum=2), 'get':partial(self.pll.pll_outslew_get, outnum=2), 'psync':False},
{'name':'PLL2 Frequency', 'key':'pll2freq', 'type':'float', 'limits':(0.625E6, 167E6), 'default':0, 'step':1E6,
'siPrefix':True, 'suffix':'Hz', 'set':partial(self.pll.pll_outfreq_set, outnum=2), 'get':partial(self.pll.pll_outfreq_get, outnum=2), 'psync':False},
]},
{'name':'Save as Default (stored in EEPROM)', 'type':'action', 'action':lambda _ : self.pll.pll_writedefaults()},
]},
{'name':'Disable CLKUSB For Capture', 'key':'clkusbautooff', 'type':'bool', 'value':True},
{'name':'Time CLKUSB Disabled for', 'key':'clksleeptime', 'type':'int', 'range':(1, 50000), 'value':50, 'suffix':'mS'},
{'name':'CLKUSB Manual Setting', 'key':'clkusboff', 'type':'bool', 'value':True, 'action':self.usb_clk_setenabled_action},
{'name':'Send Trigger', 'type':'action', 'action':self.usb_trigger_toggle},
{'name':'VCC-INT', 'key':'vccint', 'type':'float', 'default':1.00, 'range':(0.6, 1.10), 'suffix':' V', 'decimals':3, 'set':self.vccint_set, 'get':self.vccint_get, 'step':0.01},
{'name':'FPGA Bitstream', 'type':'group', 'children':[
{'name':'Bitstream File', 'key':'fpgabsfile', 'type':'file', 'value':"", "filter":'*.bit'},
{'name':'Program FPGA', 'type':'action', 'action':self.gui_programfpga},
]},
])
def __init__(self):
TargetTemplate.__init__(self)
self.hw = None
conntypes = util.DictType()
conntypes['Select Interface type...'] = None
conntypes['CW Bitstream, with OpenADC'] = ChipWhispererComm(
standalone=False)
conntypes['CW Bitstream, no OpenADC'] = ChipWhispererComm(
standalone=True)
conntypes['Original Bitstream'] = FTDIComm()
self.fixedStart = True
self.hw = None
self.getParams().addChildren([
{
'name': 'Connection via:',
'key': 'conn',
'type': 'list',
'values': conntypes,
'set': self.setConn,
'get': self.getConn,
'default': None
},
{
'name': 'Reset FPGA',
'key': 'reset',
'type': 'action',
'action': self.reset,
'visible': False
},
{
'name': 'USB Serial #:',
'key': 'serno',
'type': 'list',
'values': ['Press Refresh'],
'value': 'Press Refresh',
'visible': False
},
{
'name': 'Enumerate Attached Devices',
'key': 'pushsno',
'type': 'action',
'action': self.refreshSerial,
'visible': False
},
])
def __init__(self, parentParam=None):
TargetTemplate.__init__(self, parentParam)
self.hw = None
conntypes = util.DictType()
conntypes['Select Interface type...'] = None
conntypes['CW Bitstream, with OpenADC'] = ChipWhispererComm(standalone=False)
conntypes['CW Bitstream, no OpenADC'] = ChipWhispererComm(standalone=True)
conntypes['Original Bitstream'] = FTDIComm()
self.fixedStart = True
self.hw = None
self.getParams().addChildren([
{'name':'Connection via:', 'key':'conn', 'type':'list', 'values':conntypes, 'set':self.setConn, 'get':self.getConn, 'default':None},
{'name':'Reset FPGA', 'key':'reset', 'type':'action', 'action':lambda _ : self.reset(), 'visible':False},
{'name':'USB Serial #:', 'key':'serno', 'type':'list', 'values':['Press Refresh'], 'value':'Press Refresh', 'visible':False},
{'name':'Enumerate Attached Devices', 'key':'pushsno', 'type':'action', 'action':lambda _ :self.refreshSerial(), 'visible':False},
])
def __init__(self):
TargetTemplate.__init__(self)
self.hw = None
conntypes = util.DictType()
conntypes["Select Interface type..."] = None
conntypes["CW Bitstream, with OpenADC"] = ChipWhispererComm(standalone=False)
conntypes["CW Bitstream, no OpenADC"] = ChipWhispererComm(standalone=True)
conntypes["Original Bitstream"] = FTDIComm()
self.fixedStart = True
self.hw = None
self.getParams().addChildren(
[
{
"name": "Connection via:",
"key": "conn",
"type": "list",
"values": conntypes,
"set": self.setConn,
"get": self.getConn,
"default": None,
},
{"name": "Reset FPGA", "key": "reset", "type": "action", "action": self.reset, "visible": False},
{
"name": "USB Serial #:",
"key": "serno",
"type": "list",
"values": ["Press Refresh"],
"value": "Press Refresh",
"visible": False,
},
{
"name": "Enumerate Attached Devices",
"key": "pushsno",
"type": "action",
"action": self.refreshSerial,
"visible": False,
},
]
)
def __init__(self):
TargetTemplate.__init__(self)
self.getParams().addChildren(
[
{
"name": "USB Serial #:",
"key": "serno",
"type": "list",
"values": ["Press Refresh"],
"value": "Press Refresh",
},
{
"name": "Enumerate Attached Devices",
"key": "pushsno",
"type": "action",
"action": self.refreshSerial,
},
]
)
self.sasebo = None
