def test_closed_loop_diagram():
'''Create a closed loop diagram.
Not many checks, except that it works fine!
'''
root = blocks.System('top level system')
# Main blocks:
src = blocks.Source('src', root)
K = 1
Ti = 0.1
ctrl = blocks.TransferFunction('controller', [1, K*Ti],[0, Ti], root) # PI control
plant = blocks.TransferFunction('plant', [1], [0, 1], root) # integrator
comp = blocks.Summation('compare', ops = ['+','-'], parent = root)
out = blocks.Sink(parent=root)
assert_is(ctrl.parent, root)
# Connect the blocks together
w0 = blocks.connect_systems(src, comp, d_pname='in0')
w1 = blocks.connect_systems(comp, ctrl)
w2 = blocks.connect_systems(ctrl, plant)
w3 = blocks.connect_systems(plant, comp, d_pname='in1')
w4 = blocks.connect_systems(plant, out)
# Check that the reuse of wires:
assert_equal(w3, w4)
print(root)
def test_simple_connection():
'''Connect a few TransferFunction blocks'''
r = blocks.System('root')
# Create three TF blocks
tf1 = blocks.TransferFunction('TF1', parent=r)
tf2 = blocks.TransferFunction('TF2', parent=r)
tf3 = blocks.TransferFunction('TF3', parent=r)
# Manual connection tf1 -> tf2:
w1 = blocks.SignalWire('w1', parent=r)
w1.connect_port(tf1.ports_dict['out']) # output of tf1
w1.connect_port(tf2.ports_dict['in']) # input of tf2
# Only one output port can be connected to a SignalWire:
with assert_raises(ValueError):
w1.connect_port(tf3.ports_dict['out'])
# Automated connection:
w2 = blocks.connect_systems(tf2,tf3)
# Check connection:
assert tf2.ports_dict['out'] in w2.ports
assert tf3.ports_dict['in'] in w2.ports
from __future__ import division, print_function
import blocks
root = blocks.System('CL control')
# Main blocks:
Src = blocks.Source('src', root)
K = 2; Ti = .2
Ctrl = blocks.TransferFunction('controller', [1, K*Ti],[0, Ti], root) # PI control
Plant = blocks.TransferFunction('plant', [1], [0, 1], root) # integrator
Cmp = blocks.Summation('compare', ops = ['+','-'], parent = root)
Out = blocks.Sink(parent=root)
w0 = blocks.connect_systems(Src, Cmp, d_pname='in0')
w1 = blocks.connect_systems(Cmp, Ctrl)
w2 = blocks.connect_systems(Ctrl, Plant)
w3 = blocks.connect_systems(Plant, Cmp, d_pname='in1')
w4 = blocks.connect_systems(Plant, Out)
assert w3 == w4
print(root)
print('Compute incidence matrix')
inc_mat = blocks.incidence_matrix(root)
print(inc_mat)
# Serialize/Deserialize:
#plant = blocks.TransferFunction('plant', [1], [0, 1], root) # integrator
plant = blocks.SISOSystem('plant', root) # generic plant
# Add subsystems inside the plant
integrator = blocks.TransferFunction('int', [1], [0, 1]) # integrator
plant.add_subsystem(integrator)
wp1 = blocks.SignalWire('wp1', parent=plant)
wp2 = blocks.SignalWire('wp2', parent=plant)
wp1.connect_by_name('plant','in','parent')
wp1.connect_by_name('int','in')
wp2.connect_by_name('plant','out','parent')
wp2.connect_by_name('int','out')
comp = blocks.Summation('compare', ops = ['+','-'], parent = root)
out = blocks.Sink('out',parent=root)
# Connect the blocks together
w0 = blocks.connect_systems(src, comp, d_pname='in0')
w1 = blocks.connect_systems(comp, ctrl)
w2 = blocks.connect_systems(ctrl, plant)
w3 = blocks.connect_systems(plant, comp, d_pname='in1')
w4 = blocks.connect_systems(plant, out)
### test laplace_output
u = symbols('u')
siso = blocks.SISOSystem('SISO')
print(laplace_output(siso, [u]))
print(laplace_output(ctrl, [u]))
### Tranfer function:
Y_expr,Y,U = transfer_syst(root, depth=1)
print(Y_expr,Y,U)
TF = sympy.simplify(Y_expr[0]/U[0])
