def test_correctness_3(self) -> None:
circuit = Circuit(5)
wide_gate = IdentityGate(3)
circuit.append_gate(HGate(), [1])
circuit.append_gate(CNOTGate(), [2, 3])
circuit.append_gate(wide_gate, [1, 2, 3])
circuit.append_gate(CNOTGate(), [1, 2])
circuit.append_gate(HGate(), [3])
circuit.append_gate(XGate(), [0])
circuit.append_gate(XGate(), [0])
circuit.append_gate(XGate(), [0])
circuit.append_gate(XGate(), [4])
circuit.append_gate(XGate(), [4])
circuit.append_gate(XGate(), [4])
utry = circuit.get_unitary()
circuit.fold(circuit.get_region([(0, 2), (1, 1), (2, 1)]))
assert circuit.get_num_operations() == 9
assert circuit.get_depth() == 3
assert circuit.count(HGate()) == 2
assert circuit.count(XGate()) == 6
assert isinstance(circuit[1, 1].gate, CircuitGate)
test_gate: CircuitGate = circuit[1, 1].gate
assert test_gate._circuit[0, 1].gate is CNOTGate()
assert test_gate._circuit[0, 2].gate is CNOTGate()
assert test_gate._circuit[1, 0].gate is wide_gate
assert test_gate._circuit[1, 1].gate is wide_gate
assert test_gate._circuit[1, 2].gate is wide_gate
check_no_idle_cycles(circuit)
assert np.allclose(utry.get_numpy(), circuit.get_unitary().get_numpy())
def test_through_middle_of_outside(self) -> None:
circuit = Circuit(3)
circuit.append_gate(CNOTGate(), (0, 1))
circuit.append_gate(HGate(), 0)
circuit.append_gate(HGate(), 1)
circuit.append_gate(CNOTGate(), (0, 2))
circuit.append_gate(CNOTGate(), (0, 1))
region = circuit.surround((1, 0), 2)
assert region == CircuitRegion({0: (0, 1), 1: (0, 1)})
def test_small_circuit_1(self) -> None:
circuit = Circuit(2)
circuit.append_gate(HGate(), 0)
circuit.append_gate(HGate(), 1)
circuit.append_gate(CNOTGate(), (0, 1))
circuit.append_gate(HGate(), 0)
circuit.append_gate(HGate(), 1)
region = circuit.surround((0, 1), 2)
assert region == CircuitRegion({0: (0, 2), 1: (0, 2)})
def fill_gate_defs(self) -> None:
"""Prefills gate definitions with built-in gates."""
self.gate_defs['U'] = GateDef('U', 3, 1, U3Gate())
self.gate_defs['u'] = GateDef('u', 3, 1, U3Gate())
self.gate_defs['u3'] = GateDef('u3', 3, 1, U3Gate())
self.gate_defs['u2'] = GateDef('u2', 2, 1, U2Gate())
self.gate_defs['u1'] = GateDef('u1', 1, 1, U1Gate())
self.gate_defs['cx'] = GateDef('cx', 0, 2, CXGate())
self.gate_defs['cy'] = GateDef('cy', 0, 2, CYGate())
self.gate_defs['cz'] = GateDef('cz', 0, 2, CZGate())
self.gate_defs['ch'] = GateDef('ch', 0, 2, CHGate())
self.gate_defs['swap'] = GateDef('swap', 0, 2, SwapGate())
self.gate_defs['id'] = GateDef('id', 0, 1, IdentityGate(1))
self.gate_defs['x'] = GateDef('x', 0, 1, XGate())
self.gate_defs['y'] = GateDef('y', 0, 1, YGate())
self.gate_defs['z'] = GateDef('z', 0, 1, ZGate())
self.gate_defs['h'] = GateDef('h', 0, 1, HGate())
self.gate_defs['s'] = GateDef('s', 0, 1, SGate())
self.gate_defs['sdg'] = GateDef('sdg', 0, 1, SdgGate())
self.gate_defs['t'] = GateDef('t', 0, 1, TGate())
self.gate_defs['tdg'] = GateDef('tdg', 0, 1, TdgGate())
self.gate_defs['rx'] = GateDef('rx', 1, 1, RXGate())
self.gate_defs['ry'] = GateDef('ry', 1, 1, RYGate())
self.gate_defs['rz'] = GateDef('rz', 1, 1, RZGate())
self.gate_defs['sx'] = GateDef('sx', 0, 1, SXGate())
self.gate_defs['sxdg'] = GateDef('sxdg', 0, 1, DaggerGate(SXGate()))
self.gate_defs['rxx'] = GateDef('rxx', 1, 2, RXXGate())
self.gate_defs['ryy'] = GateDef('ryy', 1, 2, RYYGate())
self.gate_defs['rzz'] = GateDef('rzz', 1, 2, RZZGate())
self.gate_defs['cu1'] = GateDef('cu1', 1, 2, ControlledGate(U1Gate()))
self.gate_defs['cu2'] = GateDef('cu2', 2, 2, ControlledGate(U2Gate()))
self.gate_defs['cu3'] = GateDef('cu3', 3, 2, ControlledGate(U3Gate()))
def qft(circ, n): # type: ignore
for j in range(n):
circ.append_gate(HGate(), [j])
for k in range(j + 1, n):
circ.append_gate(
ControlledGate(U1Gate()),
[
k,
j,
],
[np.pi / float(2**(k - j))],
)
for j in range(int(np.floor(n / 2))):
circ.append_gate(SwapGate(), [j, n - j - 1])
def input_state(circ, n): # type: ignore
for j in range(n):
circ.append_gate(HGate(), [j])
circ.append_gate(U1Gate(), [j], [-np.pi / float(2**(j))])