def __init__(self, dut): self.dut = dut self.output_mon = UartTxOMonitor(dut, "o", dut.clk, int(self.dut.BAUD), reset_n=dut.rstn) self.input_mon = UartTxIMonitor(dut, "i", dut.clk, int(self.dut.BAUD), reset_n=dut.rstn, callback=self.tx_model) self.input_drv = UartTxDriver(dut, "i", dut.clk) #initializer only self.etx = BinaryValue(1) self.eready = BinaryValue(0) self.output_expected = [{ 'tx': self.etx, 'ready': self.eready }] #i don't think this should be necessary... self.scoreboard = Scoreboard(dut) #self.output_mon.log.setLevel(logging.DEBUG) #scoreboard is where results are checked. On each transaction of the output_mon, it'll compare against the #next transaction in the list output_expected. Output_expected gets updated by the tx_model. tx_model is the #callback function of the input monitor. So the expected output gets appended to when the input changes. # its not obvious if on the same simulation cycle you can force the tx_model to get called before the # scoreboard gets called on self.scoreboard.add_interface(self.output_mon, self.output_expected) self.baud_rate = int(self.dut.BAUD) - 1 self.baud_count = 0 self.shifter = 0
def __init__(self, dut, init_val): """ Setup the testbench. *init_val* signifies the ``BinaryValue`` which must be captured by the output monitor with the first rising clock edge. This must match the initial state of the D flip-flop in RTL. """ # Some internal state self.dut = dut self.stopped = False # Create input driver and output monitor self.input_drv = BitDriver(signal=dut.d, clk=dut.c, generator=input_gen()) self.output_mon = BitMonitor(name="output", signal=dut.q, clk=dut.c) # Create a scoreboard on the outputs self.expected_output = [init_val ] # a list with init_val as the first element self.scoreboard = Scoreboard(dut) self.scoreboard.add_interface(self.output_mon, self.expected_output) # Use the input monitor to reconstruct the transactions from the pins # and send them to our 'model' of the design. self.input_mon = BitMonitor(name="input", signal=dut.d, clk=dut.c, callback=self.model)
def __init__(self, dut): """ Setup testbench. """ # Some internal state self.dut = dut self.stopped = False # Create input driver and output monitor self.input_drv = BitDriver(dut.enable, dut.clk, input_gen()) dut.enable <= 0 self.output_mon = BitMonitor("output", dut.impulse, dut.clk) # Create a scoreboard on the outputs self.expected_output = [BinaryValue(0, 1)] self.scoreboard = Scoreboard(dut) self.scoreboard.add_interface(self.output_mon, self.expected_output) # Reconstruct the input transactions from the pins # and send them to our 'model' self.input_mon = BitMonitor("input", dut.enable, dut.clk, callback=self.model) # Model variables self.triggered = False self.counter = 0
def __init__(self, dut): self.dut = dut self.output_rx_mon = UartRxOMonitor(dut, "o", dut.clk, int(self.dut.BAUD), reset_n=dut.rstn) self.input_rx_mon = UartRxMonitor(dut.i_rx, dut.clk, int(self.dut.BAUD), reset_n=dut.rstn, callback=self.rx_model) self.output_expected = [{ "rx_data_valid": 0, "rx_data": 0 }] # necessary because order of calls self.scoreboard = Scoreboard(dut) self.scoreboard.add_interface(self.output_rx_mon, self.output_expected) self.output_rx_mon.log.setLevel(logging.INFO) self.input_rx_mon.log.setLevel(logging.INFO) self.dut._log.setLevel(logging.INFO) self.scoreboard.log.setLevel(logging.INFO) self.dut.i_rx <= 1 self.bits = 0 self.shift = 0 self.last_reset = False
async def test_tdata(dut, packets_num=5, packet_size=(10, 100), delay=-1, consecutive_transfers=0): """Test TDATA""" tdata_width = dut.C_S_AXIS_TDATA_WIDTH.value.integer axis_m = Axi4StreamMaster(dut, "s_axis", dut.aclk) axis_s = Axi4StreamSlave(dut, "m_axis", dut.aclk, delay, consecutive_transfers) axis_monitor = Axi4Stream(dut, "m_axis", dut.aclk, data_type="integer", packets=True) await setup_dut(dut) input = [] output = [] # Build the input and output packets for i in range(packets_num): input.append([randint(0, 2**tdata_width - 1) for i in range(randint(*packet_size))]) output.append([word ^ 2**tdata_width - 1 for word in input[-1]]) scoreboard = Scoreboard(dut) scoreboard.add_interface(axis_monitor, output) # Write the input packets for packet in input: await axis_m.write(packet) # Wait until output is empty (so, all the packets have been received) while output: await RisingEdge(dut.aclk) await RisingEdge(dut.aclk)
def __init__(self, dut, codec, debug=False): dut._log.info("Preparing tb for padder, codec={codec}") self.dut = dut self.codec = codec # sha_type_actual self.sha = Sha.get_method(codec=codec) self.s_axis = AXIS_Driver(dut, "s_axis", dut.axis_aclk) self.backpressure = BitDriver(dut.m_axis_tready, dut.axis_aclk) self.m_axis = AXIS_Monitor(dut, "m_axis", dut.axis_aclk) self.expected_output = [] # Create a scoreboard on the m_axis bus with warnings.catch_warnings(): warnings.simplefilter("ignore") self.scoreboard = Scoreboard(dut) self.scoreboard.add_interface(self.m_axis, self.expected_output) # Reconstrut the input transactions self.s_axis_recovered = AXIS_Monitor(dut, "s_axis", dut.axis_aclk, callback=self.model) level = logging.DEBUG if debug else logging.WARNING self.s_axis.log.setLevel(level) self.s_axis_recovered.log.setLevel(level)
def __init__(self, dut, init_val): """ Setup testbench. init_val signifies the BinaryValue which must be captured by the output monitor with the first risign edge. This is actually the initial state of the flip-flop. """ # Some internal state self.dut = dut self.stopped = False # Create input driver and output monitor self.input_drv = BitDriver(dut.d, dut.c, input_gen()) self.output_mon = BitMonitor("output", dut.q, dut.c) # Create a scoreboard on the outputs self.expected_output = [ init_val ] self.scoreboard = Scoreboard(dut) self.scoreboard.add_interface(self.output_mon, self.expected_output) # Reconstruct the input transactions from the pins # and send them to our 'model' self.input_mon = BitMonitor("input", dut.d, dut.c, callback=self.model)
def __init__(self, dut, debug=False): self.dut = dut self.stream_in = AvalonSTDriver(dut, "stream_in", dut.clk) self.backpressure = BitDriver(self.dut.stream_out_ready, self.dut.clk) self.stream_out = AvalonSTMonitor( dut, "stream_out", dut.clk, config={'firstSymbolInHighOrderBits': True}) self.csr = AvalonMaster(dut, "csr", dut.clk) cocotb.fork( stream_out_config_setter(dut, self.stream_out, self.stream_in)) # Create a scoreboard on the stream_out bus self.pkts_sent = 0 self.expected_output = [] with warnings.catch_warnings(): warnings.simplefilter("ignore") self.scoreboard = Scoreboard(dut) self.scoreboard.add_interface(self.stream_out, self.expected_output) # Reconstruct the input transactions from the pins # and send them to our 'model' self.stream_in_recovered = AvalonSTMonitor(dut, "stream_in", dut.clk, callback=self.model) # Set verbosity on our various interfaces level = logging.DEBUG if debug else logging.WARNING self.stream_in.log.setLevel(level) self.stream_in_recovered.log.setLevel(level)
def mean_mdv_test(dut): """ Test using functional coverage measurements and Constrained-Random mechanisms. Generates random transactions until coverage defined in Driver reaches 100% """ dut_out = StreamBusMonitor(dut, "o", dut.clk) dut_in = StreamBusDriver(dut, "i", dut.clk) exp_out = [] scoreboard = Scoreboard(dut) scoreboard.add_interface(dut_out, exp_out) data_width = int(dut.DATA_WIDTH.value) bus_width = int(dut.BUS_WIDTH.value) dut._log.info('Detected DATA_WIDTH = %d, BUS_WIDTH = %d' % (data_width, bus_width)) cocotb.fork(clock_gen(dut.clk, period=clock_period)) dut.rst <= 1 for i in range(bus_width): dut.i_data[i] = 0 dut.i_valid <= 0 yield RisingEdge(dut.clk) yield RisingEdge(dut.clk) dut.rst <= 0 coverage1_hits = [] coverageN_hits = [] #define a constraint function, which prevents from picking already covered data def data_constraint(data): return (not data[0] in coverage1_hits) & (not data[bus_width - 1] in coverageN_hits) coverage = 0 xaction = StreamTransaction(bus_width, data_width) while coverage < 100: #randomize without constraint #xaction.randomize() #randomize with constraint if not "top.data1" in cocotb.coverage.coverage_db: xaction.randomize() else: coverage1_new_bins = cocotb.coverage.coverage_db[ "top.data1"].new_hits coverageN_new_bins = cocotb.coverage.coverage_db[ "top.dataN"].new_hits coverage1_hits.extend(coverage1_new_bins) coverageN_hits.extend(coverageN_new_bins) xaction.randomize_with(data_constraint) yield dut_in.send(xaction) exp_out.append(xaction.mean_value()) coverage = cocotb.coverage.coverage_db[ "top"].coverage * 100 / cocotb.coverage.coverage_db["top"].size dut._log.info("Current Coverage = %d %%", coverage)
def __init__(self, dut): self.dut = dut self.tlp_tx_st = AvalonSTMonitor(dut, 'tlp_tx_multiplexer_out', dut.clk) self.tlp_tx_recovered = AvalonSTMonitor(dut, 'tlp_tx_multiplexer_out', dut.clk, callback=self.tx_model) self.csr = AvalonMaster(dut, 'csr', dut.clk) self.expected_output = [] self.scoreboard = Scoreboard(dut) self.scoreboard.add_interface(self.tlp_tx_st, self.expected_output)
def __init__(self, dut, debug: bool = False): self._dut = dut self._fft_in = DecoupledDriver(self._dut, "in", self._dut.clock) self._fft_mon = FFTMonitor(self._dut, self._dut.clock) self._backpressure = BitDriver(self._dut.out_ready, self._dut.clock) self._scoreboard = Scoreboard(self._dut) self._scoreboard.add_interface(self._fft_mon._mon_out, self._fft_mon._expected_output)
def __init__(self, dut): self.dut = dut # TODO: See https://github.com/cocotb/cocotb/issues/2051 for Verilator freeze bug self.userrx = AvalonSTMonitor(dut, 'userrx', dut.rx_clk) self.tx_csr = AvalonMaster(dut, 'tx_mm', dut.tx_clk) self.rx_csr = AvalonMaster(dut, 'rx_mm', dut.rx_clk) self.expected_output = [] self.scoreboard = Scoreboard(dut) self.scoreboard.add_interface(self.userrx, self.expected_output)
def __init__(self, dut): self.dut = dut self.st_in = AvalonSTDriver(dut, 'st_in', dut.clk) self.st_out = AvalonSTMonitor(dut, 'st_out', dut.clk) self.csr = AvalonMaster(dut, 'csr', dut.clk) self.st_in_recovered = AvalonSTMonitor(dut, 'st_in', dut.clk, callback=self.model) self.expected_output = [] self.scoreboard = Scoreboard(dut) self.scoreboard.add_interface(self.st_out, self.expected_output)
def __init__(self, dut): self.dut = dut self.stream_in = AXI4ST(dut, "stream_in", dut.clk) self.stream_out = AXI4STMonitor(dut, "stream_out", dut.clk, callback=self.print_trans) self.expected_output = [] self.scoreboard = Scoreboard(dut, fail_immediately=True) self.scoreboard.add_interface(self.stream_out, self.expected_output) self.stream_in_recovered = AXI4STMonitor(dut, "stream_in", dut.clk, callback=self.model) self.stream_in_recovered.log.setLevel(30) self.stream_out.log.setLevel(30)
def __init__(self, dut): self.dut = dut self.clkedge = RisingEdge(dut.clk) self.stream_in = AvalonSTDriver(self.dut, "asi", dut.clk) self.stream_out = AvalonSTMonitor(self.dut, "aso", dut.clk) self.scoreboard = Scoreboard(self.dut, fail_immediately=True) self.expected_output = [] self.scoreboard.add_interface(self.stream_out, self.expected_output) self.backpressure = BitDriver(self.dut.aso_ready, self.dut.clk)
def __init__(self, dut, clkperiod=6.4): self.dut = dut dut._discover_all() # scan all signals on the design dut._log.setLevel(30) fork(Clock(dut.clk, clkperiod, 'ns').start()) self.payload_in = AXI4STPKts(dut, "payload_in", dut.clk) self.stream_out = AXI4STMonitor(dut, "packet_out", dut.clk, callback=self.print_trans) self.scoreboard = Scoreboard(dut, fail_immediately=False) self.expected_output = [] self.scoreboard.add_interface(self.stream_out, self.expected_output) self.nb_frame = 0 self.packet = BinaryValue()
def __init__(self, dut): self.dut = dut # Reconstruct the input transactions from the pins # and send them to our 'model' input_mon = InputMonitor("input", dut.A, dut.B, dut.clk, callback=self.adder_modelD) # Output monitor self.output_mon = OutMonitor("output", dut.X, dut.clk) # Create a scoreboard on the outputs self.expected_output = [] self.scoreboard = Scoreboard(dut) self.scoreboard.add_interface(self.output_mon, self.expected_output)
def __init__(self, dut): self.dut = dut self.stream_in = AXI4ST_driver(dut, "stream_in", dut.clk) #self.stream_in.log.setLevel(logging.DEBUG) self.stream_out = AXI4STMonitor(dut, "stream_out", dut.clk, callback=self.print_trans) self.expected_output = [] self.overrideModel = False # temp help to differentiate scapy to other send self.scoreboard = Scoreboard(dut, fail_immediately=False) self.scoreboard.add_interface(self.stream_out, self.expected_output) self.stream_in_recovered = AXI4STMonitor(dut, "stream_in", dut.clk, callback=self.model)
async def mean_randomised_test(dut): """Test mean of random numbers multiple times""" # dut_in = StreamBusMonitor(dut, "i", dut.clk) # this doesn't work: # VPI Error vpi_get_value(): # ERROR - Cannot get a value for an object of type vpiArrayVar. dut_out = StreamBusMonitor(dut, "o", dut.clk) exp_out = [] with warnings.catch_warnings(): warnings.simplefilter("ignore") scoreboard = Scoreboard(dut) scoreboard.add_interface(dut_out, exp_out) DATA_WIDTH = int(dut.DATA_WIDTH.value) BUS_WIDTH = int(dut.BUS_WIDTH.value) dut._log.info('Detected DATA_WIDTH = %d, BUS_WIDTH = %d' % (DATA_WIDTH, BUS_WIDTH)) cocotb.fork(Clock(dut.clk, CLK_PERIOD_NS, units='ns').start()) dut.rst <= 1 for i in range(BUS_WIDTH): dut.i_data[i] = 0 dut.i_valid <= 0 await RisingEdge(dut.clk) await RisingEdge(dut.clk) dut.rst <= 0 for j in range(10): nums = [] for i in range(BUS_WIDTH): x = random.randint(0, 2**DATA_WIDTH - 1) dut.i_data[i] = x nums.append(x) dut.i_valid <= 1 nums_mean = sum(nums) // BUS_WIDTH exp_out.append(nums_mean) await RisingEdge(dut.clk) dut.i_valid <= 0 await RisingEdge(dut.clk) await RisingEdge(dut.clk)
def __init__(self, dut): # Some internal state self.dut = dut self.stopped = False # Use the input monitor to reconstruct the transactions from the pins # and send them to our 'model' of the design. self.input_mon = BitMonitor(name="input", signal=dut.Zybo_Example_sw_in, clk=dut.clk, callback=self.model) # Create input driver and output monitor self.input_drv = BitDriver(signal=dut.Zybo_Example_sw_in, clk=dut.clk, generator=input_gen()) self.output_mon = BitMonitor(name="output", signal=dut.Zybo_Example_leds_out, clk=dut.clk) # Create a scoreboard on the outputs self.expected_output = [] self.scoreboard = Scoreboard(dut) self.scoreboard.add_interface(self.output_mon, self.expected_output)
def mean_randomised_test(dut): """ Test mean of random numbers multiple times """ # dut_in = StreamBusMonitor(dut, "i", dut.clk) # this doesn't work: # VPI Error vpi_get_value(): # ERROR - Cannot get a value for an object of type vpiArrayVar. dut_out = StreamBusMonitor(dut, "o", dut.clk) exp_out = [] scoreboard = Scoreboard(dut) scoreboard.add_interface(dut_out, exp_out) data_width = int(dut.DATA_WIDTH.value) bus_width = int(dut.BUS_WIDTH.value) dut._log.info('Detected DATA_WIDTH = %d, BUS_WIDTH = %d' % (data_width, bus_width)) cocotb.fork(clock_gen(dut.clk, period=clock_period)) dut.rst <= 1 for i in range(bus_width): dut.i_data[i] = 0 dut.i_valid <= 0 yield RisingEdge(dut.clk) yield RisingEdge(dut.clk) dut.rst <= 0 for j in range(10): nums = [] for i in range(bus_width): x = random.randint(0, 2**data_width - 1) dut.i_data[i] = x nums.append(x) dut.i_valid <= 1 nums_mean = sum(nums) // bus_width exp_out.append(nums_mean) yield RisingEdge(dut.clk) dut.i_valid <= 0
def __init__(self, dut, debug=False): self.dut = dut self.csrBase = 0x79040000 self.stream_in = STDriver(dut, "adc_0", dut.clock, big_endian=False, **stream_names) self.csr = MemMaster(dut, "s_axi", dut.s_axi_aclk, **lower_axil) self.memory = np.arange(1024 * 1024 * 1024, dtype=np.dtype('b')) self.mem = MemSlave(dut, "m_axi", dut.s_axi_aclk, memory=self.memory, **lower_axi) # self.stream_in_recovered = STMonitor(dut, "adc_0", dut.clock, **stream_names) self.stream_out = STMonitor( dut, "dac_0", dut.clock, **stream_names) #, callback = self.append_channel) self.expected_output = [] self.txdata = [] self.write_monitor = WriteMonitor(dut, "m_axi", dut.s_axi_aclk, **lower_axi) eq_block = dut.sAxiIsland.freqRx.freqRx.eq # self.eq_monitor_in = DecoupledMonitor(eq_block, "in", eq_block.clock, reset=eq_block.reset) fft_block = dut.sAxiIsland.freqRx.freqRx.fft # self.fft_mon = FFTMonitor(fft_block, fft_block.clock) self.scoreboard = Scoreboard(dut) # self.scoreboard.add_interface(self.stream_out, self.expected_output) # self.scoreboard.add_interface(self.write_monitor, self.txdata) level = logging.DEBUG if debug else logging.WARNING self.stream_in.log.setLevel(level) self.csr.log.setLevel(level) self.mem.log.setLevel(level) # self.stream_in_recovered.log.setLevel(level) self.channel_model = SISOChannel()
async def test_multiply(dut, a_data, b_data): """Test multiplication of many matrices.""" cocotb.fork(Clock(dut.clk_i, 10, units='ns').start()) # Configure Scoreboard to compare module results to expected expected_output = [] in_monitor = MatrixInMonitor(dut, callback=expected_output.append) out_monitor = MatrixOutMonitor(dut) scoreboard = Scoreboard(dut) scoreboard.add_interface(out_monitor, expected_output) # Initial values dut.valid_i <= 0 dut.a_i <= create_a(lambda x: 0) dut.b_i <= create_b(lambda x: 0) # Reset DUT dut.reset_i <= 1 for _ in range(3): await RisingEdge(dut.clk_i) dut.reset_i <= 0 # Do multiplication operations for A, B in zip(a_data(), b_data()): await RisingEdge(dut.clk_i) dut.a_i <= A dut.b_i <= B dut.valid_i <= 1 await RisingEdge(dut.clk_i) dut.valid_i <= 0 await RisingEdge(dut.clk_i) raise scoreboard.result
def __init__(self, dut): self.dut = dut self.stopped = False elements = dut.ELEMENTS.value self.lru = LeastRecentlyUsedDict(size_limit=elements) # initial state of LRU list for keyin in range(elements - 1, -1, -1): self.lru[keyin] = 1 init_val = elements - 1 self.input_drv = InputDriver(dut) self.output_mon = OutputMonitor(dut) # Create a scoreboard on the outputs self.expected_output = [init_val] self.scoreboard = Scoreboard(dut) self.scoreboard.add_interface(self.output_mon, self.expected_output) # Reconstruct the input transactions from the pins # and send them to our 'model' self.input_mon = InputMonitor(dut, callback=self.model)
def __init__(self, dut, debug=False): self.dut = dut self.stream_in = STDriver(dut, "ValNamein_0", dut.clock, name_map=axi4stream_chisel_name_map) self.backpressure = BitDriver(self.dut.out_0_ready, self.dut.clock) self.stream_out = STMonitor(dut, "out_0", dut.clock, name_map=axi4stream_chisel_name_map) self.csr = MemMaster(dut, "ValNameioMem_0", dut.clock, name_map=axi4_chisel_name_map) self.set_rotation(0) # Reconstruct the input transactions from the pins # and send them to our 'model' self.stream_in_recovered = STMonitor( dut, "ValNamein_0", dut.clock, callback=self.model, name_map=axi4stream_chisel_name_map) # Create a scoreboard on the stream_out bus self.pkts_sent = 0 self.expected_output = [] self.scoreboard = Scoreboard(dut) self.scoreboard.add_interface(self.stream_out, self.expected_output) # Set verbosity on our various interfaces level = logging.DEBUG if debug else logging.WARNING self.stream_in.log.setLevel(level) self.stream_in_recovered.log.setLevel(level)
def value_test(dut): scb = Scoreboard(dut) data_width = int(dut.B) bus_width = int(dut.N) n_test = 100 cocotb.fork(clock_gen(dut.clk, period=clock_period)) exp1 = list() exp2 = list() c1 = VectorCollector([[bus_width]], n_test) c2 = VectorCollector([[]], n_test) master = ValidMaster(dut, 'i', dut.clk, ['i_data']) m1 = ValidMonitor(dut, 'i', dut.clk, ['i_data'], collector=c1) m2 = ValidMonitor(dut, 'o', dut.clk, ['o_data'], collector=c2) scb.add_interface(m1, exp1) scb.add_interface(m2, exp2) for i in range(10): yield RisingEdge(dut.clk) idat = np.random.randint(1<<data_width, size=(n_test,bus_width)).astype(np.int32) odat = np.sum(idat, axis=1)/bus_width exp1.append(CompareWrap((idat,), verbose=True)) # wrong answer # exp2.append(CompareWrap((odat+1,), verbose=True)) exp2.append(CompareWrap((odat,), verbose=True)) ibus = master.create_data() for n in range(n_test): for i in range(bus_width): ibus.i_data[i].integer = idat[n,i] yield master.send(ibus, 3) yield Timer(10) assert c1.clean and c2.clean raise scb.result
def __init__(self, dut, codec, debug=False): dut._log.info(f"Setting up test bench object with codec={codec}") self.dut = dut self.codec = codec self.sha = Sha.get_method(codec=codec) self.dut._log.info(f"Configure driver, monitors and scoreboard for {self.sha.sha_name}") self.s_axis = AXIS_Driver(dut, "s_axis", dut.axis_aclk, lsb_first=False) self.m_axis = AXIS_Monitor(dut, "m_axis", dut.axis_aclk, lsb_first=False) self.expected_output = [] # Create a scoreboard on the m_axis bus with warnings.catch_warnings(): warnings.simplefilter("ignore") self.scoreboard = Scoreboard(dut) self.scoreboard.add_interface(self.m_axis, self.expected_output) # Reconstrut the input transactions self.s_axis_recovered = AXIS_Monitor(dut, "s_axis", dut.axis_aclk, callback=self.model, lsb_first=False) level = logging.DEBUG if debug else logging.WARNING self.s_axis.log.setLevel(level) self.s_axis_recovered.log.setLevel(level)
async def run_test(dut): en_gpio_loopback_test = True en_spi_test = True clk = Clock(dut.clk, 10, units="ns") # Create a 10us period clock on port clk cocotb.fork(clk.start()) # Start the clock dut.uart_txd = 0 await FallingEdge(dut.clk) ### ============================================================================================================= ### GPIO LOOPBACK TEST if en_gpio_loopback_test: dv = DVTest(dut, "GPIO Loopback", msg_lvl="All") dv.info("GPIO Loopback Test") for i in range(20000): await FallingEdge(dut.clk) dut.P2_in <= dut.P1_out.value try: gpio_value = int(dut.P1_out.value.binstr,2) loop_done = True if gpio_value == 0xff else False except ValueError: gpio_value = 0 loop_done = False if (i+1) % 1000 == 0: dv.info("clock = " + str(i+1) +": P1_out = " + str(gpio_value) ) if loop_done: break await Edge(dut.P1_out) gpio_result = int(dut.P1_out.value.binstr,2) dv.eq(gpio_result, 0, "Error count from DUT") dut.P1_in = 0 await ClockCycles(dut.clk,100) dv.done() ### ============================================================================================================= ### SPI TEST spi_peripheral = SPIPeripheralMonitor( dut=dut, cfg = { 'name' : "SPI Monitor", 'size' : 8, # bits 'mode' : 0, 'lsb_first' : False, }, io = { 'sclk' : dut.spi_sclk, 'cs_n' : dut.spi_cs, 'sdi' : dut.spi_mosi, 'sdo' : dut.spi_miso, } ) # spi_peripheral_expect.append( random.randint(0, 127) ) # spi_peripheral_response.append( random.randint(0, 127) ) if en_spi_test: dv.info("SPI Test (random modes and speeds)") spi_n = 15 spi_peripheral_expect = [] spi_scoreboard_expect = [] spi_peripheral_response = [] for i in range(spi_n): val = i spi_peripheral_expect.append( val ) spi_scoreboard_expect.append( val ) spi_peripheral_response.append( val ) spi_peripheral.start(spi_peripheral_expect, spi_peripheral_response) scoreboard = Scoreboard(dut) scoreboard.add_interface(spi_peripheral, spi_scoreboard_expect, strict_type=False) random.seed(42) err_cnt = 0 toggle = 0 for iiii in range(spi_n): # SEND BYTE-VALUE TO SEND OVER SPI TO Z80 USING BPIO p2[7:0] dut.P2_in.value = spi_peripheral_expect[iiii] # SEND MODE AND CLKDIV TO Z80 OVER GPIO P1[7:0] # Bit [1:0] mode # Bit [2] toggle (ensure p1_in changes) # Bit [6:3] clkdiv (div sys clk) # Bit [7] done spi_peripheral.mode = random.randrange(4) # i % 4 clkdiv = random.randrange(0, 16, 2) toggle = (toggle + 4) & 0x04 P1_in = (clkdiv << 3) | toggle | spi_peripheral.mode dut.P1_in.value = P1_in # WAIT FOR Z80 TO SEND SPI MESSAGE AND COMPARE WITH EXPECETD VALUE dv.info("Waiting for SPI Peripheral ({})".format(iiii)) await spi_peripheral.peripheral_monitor() spi_peripheral.stop() dut.P1_in.value = 0x80 if err_cnt == 0: dv.info("SPI Test Passed") else: dv.info("SPI Test Failed - Error Count = " + str(err_cnt) ) await ClockCycles(dut.clk,100) # Print result of scoreboard. dv.is_true(scoreboard.result, "SPI Test Scoreboard")
def __init__(self, entity, fail_immediately): self._entity = entity self._drv = TmrImpl(entity, entity.clk, 32) self._sbrd = Scoreboard(entity, fail_immediately=fail_immediately) self._mon = TmrImplMonitor(entity, self._sbrd)
def rob_simple_test(dut): # TB_ARGS parser parser = ArgumentParser(description='Arguments for test') parser.add_argument("-len", "--length", dest="length", type=int, default=32) parser.add_argument("-dhreq", "--max_delay_host_req", dest="dhreq", type=int, default=0) parser.add_argument("-dhrsp", "--max_delay_host_rsp", dest="dhrsp", type=int, default=0) parser.add_argument("-dmreq", "--max_delay_mem_req", dest="dmreq", type=int, default=0) parser.add_argument("-dmrsp", "--max_delay_mem_rsp", dest="dmrsp", type=int, default=0) parser.add_argument("-id", "--id_width", dest="id_width", type=int, default=4) argument_list = shlex.split(os.environ["PY_TB_ARGS"]) args = parser.parse_args(argument_list) # Setup CLK and Reset vr_in = vr.vr_master(dut, name="bug_host_req_i", clock=dut.clk, bus_separator=".", valid_max_delay=args.dhreq) vr_out = vr.vr_slave(dut, name="bug_host_rsp_o", clock=dut.clk, bus_separator=".", ready_max_delay=args.dhrsp) mem_req = vr.vr_slave(dut, name="bug_mem_req_o", clock=dut.clk, bus_separator=".", ready_max_delay=args.dmreq) mem_rsp = vr.vr_master(dut, name="bug_mem_rsp_i", clock=dut.clk, bus_separator=".", valid_max_delay=args.dmrsp) vr_out_mon = vr.vr_monitor(dut, name="bug_host_rsp_o", clock=dut.clk, bus_separator=".") setup_clk(dut) dut.rstn <= 0 yield Timer(CLK_PERIOD * 10, units='ns') dut.rstn <= 1 # Init interfaces memory = vr_mem.vr_mem_cl(mem_req, mem_rsp, permutation=True) packet = packet_generate(args, random.randint(1, args.length)) with open("./ref.dat", "w") as f: for i in packet: f.write(str(i) + '\n') scoreboard = Scoreboard(dut) scoreboard.add_interface(vr_out_mon, packet) cocotb.fork(vr_out.receive_packet(len(packet))) cocotb.fork(vr_in.write_packet(packet)) while (vr_in.busy): yield RisingEdge(dut.clk) memory.th = 0 # flush buffer while (vr_out.wait): yield RisingEdge(dut.clk) yield Timer(CLK_PERIOD, units='ns') packet_out = list(map(int, vr_out.get_packet(clean=True))) with open("./out.dat", "w") as f: for i in packet_out: f.write(str(i) + '\n')