def test_write_bytes_success(phil_base, regtest):
"""Tests write bytes command"""
_regtest(regtest, phil_base.write_bytes(0, [9, 8, 7]))
_regtest(regtest, phil_base.write_bytes(3, 99))
_regtest(regtest, phil_base.write_bytes(7, "88"))
_regtest(regtest, phil_base.read_bytes(0, 8, True))
_regtest(regtest, phil_base.read_bytes(0, 8, True, 0.1))
def test_write_bits_success(phil_base, regtest):
"""Test write bytes by writing user reg then comaparing it to a read value
"""
_regtest(regtest, phil_base.write_bits(0, 0, 9, 0x102, 0.1))
_assert_bits(phil_base, 0, 1, 1)
_assert_bits(phil_base, 1, 2, 2)
_assert_bits(phil_base, 2, 2, 3)
_assert_bits(phil_base, 3, 15, 32000)
def test_read_reg(phil_ex, regtest):
"""Tests the read reg function on all valid registers in the map"""
for cmd in sorted(phil_ex.mem_map):
read_val = phil_ex.read_reg(cmd)
read_val.pop('cmd', None)
read_val['name'] = cmd
if 'DEVICE_SPECIFIC' in phil_ex.mem_map[cmd]['flag'] or \
'VOLATILE' in phil_ex.mem_map[cmd]['flag']:
read_val.pop('data', None)
elif phil_ex.mem_map[cmd]['default']:
assert read_val['data'] == int(phil_ex.mem_map[cmd]['default'])
_regtest(regtest, read_val)
def test_philip_ext_misc_commands(phil_ex, regtest):
"""This tests the remaining commands
Note: Connect the dut_rst to DEBUG0 pin to test traces
"""
_regtest(regtest, phil_ex.read_struct("trace"))
phil_ex.write_and_execute('gpio[0].mode.io_type', 3)
phil_ex.dut_reset(0.3)
traces = phil_ex.read_trace()
if len(traces) == 0:
raise IndexError("Could not get traces, connect DUT_RST to DEBUG0")
sec_diff = traces[1]['time'] - traces[0]['time']
assert sec_diff > 0.1 and sec_diff < 0.5
def test_send_and_parse_cmd(phil_base, regtest):
"""Tests basic send and parse command"""
_regtest(regtest, phil_base.send_and_parse_cmd("rr 0 10"))
_regtest(regtest, phil_base.send_and_parse_cmd("rr 0 2"))
_regtest(regtest, phil_base.send_and_parse_cmd("rr 0 2", True))
_regtest(regtest, phil_base.send_and_parse_cmd("rr 0 2", True, 0.1))
_regtest(regtest, phil_base.send_and_parse_cmd("help"))
_regtest(regtest, phil_base.get_version())
def test_read_bits_success(phil_base, regtest):
"""Tests various read bits and compares with regession"""
phil_base.write_bytes(0, [0x91, 0x1F, 0, 0, 0, 0, 0, 1])
_regtest(regtest, phil_base.read_bits(0, 0, 1))
_regtest(regtest, phil_base.read_bits(0, 0, 1, 0.1))
_regtest(regtest, phil_base.read_bits(0, 0, 5))
_regtest(regtest, phil_base.read_bits(0, 4, 1))
_regtest(regtest, phil_base.read_bits(0, 4, 4))
_regtest(regtest, phil_base.read_bits(0, 7, 9))
_regtest(regtest, phil_base.read_bits(0, 0, 7))
_regtest(regtest, phil_base.read_bits(0, 0, 8))
_regtest(regtest, phil_base.read_bits(0, 0, 9))
_regtest(regtest, phil_base.read_bits(0, 8, 1))
_regtest(regtest, phil_base.read_bits(0, 8, 8))
_regtest(regtest, phil_base.read_bits(0, 0, 16))
_regtest(regtest, phil_base.read_bits(0, 0, 64))
def test_read_bytes_success(phil_base, regtest):
"""Tests basic read bytes command"""
_regtest(regtest, phil_base.read_bytes(0))
_regtest(regtest, phil_base.read_bytes("1"))
_regtest(regtest, phil_base.read_bytes(3, 2))
_regtest(regtest, phil_base.read_bytes(4, "0"))
_regtest(regtest, phil_base.read_bytes(5, 10))
_regtest(regtest, phil_base.read_bytes(5, 8))
_regtest(regtest, phil_base.read_bytes(5, 8, True))
_regtest(regtest, phil_base.read_bytes(5, 8, True, 0.1))
