def decompile(self, wanted_step=decompiler.STEP_DECOMPILED):
d = decompiler.decompiler_t(self.ea)
for step in d.steps():
print 'Decompiler step: %u - %s' % (step, decompilation_phase[step])
if step >= wanted_step:
break
self.editor.update(d.flow)
return
def decompile(self, wanted_step=decompiler.STEP_DECOMPILED):
dis = host.dis.available_disassemblers["ida"].create()
d = decompiler.decompiler_t(dis, self.ea)
for step in d.steps():
print "Decompiler step: %u - %s" % (step, decompilation_phase[step])
if step >= wanted_step:
break
self.editor.update(d.flow)
return
def decompile(self, wanted_step=decompiler.STEP_DECOMPILED):
d = decompiler.decompiler_t(self.ea)
for step in d.steps():
print 'Decompiler step: %u - %s' % (step,
decompilation_phase[step])
if step >= wanted_step:
break
self.editor.update(d.flow)
return
def decompile(self, wanted_step=decompiler.STEP_DECOMPILED):
dis = host.dis.available_disassemblers['ida'].create()
d = decompiler.decompiler_t(dis, self.ea)
for step in d.steps():
print 'Decompiler step: %u - %s' % (step,
decompilation_phase[step])
if step >= wanted_step:
break
self.editor.update(d.flow)
return
def decompile_until(self, input):
ssa.ssa_context_t.index = 0
if self.arch == 'x86':
md = capstone.Cs(capstone.CS_ARCH_X86, capstone.CS_MODE_32)
dis = host.dis.available_disassemblers['capstone'].create(md, input)
elif self.arch == 'x86-64':
md = capstone.Cs(capstone.CS_ARCH_X86, capstone.CS_MODE_64)
dis = host.dis.available_disassemblers['capstone'].create(md, input)
else:
raise RuntimeError('no such architecture: %s' % (self.arch, ))
dec = decompiler.decompiler_t(dis, 0)
dec.calling_convention = self.callconv
dec.step_until(self.step_until)
return dec
def decompile(self, wanted_step=None):
if not wanted_step:
wanted_step = decompiler.step_decompiled
dis = host.dis.available_disassemblers['ida'].create()
d = decompiler.decompiler_t(dis, self.ea)
for step in d.steps():
#~ print 'Decompiler step: %u - %s' % (step, decompilation_phase[step]) # this print is not treated correctelly.
if step >= wanted_step:
break
self.editor.update(d.flow)
return
def decompile_until(self, input, last_step):
ssa.ssa_context_t.index = 0
if self.disasm is None or self.disasm == 'ir-parser':
dis = parser_disassembler(input)
dis.stackreg = 'esp'
elif self.disasm == 'capstone-x86':
md = capstone.Cs(capstone.CS_ARCH_X86, capstone.CS_MODE_32)
dis = host.dis.available_disassemblers['capstone'].create(md, input)
elif self.disasm == 'capstone-x86-64':
md = capstone.Cs(capstone.CS_ARCH_X86, capstone.CS_MODE_64)
dis = host.dis.available_disassemblers['capstone'].create(md, input)
dec = decompiler_t(dis, 0)
dec.step_until(last_step)
return dec
def decompile_until(self, input, last_step):
ssa.ssa_context_t.index = 0
if self.disasm is None or self.disasm == 'ir-parser':
dis = parser_disassembler(input)
dis.stackreg = 'esp'
elif self.disasm == 'capstone-x86':
md = capstone.Cs(capstone.CS_ARCH_X86, capstone.CS_MODE_32)
dis = host.dis.available_disassemblers['capstone'].create(md, input)
elif self.disasm == 'capstone-x86-64':
md = capstone.Cs(capstone.CS_ARCH_X86, capstone.CS_MODE_64)
dis = host.dis.available_disassemblers['capstone'].create(md, input)
dec = decompiler_t(dis, 0)
if self.calling_convention:
dec.calling_convention = self.calling_convention
dec.step_until(last_step)
return dec
