def p_68_69_6e_6f(va, val, buf, off, tsize):
# mov 0x68, 0x69, 0x6e, 0x6f
iflags = 0
op = (val >> 7)
aERs = (val >> 4) & 0x7
Rd = (val) & 0xf
if (val & 0x600):
disp, = struct.unpack('>H', buf[off + 2:off + 4])
dispsz = 2
isz = 4
else:
disp, dispsz = 0, 0
isz = 2
if val & 0x80: # reverse operand order
opers = (
H8RegDirOper(Rd, tsize, va, 0),
H8RegIndirOper(aERs, tsize, va, disp=disp, dispsz=dispsz,
oflags=0),
)
else:
opers = (
H8RegIndirOper(aERs, tsize, va, disp=disp, dispsz=dispsz,
oflags=0),
H8RegDirOper(Rd, tsize, va, 0),
)
return (op, None, opers, iflags, isz)
def p_Mov_78(va, val, buf, off, tsize):
val2, val3_4 = struct.unpack('>HI', buf[off + 2:off + 8])
op = (val3_4 >> 24) | ((val2 & 0xfff0) << 4) | (
(val & 0xff80) << (20 + 1)) | ((val & 0xf) << 20)
#FIXME: complex and ugly. do we even need these in this impl?
mnem = None
disp = val3_4 & 0xffffffff
# tsize is all over the map. must determine here.
tsz_opt = (val2 >> 8) & 1
tsize = (1, 2)[tsz_opt]
iflags = OSZ_FLAGS[tsize]
if (val2 & 0x80):
erd = (val >> 4) & 0x7
rs = val2 & 0xf
opers = (
H8RegDirOper(rs, tsize),
H8RegIndirOper(erd, tsize, va, disp=disp, dispsz=4, oflags=0),
)
else:
ers = (val >> 4) & 0x7
rd = val2 & 0xf
opers = (
H8RegIndirOper(ers, tsize, va, disp=disp, dispsz=4, oflags=0),
H8RegDirOper(rd, tsize),
)
return (op, mnem, opers, iflags, 8)
def p_CCR_Rd(va, val, buf, off, tsize):
# stc
iflags = 0
op = val >> 4
rd = val & 0xf
exr = op & 1
opers = (
H8RegDirOper(REG_CCR + exr, 4, va),
H8RegDirOper(rd, tsize, va),
)
return (op, None, opers, iflags, 2)
def p_Rs_Rd_mul(va, val, buf, off, tsize):
iflags = 0
op = val >> 16
Rs = (val >> 4) & 0xf
Rd = val & 0xf
opers = (
H8RegDirOper(Rs, 1, va, 0),
H8RegDirOper(Rd, 2, va, 0),
)
return (op, None, opers, iflags, 2)
def p_Rs_CCR(va, val, buf, off, tsize):
# ldc
iflags = 0
op = val >> 4
rs = val & 0xf
exr = op & 1
opers = (
H8RegDirOper(rs, tsize, va),
H8RegDirOper(REG_CCR + exr, 4, va),
)
return (op, None, opers, iflags, 2)
def p_Rs_Rd(va, val, buf, off, tsize):
# add.b, add.w, addx, and.b, and.w, cmp.b, cmp.w, divxu.b
iflags = 0
op = val >> 16
Rs = (val >> 4) & 0xf
Rd = val & 0xf
opers = (
H8RegDirOper(Rs, tsize, va, 0),
H8RegDirOper(Rd, tsize, va, 0),
)
return (op, None, opers, iflags, 2)
def p_Rn_Rd(va, val, buf, off, tsize):
# bclr, bset, btst
iflags = 0
op = val >> 8
Rn = (val >> 4) & 0xf
Rd = val & 0xf
opers = (
H8RegDirOper(Rn, tsize, va, 0),
H8RegDirOper(Rd, tsize, va, 0),
)
return (op, None, opers, iflags, 2)
def p_ERs_ERd(va, val, buf, off, tsize):
# add.l, cmp.l
iflags = IF_L
op = ((val >> 6) & 0xfffe) | (
(val >> 3) & 1) # first byte, and bits 3 and 7 of second byte
ERs = (val >> 4) & 0x7
ERd = val & 0x7
opers = (
H8RegDirOper(ERs, tsize, va, 0),
H8RegDirOper(ERd, tsize, va, 0),
)
return (op, None, opers, iflags, 2)
def p_Rs_ERd(va, val, buf, off, tsize):
# mulxu.w, divxu.w
iflags = 0
op = ((val >> 8) << 1) | ((val >> 3) & 1)
Rs = (val >> 4) & 0xf
ERd = val & 0x7
# FIXME: make sure ER# and R# have correct metaregister values
opers = (
H8RegDirOper(Rs, tsize, va, 0),
H8RegDirOper(ERd, 4, va, 0),
)
return (op, None, opers, iflags, 2)
def p_Rs_ERd_4b(va, val, buf, off, tsize):
# divxs.w
val2, = struct.unpack('>H', buf[off + 2:off + 4])
iflags = 0
op = (val << 8) | (val2 >> 8)
Rs = (val2 >> 4) & 0xf
ERd = val2 & 0x7
opers = (
H8RegDirOper(Rs, tsize, va, 0),
H8RegDirOper(ERd, tsize, va, 0),
)
return (op, None, opers, iflags, 4)
def p_Rs_Rd_4b(va, val, buf, off, tsize):
# divxs.b, mulxs.b
val2, = struct.unpack('>H', buf[off + 2:off + 4])
oszbit = (val2 >> 9) & 1
iflags = (IF_B, IF_W)[oszbit]
stsize, dtsize = ((1, 2), (2, 4))[oszbit]
op = (val << 8) | (val2 >> 8)
Rs = (val2 >> 4) & 0xf
Rd = val2 & 0xf
opers = (
H8RegDirOper(Rs, stsize, va, 0),
H8RegDirOper(Rd, dtsize, va, 0),
)
return (op, None, opers, iflags, 4)
def p_Rd(va, val, buf, off, tsize):
# daa, das, dec.b, exts.w, extu.w, inc.b
iflags = 0
op = val >> 4
Rd = val & 0xf
opers = (H8RegDirOper(Rd, tsize, va, 0), )
return (op, None, opers, iflags, 2)
def p_shift_10_11_12_13_17(va, val, buf, off, tsize):
op = val >> 4
mnem, osz, xtra = shift_info[(val >> 4) & 0xff]
iflags = OSZ_FLAGS[osz]
# if 32bit (ERd), top bit should always be 0 anyway
rd = val & 0xf
if xtra:
opers = (
H8ImmOper(xtra, osz),
H8RegDirOper(rd, osz, va, 0),
)
else:
opers = (H8RegDirOper(rd, osz, va, 0), )
return (op, mnem, opers, iflags, 2)
def p_ERd(va, val, buf, off, tsize):
# exts.l, extu.l
iflags = 0
op = val >> 4
ERd = val & 0x7
opers = (H8RegDirOper(ERd, tsize, va, 0), )
return (op, None, opers, iflags, 2)
def p_6A_6B(va, val, buf, off, tsize):
op = val >> 4
diff = op & 0xf
osz = 1 + ((val >> 8) & 1)
if op & 0x8:
# Rs, @aa:16/24
if diff == 0xa:
op, mnem, opers, iflags, isz = p_Rs_aAA24(va, val, buf, off, tsize)
iflags |= OSZ_FLAGS[osz]
return op, mnem, opers, iflags, isz
elif diff == 0x8:
op, mnem, opers, iflags, isz = p_Rs_aAA16(va, val, buf, off, tsize)
iflags |= OSZ_FLAGS[osz]
return op, mnem, opers, iflags, isz
else:
raise envi.InvalidInstruction(bytez=buf[off:off + 16], va=va)
else:
# @aa:16/24, Rd
if diff == 0x2:
op, mnem, opers, iflags, isz = p_aAA24_Rd(va, val, buf, off, tsize)
iflags |= OSZ_FLAGS[osz]
return op, mnem, opers, iflags, isz
elif diff == 0x0:
op, mnem, opers, iflags, isz = p_aAA16_Rd(va, val, buf, off, tsize)
iflags |= OSZ_FLAGS[osz]
return op, mnem, opers, iflags, isz
elif val in (0x6a10, 0x6a18, 0x6a30, 0x6a38):
# non-MOV instructions
isz, aasize, fmt = (None, (6, 2, '>HH'), None,
(8, 4, '>IH'))[(val >> 4) & 3]
aa, val2 = struct.unpack(fmt, buf[off + 2:off + isz])
op, mnem, niflags = getBitDbl_OpMnem(val2)
if val2 & 0x1c00:
i3 = (val2 >> 4) & 7
opers = (
H8ImmOper(i3, tsize),
H8AbsAddrOper(aa, tsize, aasize),
)
else:
rn = (val2 >> 4) & 0xf
opers = (
H8RegDirOper(
rn,
tsize,
va,
),
H8AbsAddrOper(aa, tsize, aasize),
)
return op, mnem, opers, 0, isz
else:
raise envi.InvalidInstruction(bytez=buf[off:off + 16], va=va)
def p_i8_CCR(va, val, buf, off, tsize, exr=0):
# andc
iflags = 0
op = val >> 8
i8 = val & 0xff
opers = (
H8ImmOper(i8, 1),
H8RegDirOper(REG_CCR + exr, 4, 0),
)
return (op, None, opers, iflags, 2)
def p_Bit_Doubles(va, val, buf, off, tsize):
op, mnem, iflags = getBitDbl_OpMnem(val)
i3 = (val >> 4) & 0x7
Rd = val & 0xf
opers = (
H8ImmOper(i3, tsize),
H8RegDirOper(Rd, tsize, va, 0),
)
return (op, mnem, opers, iflags, 2)
def p_i3_Rd(va, val, buf, off, tsize):
# band, bclr, biand, bild, bior, bist, bixor, bld, bnot, bor, bset, bst, btst, bxor
iflags = 0
op = val >> 7
i3 = (val >> 4) & 0x7
Rd = val & 0xf
opers = (
H8ImmOper(i3, tsize),
H8RegDirOper(Rd, tsize, va, 0),
)
return (op, None, opers, iflags, 2)
def p_Rs_aAA8(va, val, buf, off, tsize):
# mov 0x3###
iflags = 0
op = val >> 12
Rs = (val >> 8) & 0xf
aAA8 = val & 0xff
opers = (
H8RegDirOper(Rs, tsize, va, 0),
H8AbsAddrOper(aAA8, tsize, aasize=1),
)
return (op, None, opers, iflags, 2)
def p_i8_Rd(va, val, buf, off, tsize):
# add.b, addx, and.b, cmp.b
iflags = 0
op = val >> 4
i8 = val & 0xff
Rd = (val >> 8) & 0xf
opers = (
H8ImmOper(i8, 1),
H8RegDirOper(Rd, tsize, va, 0),
)
return (op, None, opers, iflags, 2)
def p_0b_1b(va, val, buf, off, tsize):
table = (data_0b, data_1b)[val >> 12]
diff = (val >> 4) & 0xf
tsize, iflags, imm, mnem = table[diff]
op = val >> 4
ERd = val & 0xf
opers = (
H8ImmOper(imm, tsize),
H8RegDirOper(ERd, tsize, va, 0),
)
return (op, mnem, opers, iflags, 2)
def p_aAA24_Rd(va, val, buf, off, tsize):
val2, = struct.unpack('>I', buf[off + 2:off + 6])
iflags = 0
op = val >> 4
Rd = val & 0xf
aAA24 = val2 & 0xffffff
opers = (
H8AbsAddrOper(aAA24, tsize, aasize=4),
H8RegDirOper(Rd, tsize, va),
)
return (op, None, opers, iflags, 6)
def p_aAA16_Rd(va, val, buf, off, tsize):
val2, = struct.unpack('>H', buf[off + 2:off + 4])
iflags = 0
op = val >> 4
Rd = val & 0xf
aAA16 = val2
opers = (
H8AbsAddrOper(aAA16, tsize, aasize=2),
H8RegDirOper(Rd, tsize, va),
)
return (op, None, opers, iflags, 4)
def p_Rn_aAA8(va, val, buf, off, tsize):
# bclr, bset, btst
val2, = struct.unpack('>H', buf[off + 2:off + 4])
iflags = 0
op = (val & 0xff00) | ((val2 >> 4) & 0xff0) | (val2 & 0xf)
Rn = (val2 >> 4) & 0xf
aAA8 = val & 0xff
opers = (
H8RegDirOper(Rn, tsize, va, 0),
H8AbsAddrOper(aAA8, tsize, aasize=1),
)
return (op, None, opers, iflags, 4)
def p_i16_Rd(va, val, buf, off, tsize):
# add.w, and.w, cmp.w
val2, = struct.unpack('>H', buf[off + 2:off + 4])
iflags = 0
op = val >> 4
i16 = val2
Rd = val & 0xf
opers = (
H8ImmOper(i16, 2),
H8RegDirOper(Rd, tsize, va, 0),
)
return (op, None, opers, iflags, 4)
def p_i32_ERd(va, val, buf, off, tsize):
# add.l, and.l, cmp.l
val2, = struct.unpack('>I', buf[off + 2:off + 6])
iflags = 0
op = val >> 3
i32 = val2
ERd = val & 0x7
opers = (
H8ImmOper(i32, 4),
H8RegDirOper(ERd, tsize, va, 0),
)
return (op, None, opers, iflags, 6)
def p_6c_6d_0100(va, val, buf, off, tsize):
op = val >> 7
iflags = OSZ_FLAGS[tsize]
isz = 2
mnem = None
er0 = val & 0xf
er1 = (val >> 4) & 7
if val & 0x80:
# mov ERs, @-ERd
if val & 0xf0 == 0xf0:
# push
mnem = 'push'
opers = (H8RegDirOper(er0, tsize, va), )
else:
# mov
mnem = 'mov'
opers = (
H8RegDirOper(er0, tsize, va),
H8RegIndirOper(er1, tsize, va, 0, oflags=OF_PREDEC),
)
else:
# mov @ERs+,ERd
if val & 0xf0 == 0x70:
# pop
mnem = 'pop'
opers = (H8RegDirOper(er0, tsize, va), )
else:
# mov
mnem = 'mov'
opers = (
H8RegIndirOper(er1, tsize, va, 0, oflags=OF_POSTINC),
H8RegDirOper(er0, tsize, va),
)
return (op, mnem, opers, iflags, isz)
def p_Rn_aERd(va, val, buf, off, tsize):
# bclr, bset, btst
val2, = struct.unpack('>H', buf[off + 2:off + 4])
iflags = 0
op = ((val >> 12) & 0xfff0) | (val & 0xf) | (
(val2 >> 4) & 0xfff0) | (val2 & 0xf)
aERd = (val >> 4) & 0x7
Rn = (val2 >> 4) & 0xf
opers = (
H8RegDirOper(Rn, tsize, va, 0),
H8RegIndirOper(aERd, tsize, va, disp=0, oflags=0),
)
return (op, None, opers, iflags, 4)
def p_0f_1f(va, val, buf, off, tsize):
aors = val >> 12
diff = val & 0xf0
if diff == 0:
tsize = 1
op = val >> 4
mnem = ('daa', 'das')[aors]
iflags = 0
rd = val & 0xf
opers = (H8RegDirOper(rd, 1, va=va, oflags=0), )
elif diff >= 0x80:
mnem = ('mov', 'cmp')[aors]
op, nmnem, opers, iflags, isz = p_ERs_ERd(va, val, buf, off, tsize=4)
else:
raise envi.InvalidInstruction(bytez=buf[off:off + 16], va=va)
return (op, mnem, opers, iflags, 2)
def p_7e(va, val, buf, off, tsize):
# btst, bor, bior, bxor, bixor, band, biand, bid, bild (erd)
val2, = struct.unpack('>H', buf[off + 2:off + 4])
op, mnem, iflags = getBitDbl_OpMnem(val2)
op |= ((val & 0xff80) << 9)
aa = val & 0xff
telltale = (val2 >> 8)
# FIXME: is any of this redundant with previous encodings?
if telltale == 0x63:
# btst (0x####63##
mnem = 'btst'
rn = (val2 >> 4) & 0xf
opers = (
H8RegDirOper(rn, tsize, va, 0),
H8AbsAddrOper(aa, tsize=tsize, aasize=1),
)
elif telltale == 0x73:
# btst (0x####73##
mnem = 'btst'
i3 = (val2 >> 4) & 0x7
opers = (
H8ImmOper(i3, tsize),
H8AbsAddrOper(aa, tsize=tsize, aasize=1),
)
elif 0x78 > telltale > 0x73:
# other bit-halves:
tsize = 1
i3 = (val2 >> 4) & 0x7
opers = (
H8ImmOper(i3, tsize),
H8AbsAddrOper(aa, tsize=tsize, aasize=1),
)
else:
raise envi.InvalidInstruction(bytez=buf[off:off + 16], va=va)
return op, mnem, opers, iflags, 4