def test_read_Absolute():
address_mode = Absolute
cpu = CPU()
memory = Memory(rom=[0x32, 0x02, 0x7F, 0x01, 0xFF, 0x07],
ram=list(map(lambda x: x % 256, range(Memory.ram_size()))))
cpu.inc_cycle_by(-cpu.cycle)
cpu.inc_pc_by(-cpu.pc + MemoryPositions.PRG_ROM_START.start)
address = address_mode.fetch_address(cpu, memory)
value = address_mode.read_from(cpu, memory, address)
assert address == 0x0232
assert value == (0x0232 % 256)
assert cpu.cycle == 3
cpu.inc_cycle_by(-cpu.cycle)
address = address_mode.fetch_address(cpu, memory)
value = address_mode.read_from(cpu, memory, address)
assert address == 0x017F
assert value == (0x017F % 256)
assert cpu.cycle == 3
cpu.inc_cycle_by(-cpu.cycle)
address = address_mode.fetch_address(cpu, memory)
value = address_mode.read_from(cpu, memory, address)
assert address == 0x07FF
assert value == (0x07FF % 256)
assert cpu.cycle == 3
def test_write_Absolute():
address_mode = Absolute
cpu = CPU()
memory = Memory(rom=[0x30, 0x01, 0xFF, 0x02, 0x0A, 0x05],
ram=list(map(lambda x: x % 256, range(Memory.ram_size()))))
cpu.inc_cycle_by(-cpu.cycle)
cpu.inc_pc_by(-cpu.pc + MemoryPositions.PRG_ROM_START.start)
address = address_mode.fetch_address(cpu, memory)
address_mode.write_to(cpu, memory, address, 50)
assert address == 0x0130
assert memory.ram[address] == 50
assert cpu.cycle == 3
cpu.inc_cycle_by(-cpu.cycle)
address = address_mode.fetch_address(cpu, memory)
address_mode.write_to(cpu, memory, address, 100)
assert address == 0x02FF
assert memory.ram[address] == 100
assert cpu.cycle == 3
cpu.inc_cycle_by(-cpu.cycle)
address = address_mode.fetch_address(cpu, memory)
address_mode.write_to(cpu, memory, address, 67)
assert address == 0x050A
assert memory.ram[address] == 67
assert cpu.cycle == 3
def test_read_AbsoluteY():
address_mode = AbsoluteY
cpu = CPU()
memory = Memory(rom=[0x32, 0x02, 0x7F, 0x01, 0x00, 0x20],
ram=list(map(lambda x: x % 256, range(Memory.ram_size()))))
cpu.inc_cycle_by(-cpu.cycle)
cpu.inc_pc_by(-cpu.pc + MemoryPositions.PRG_ROM_START.start)
cpu.y = 0x0A
address = address_mode.fetch_address(cpu, memory)
value = address_mode.read_from(cpu, memory, address)
assert address == 0x023C
assert value == (0x023C % 256)
cpu.inc_cycle_by(-cpu.cycle)
cpu.y = 0xA1
address = address_mode.fetch_address(cpu, memory)
value = address_mode.read_from(cpu, memory, address)
assert address == 0x0220
assert value == (0x0220 % 256)
cpu.inc_cycle_by(-cpu.cycle)
cpu.y = 0x07
address = address_mode.fetch_address(cpu, memory)
assert address == 0x2007
def test_write_AbsoluteY():
address_mode = AbsoluteY
cpu = CPU()
memory = Memory(rom=[0x30, 0x01, 0xFF, 0x02, 0x0A, 0x05],
ram=list(map(lambda x: x % 256, range(Memory.ram_size()))))
cpu.inc_cycle_by(-cpu.cycle)
cpu.inc_pc_by(-cpu.pc + MemoryPositions.PRG_ROM_START.start)
cpu.y = 0x25
address = address_mode.fetch_address(cpu, memory)
address_mode.write_to(cpu, memory, address, 20)
assert address == 0x0155
assert memory.ram[address] == 20
cpu.inc_cycle_by(-cpu.cycle)
cpu.y = 0x30
address = address_mode.fetch_address(cpu, memory)
address_mode.write_to(cpu, memory, address, 100)
assert address == 0x032F
assert memory.ram[address] == 100
cpu.inc_cycle_by(-cpu.cycle)
cpu.y = 0x20
address = address_mode.fetch_address(cpu, memory)
address_mode.write_to(cpu, memory, address, 67)
assert address == 0x052A
assert memory.ram[address] == 67
def test_read_IndirectY():
address_mode = IndirectY
cpu = CPU()
memory = Memory(rom=[0x00, 0x02, 0x7F, 0x01, 0xFF, 0x07],
ram=list(map(lambda x: x % 256, range(Memory.ram_size()))))
cpu.inc_cycle_by(-cpu.cycle)
cpu.inc_pc_by(-cpu.pc + MemoryPositions.PRG_ROM_START.start)
cpu.y = 4
address = address_mode.fetch_address(cpu, memory)
value = address_mode.read_from(cpu, memory, address)
assert address == 0x0104
assert value == address % 256
cpu.inc_cycle_by(-cpu.cycle)
cpu.y = 0xFF
address = address_mode.fetch_address(cpu, memory)
value = address_mode.read_from(cpu, memory, address)
assert address == 0x0401
assert value == address % 256
def test_write_IndirectY():
address_mode = IndirectY
cpu = CPU()
memory = Memory(rom=[0x00, 0x02, 0x7F, 0x01, 0xFF, 0x07],
ram=list(map(lambda x: x % 256, range(Memory.ram_size()))))
cpu.inc_cycle_by(-cpu.cycle)
cpu.inc_pc_by(-cpu.pc + MemoryPositions.PRG_ROM_START.start)
cpu.y = 4
address = address_mode.fetch_address(cpu, memory)
address_mode.write_to(cpu, memory, address, 9)
assert address == 0x0104
assert memory.ram[address] == 9
cpu.inc_cycle_by(-cpu.cycle)
cpu.y = 0xFF
address = address_mode.fetch_address(cpu, memory)
address_mode.write_to(cpu, memory, address, 50)
assert address == 0x0401
assert memory.ram[address] == 50
def test_read_IndirectX():
address_mode = IndirectX
cpu = CPU()
memory = Memory(rom=[0x00, 0x02, 0x7F, 0x01, 0xFF, 0x07],
ram=list(map(lambda x: x % 256, range(Memory.ram_size()))))
cpu.inc_cycle_by(-cpu.cycle)
cpu.inc_pc_by(-cpu.pc + MemoryPositions.PRG_ROM_START.start)
cpu.x = 4
address = address_mode.fetch_address(cpu, memory)
value = address_mode.read_from(cpu, memory, address)
assert address == (((0x0504 + 1) % 256) << 8 | (0x0504 % 256))
assert value == address % 256
assert cpu.cycle == 5
cpu.inc_cycle_by(-cpu.cycle)
cpu.x = 0xFF
address = address_mode.fetch_address(cpu, memory)
value = address_mode.read_from(cpu, memory, address)
assert address == (((0x0201 + 1) % 256) << 8 | (0x0201 % 256))
assert value == address % 256
assert cpu.cycle == 5
def test_Indirect():
address_mode = Indirect
cpu = CPU()
memory = Memory(rom=[0x32, 0x02, 0x7F, 0x01, 0xFF, 0x07],
ram=list(map(lambda x: x % 256, range(Memory.ram_size()))))
cpu.inc_cycle_by(-cpu.cycle)
cpu.inc_pc_by(-cpu.pc + MemoryPositions.PRG_ROM_START.start)
address = address_mode.fetch_address(cpu, memory)
assert address == (((0x0232 + 1) % 256) << 8 | (0x0232 % 256))
assert cpu.cycle == 4
cpu.inc_cycle_by(-cpu.cycle)
address = address_mode.fetch_address(cpu, memory)
assert address == (((0x017F + 1) % 256) << 8 | (0x017F % 256))
assert cpu.cycle == 4
cpu.inc_cycle_by(-cpu.cycle)
address = address_mode.fetch_address(cpu, memory)
assert address == (((0x07FF + 1) % 256) << 8 | (0x07FF % 256))
assert cpu.cycle == 4