def test_execute_nop16():
state = new_state()
instr = opcode_factory.nop16()
name, executefn = decode(instr)
executefn(state, Instruction(instr, None))
expected_state = StateChecker(pc=(2 + RESET_ADDR))
expected_state.check(state)
def test_execute_rti16():
state = new_state(rfIRET=224, rfSTATUS=0b10, pc=0)
instr = opcode_factory.rti16()
name, executefn = decode(instr)
executefn(state, Instruction(instr, None))
expected_state = StateChecker(pc=224, rfIRET=224, rfSTATUS=0b00)
expected_state.check(state)
def test_execute_arith32_immediate(opcode, imm, expected):
state = new_state(rf0=5)
instr = opcode(rd=1, rn=0, imm=imm)
name, executefn = decode(instr)
executefn(state, Instruction(instr, None))
expected_state = StateChecker(pc=(4 + RESET_ADDR), **expected)
expected_state.check(state)
def test_execute_gid16():
state = new_state(rfSTATUS=0)
instr = opcode_factory.gid16()
name, executefn = decode(instr)
executefn(state, Instruction(instr, None))
expected_state = StateChecker(rfSTATUS=0b10)
expected_state.check(state)
def test_execute_add16sub16(factory, expected):
state = new_state(rf0=2, rf1=5)
instr = factory(rd=2, rn=1, rm=0)
name, executefn = decode(instr)
executefn(state, Instruction(instr, None))
expected_state = StateChecker(pc=(2 + RESET_ADDR), **expected)
expected_state.check(state)
def test_execute_farith_unary32(factory, rn, ex):
state = new_state(rf1=float2bits(7.2), rf2=float2bits(0.0),
rf3=float2bits(-1.5), rf4=float2bits(float('nan')),
rf5=0, rf6=-1, rf7=1)
instr = factory(rd=0, rn=rn)
name, executefn = decode(instr)
executefn(state, Instruction(instr, None))
ex.fp_check(state)
def test_execute_farith_fix(is16bit, rn, ex):
state = new_state(rf1=float2bits(7.2), rf2=float2bits(0.0),
rf3=float2bits(-1.5), rf4=float2bits(float('nan')),
rf5=0, rf6=-1, rf7=1)
instr = opcode_factory.fix16(rd=0, rn=rn) if is16bit else opcode_factory.fix32(rd=0, rn=rn)
name, executefn = decode(instr)
executefn(state, Instruction(instr, None))
ex.check(state)
def test_execute_bkpt16():
state = new_state(rfDEBUGSTATUS=0)
instr = opcode_factory.bkpt16()
name, executefn = decode(instr)
executefn(state, Instruction(instr, None))
expected_state = StateChecker(rfDEBUGSTATUS=1)
expected_state.check(state)
assert not state.running
def test_execute_bcond(is16bit, cond, imm, offset):
state = new_state(AZ=1, pc=90)
factory = opcode_factory.bcond16 if is16bit else opcode_factory.bcond32
instr = factory(condition=cond, imm=imm)
name, executefn = decode(instr)
executefn(state, Instruction(instr, None))
expected_state = StateChecker(pc=(90 + offset), AZ=1)
expected_state.check(state)
def test_infinite_loop(is16bit):
state = new_state(AZ=1, pc=0)
factory = opcode_factory.bcond16 if is16bit else opcode_factory.bcond32
# Branch unconditionally to instruction at pc=0.
instr = factory(condition=0, imm=0)
name, executefn = decode(instr)
with pytest.raises(RuntimeError):
executefn(state, Instruction(instr, None))
def test_execute_bitwise16(factory, expected):
state = new_state(rf0=5, rf1=7)
instr = factory(rd=2, rn=1, rm=0)
name, executefn = decode(instr)
executefn(state, Instruction(instr, None))
expected_state = StateChecker(AZ=0, AV=0, AC=0, pc=(2 + RESET_ADDR),
rf2=expected)
expected_state.check(state)
def test_execute_str_disp_pm(sub, new_rn):
# Store.
state = new_state(rf0=0xFFFFFFFF, rf5=8)
# bb: 00=byte, 01=half-word, 10=word, 11=double-word
instr = opcode_factory.ldstrpmd32(rd=0, rn=5, sub=sub, imm=1, bb=0b10, s=1)
name, executefn = decode(instr)
executefn(state, Instruction(instr, None))
expected_state = StateChecker(rf0=0xFFFFFFFF, rf5=new_rn)
expected_state.check(state, memory=[(8, 4, 0xFFFFFFFF)])
def test_testset32_nonzero():
state = new_state(rf0=0, rf1=0x80002, rf2=0x80002)
size = 0b10 # Word
state.mem.write(0x00100004, 4, 0xFFFF)
instr = opcode_factory.testset32(rd=0, rn=1, rm=2, sub=0, bb=size)
name, executefn = decode(instr)
executefn(state, Instruction(instr, None))
expected_state = StateChecker(rf0=0xFFFF, rf1=0x80002, rf2=0x80002,)
expected_state.check(state, memory=[(0x00100004, 4, 0xFFFF)])
def test_execute_shift_left(factory, is16bit):
state = new_state(rf0=5, rf1=7)
instr = factory(rd=2, rn=1, rm=0)
name, executefn = decode(instr)
executefn(state, Instruction(instr, None))
expected_state = StateChecker(AZ=0, AN=0, AC=0, AV=0,
pc=((2 if is16bit else 4) + RESET_ADDR),
rf2=7 << 5)
expected_state.check(state)
def test_execute_movcond(is16bit, val):
state = new_state(AZ=1, rf1=val)
instr = (opcode_factory.movcond16(condition=0b0000, rd=0, rn=1) if is16bit
else opcode_factory.movcond32(condition=0b0000, rd=0, rn=1))
name, executefn = decode(instr)
executefn(state, Instruction(instr, None))
pc_expected = (2 if is16bit else 4) + RESET_ADDR
expected_state = StateChecker(pc=pc_expected, rf0=val)
expected_state.check(state)
def test_execute_ldr_disp_pm(sub, new_rn):
# Load.
state = new_state(rf5=8)
state.mem.write(8, 4, 42) # Start address, number of bytes, value
# bb: 00=byte, 01=half-word, 10=word, 11=double-word
instr = opcode_factory.ldstrpmd32(rd=0, rn=5, sub=sub, imm=1, bb=0b10, s=0)
name, executefn = decode(instr)
executefn(state, Instruction(instr, None))
expected_state = StateChecker(rf0=42, rf5=new_rn)
expected_state.check(state)
def test_execute_bitr(bits, expected, is16bit):
state = new_state(rf0=0, rf1=bits)
instr = (opcode_factory.bitr16_immediate(rd=2, rn=1, imm=0) if is16bit
else opcode_factory.bitr32_immediate(rd=2, rn=1, imm=0))
name, executefn = decode(instr)
executefn(state, Instruction(instr, None))
expected_state = StateChecker(AZ=0, AC=0, AV=0,
pc=((2 if is16bit else 4) + RESET_ADDR),
rf2=expected)
expected_state.check(state)
def test_branch_link(is16bit):
state = new_state()
cond = 0b1111 # Condition code for branch-and-link
factory = opcode_factory.bcond16 if is16bit else opcode_factory.bcond32
instr = factory(condition=cond, imm=0b00011000)
name, executefn = decode(instr)
executefn(state, Instruction(instr, None))
expected_LR = (2 if is16bit else 4) + RESET_ADDR
expected = StateChecker(rfLR=expected_LR, pc=(RESET_ADDR + (0b00011000 << 1)))
expected.check(state)
def test_str_index(is16bit):
# Store.
state = new_state(rf0=0xFFFFFFFF, rf5=8, rf6=8)
if is16bit:
instr = opcode_factory.ldstrind16(rd=0, rn=5, rm=6, bb=0b10, s=1)
else:
instr = opcode_factory.ldstrind32(rd=0, rn=5, rm=6, sub=0, bb=0b10, s=1)
name, executefn = decode(instr)
executefn(state, Instruction(instr, None))
expected_state = StateChecker(rf0=0xFFFFFFFF, rf5=8, rf6=8)
expected_state.check(state, memory=[(16, 4, 0xFFFFFFFF)])
def test_sub16_neg_imm():
state = new_state(rf2=0, rf1=0)
bits = opcode_factory.sub16_immediate(rd=2, rn=1, imm=0b111)
name, executefn = decode(bits)
instr = Instruction(bits, '')
assert instr.rd == 2
assert instr.rn == 1
assert instr.imm3 == 0b111
executefn(state, instr)
expected_state = StateChecker(rf2=1, rf1=0)
expected_state.check(state)
def test_execute_arith_shift_right_imm(rn, imm, is16bit):
rd = 2
state = new_state(rf0=trim_32(rn))
instr = (opcode_factory.asr16_immediate(rd=rd, rn=0, imm=imm) if is16bit
else opcode_factory.asr32_immediate(rd=rd, rn=0, imm=imm))
name, executefn = decode(instr)
executefn(state, Instruction(instr, None))
expected_state = StateChecker(AZ=(False if rn < 0 else True), # 1 >> 5 == 0
AV=0, AC=0,
pc=((2 if is16bit else 4) + RESET_ADDR),
rf2=(trim_32(-1) if rn < 0 else 0))
expected_state.check(state)
def test_ldr_pm(is16bit):
# Load.
state = new_state(rf0=0, rf5=8, rf6=8)
state.mem.write(16, 4, 0xFFFFFFFF)
if is16bit:
instr = opcode_factory.ldstrpm16(rd=0, rn=5, rm=6, bb=0b10, s=0)
else:
instr = opcode_factory.ldstrpm32(rd=0, rn=5, rm=6, sub=0, bb=0b10, s=0)
name, executefn = decode(instr)
executefn(state, Instruction(instr, None))
expected_state = StateChecker(rf0=0xFFFFFFFF, rf5=16, rf6=8)
expected_state.check(state)
def test_execute_trap_warning(capsys):
state = new_state()
instr = opcode_factory.trap16(trap=0b11111)
name, executefn = decode(instr)
executefn(state, Instruction(instr, None))
out, err = capsys.readouterr()
expected_state = StateChecker(pc=(2 + RESET_ADDR))
expected_text = ('WARNING: syscall not implemented: 31')
expected_state.check(state)
assert expected_text in out
assert err == ''
assert state.running
def test_execute_logical_shift_right(rn, rm, is16bit):
rd = 2
state = new_state(rf0=trim_32(rn), rf1=trim_32(rm))
instr = (opcode_factory.lsr16(rd=rd, rn=0, rm=1) if is16bit
else opcode_factory.lsr32(rd=rd, rn=0, rm=1))
name, executefn = decode(instr)
executefn(state, Instruction(instr, None))
expected_state = StateChecker(AZ=(False if rn < 0 else True), # 1 >> 5 == 0
AV=0, AC=0,
pc=((2 if is16bit else 4) + RESET_ADDR),
rf2=(0b1111 if rn < 0 else 0))
expected_state.check(state)
def test_testset32_fail():
expected_text = """testset32 has failed to write to address %s.
The absolute address used for the test and set instruction must be located
within the on-chip local memory and must be greater than 0x00100000 (2^20).
""" % str(hex(0x4))
state = new_state(rf0=0, rf1=0x2, rf2=0x2)
size = 0b10 # Word
state.mem.write(0x00100004, 4, 0xFFFF)
instr = opcode_factory.testset32(rd=0, rn=1, rm=2, sub=0, bb=size)
name, executefn = decode(instr)
with pytest.raises(ValueError) as exninfo:
executefn(state, Instruction(instr, None))
assert expected_text == exninfo.value.message
def test_execute_ldr_disp(is16bit, sub, address):
# Load.
state = new_state(rf0=0, rf5=8)
state.mem.write(address, 4, 0xFFFFFFFF) # Start address, number of bytes, value
# bb: 00=byte, 01=half-word, 10=word, 11=double-word
if is16bit:
instr = opcode_factory.ldstrdisp16(rd=0, rn=5, imm=1, bb=0b10, s=0)
else:
instr = opcode_factory.ldstrdisp32(rd=0, rn=5, sub=sub, imm=1, bb=0b10, s=0)
name, executefn = decode(instr)
executefn(state, Instruction(instr, None))
expected_state = StateChecker(rf0=0xFFFFFFFF, rf5=8)
expected_state.check(state)
def test_execute_str_disp(is16bit, sub, expected):
# Store.
state = new_state(rf0=0xFFFFFFFF, rf5=8)
# bb: 00=byte, 01=half-word, 10=word, 11=double-word
if is16bit:
instr = opcode_factory.ldstrdisp16(rd=0, rn=5, imm=1, bb=0b10, s=1)
else:
instr = opcode_factory.ldstrdisp32(rd=0, rn=5, sub=sub, imm=1, bb=0b10, s=1)
name, executefn = decode(instr)
executefn(state, Instruction(instr, None))
address = 8 - (1 << 2) if sub else 8 + (1 << 2)
expected_state = StateChecker(rf0=0xFFFFFFFF, rf5=8)
expected_state.check(state, memory=[(address, 4, 0xFFFFFFFF)])
def test_execute_idle16(capsys):
state = new_state(rfSTATUS=1)
instr = opcode_factory.idle16()
name, executefn = decode(instr)
executefn(state, Instruction(instr, None))
out, err = capsys.readouterr()
expected_state = StateChecker(pc=(2 + RESET_ADDR), rfSTATUS=0)
expected_text = ('IDLE16 does not wait in this simulator. ' +
'Moving to next instruction.')
expected_state.check(state)
assert expected_text in out
assert err == ''
assert state.running
def test_execute_movimm(is16bit, is_to, imm):
state = new_state(AZ=1, rf2=0)
if is_to:
instr = opcode_factory.movtimm32(rd=2, imm=imm)
elif is16bit:
instr = opcode_factory.movimm16(rd=2, imm=imm)
else:
instr = opcode_factory.movimm32(rd=2, imm=imm)
name, executefn = decode(instr)
executefn(state, Instruction(instr, None))
expected_t = 0 | (imm << 16)
pc_expected = (2 if is16bit else 4) + RESET_ADDR
expected_state = StateChecker(pc=pc_expected, rf2=expected_t) if is_to else StateChecker(pc=pc_expected, rf2=imm)
expected_state.check(state)
def test_execute_mov_special(is16bit, is_from):
# Note that in the MOV 'special' instructions rd and rn are swapped.
state = new_state(rf0=5, rfCONFIG=7)
if is_from and is16bit:
instr = opcode_factory.movfs16(rn=0, rd='CONFIG')
expected_state = StateChecker(pc=(2 + RESET_ADDR), rf0=7, rfCONFIG=7)
elif is_from and (not is16bit):
instr = opcode_factory.movfs32(rn=0, rd='CONFIG')
expected_state = StateChecker(pc=(4 + RESET_ADDR), rf0=7, rfCONFIG=7)
elif (not is_from) and is16bit:
instr = opcode_factory.movts16(rn='CONFIG', rd=0)
expected_state = StateChecker(pc=(2 + RESET_ADDR), rf0=5, rfCONFIG=5)
elif (not is_from) and (not is16bit):
instr = opcode_factory.movts32(rn='CONFIG', rd=0)
expected_state = StateChecker(pc=(4 + RESET_ADDR), rf0=5, rfCONFIG=5)
name, executefn = decode(instr)
executefn(state, Instruction(instr, None))
expected_state.check(state)