def ids(vp, argList):
"""
Handles opening connection to FPGA board when flOpen fails initially. Also loads standard firmware using device id
Args:
vp(): vendor ID and product ID
argList(namespace): populated namespace object
Returns:
An opaque reference to an internal structure representing the connection.
This must be freed at some later time by a call to \c flClose(), or a resource-leak will ensue.
"""
if argList.i:
ivp = argList.i[0]
print("Loading firmware into {}...".format(ivp))
fl.flLoadStandardFirmware(ivp, vp)
# Long delay for renumeration
# TODO: fix this hack. The timeout value specified in flAwaitDevice() below doesn't seem to work
time.sleep(3)
print("Awaiting renumeration...")
if ( not fl.flAwaitDevice(vp, 10000) ):
raise fl.FLException("FPGALink device did not renumerate properly as {}".format(vp))
print("Attempting to open connection to FPGALink device {} again...".format(vp))
return fl.flOpen(vp)
else:
raise fl.FLException("Could not open FPGALink device at {} and no initial VID:PID was supplied".format(vp))
def open_device(self):
ivp = self.initial_vidpid
vp = self.fpgalink_vidpid
print("Attempting to open connection to FPGALink device", vp, "...")
try:
handle = fl.flOpen(self.fpgalink_vidpid)
except fl.FLException as ex:
if not ivp:
raise FLException(
"Could not open FPGALink device at {0} and"
" no initial VID:PID was supplied".format(vp))
print("Loading firmware into %s..." % ivp)
fl.flLoadStandardFirmware(ivp, vp)
print("Awaiting renumeration...")
if not fl.flAwaitDevice(vp, 600):
raise fl.FLException(
"FPGALink device did not renumerate properly"
" as {0}".format(vp))
print("Attempting to open connection to FPGALink device", vp,
"again...")
handle = fl.flOpen(vp)
# Only Nero capable hardware support doing programming.
assert fl.flIsNeroCapable(handle)
print("Cable connection opened.")
return handle
def open_device(self):
ivp = self.initial_vidpid
vp = self.fpgalink_vidpid
print("Attempting to open connection to FPGALink device", vp, "...")
try:
handle = fl.flOpen(self.fpgalink_vidpid)
except fl.FLException as ex:
if not ivp:
raise FLException(
"Could not open FPGALink device at {0} and"
" no initial VID:PID was supplied".format(vp))
print("Loading firmware into %s..." % ivp)
fl.flLoadStandardFirmware(ivp, vp)
print("Awaiting renumeration...")
if not fl.flAwaitDevice(vp, 600):
raise fl.FLException(
"FPGALink device did not renumerate properly"
" as {0}".format(vp))
print("Attempting to open connection to FPGALink device", vp,
"again...")
handle = fl.flOpen(vp)
# Only Nero capable hardware support doing programming.
assert fl.flIsNeroCapable(handle)
print("Cable connection opened.")
return handle
def ids(vp, argList):
if argList.i:
ivp = argList.i[0]
print("Loading firmware into {}...".format(ivp))
fl.flLoadStandardFirmware(ivp, vp)
# Long delay for renumeration
# TODO: fix this hack. The timeout value specified in flAwaitDevice() below doesn't seem to work
time.sleep(3)
print("Awaiting renumeration...")
if ( not fl.flAwaitDevice(vp, 10000) ):
raise fl.FLException("FPGALink device did not renumerate properly as {}".format(vp))
print("Attempting to open connection to FPGALink device {} again...".format(vp))
return fl.flOpen(vp)
else:
raise fl.FLException("Could not open FPGALink device at {} and no initial VID:PID was supplied".format(vp))
def openComm(config):
argList = getArgs()
handle = fl.FLHandle()
try:
fpga_vid_pid_did = argList['fpga_vid_pid_did']
try:
handle = fl.flOpen(fpga_vid_pid_did)
except fl.FLException as ex:
fpga_vid_pid = argList['fpga_vid_pid']
fl.flLoadStandardFirmware(fpga_vid_pid, fpga_vid_pid_did)
#might need to add delay here
if not fl.flAwaitDevice(fpga_vid_pid, 10000):
raise fl.FLException('FPGALink device did not renumerate properly')
handle = fl.flOpen(fpga_vid_pid_did)
isNeroCapable = fl.flIsNeroCapable(handle)
isCommCapable = fl.flIsCommCapable(handle, 1)
fl.flSelectConduit(handle, 1)
if isCommCapable and fl.flIsFPGARunning(handle):
fpga = NodeFPGA(handle)
return (fpga, handle, Optimizer(handle, fpga, config))
else:
return None #open comm failed
pass
time.sleep(0.25)
timeoutCounter += 1
print("Found %d USB devices" % numDev)
try:
print("Initializing FPGALink library...")
fl.flInitialise(3)
print("Attempting to open connection to FPGALink device {}...".format(vp))
try:
handle = fl.flOpen(vp)
except fl.FLException as ex:
print(ex)
print("Loading standard firmware into RAM {}...".format(ivp))
fl.flLoadStandardFirmware(ivp, vp)
time.sleep(3)
fl.flAwaitDevice(vp, 10000)
print("Attempting to open connection to FPGALink device {} again...".format(vp))
handle = fl.flOpen(vp)
conduit = 1
isNeroCapable = fl.flIsNeroCapable(handle)
isCommCapable = fl.flIsCommCapable(handle, conduit)
fl.flSelectConduit(handle, conduit)
if ( isNeroCapable ):
print("Programming FPGA with {}...".format(progConfig))
fl.flProgram(handle, progConfig)
print("Programming successful")
else:
def SPImain():
argList = get_args()
handle = fl.FLHandle()
try:
fl.flInitialise(0)
vp = argList.v[0]
print("Attempting to open connection to FPGALink device {}...".format(vp))
try:
handle = fl.flOpen(vp)
except fl.FLException as ex:
if argList.i:
ivp = argList.i[0]
print("Loading firmware into {}...".format(ivp))
fl.flLoadStandardFirmware(ivp, vp)
mem_map = tester(ivp, vp)
# Long delay for renumeration
# TODO: fix this hack. The timeout value specified in flAwaitDevice() below doesn't seem to work
time.sleep(3)
print("Awaiting renumeration...")
if not fl.flAwaitDevice(vp, 10000):
raise fl.FLException("FPGALink device did not renumerate properly as {}".format(vp))
print("Attempting to open connection to FPGALink device {} again...".format(vp))
handle = fl.flOpen(vp)
else:
raise fl.FLException("Could not open FPGALink device at {} and no initial VID:PID was supplied".format(vp))
# if ( argList.d ):
# print("Configuring ports...")
# rb = "{:0{}b}".format(fl.flMultiBitPortAccess(handle, argList.d[0]), 32)
# print("Readback: 28 24 20 16 12 8 4 0\n {} {} {} {} {} {} {} {}".format(
# rb[0:4], rb[4:8], rb[8:12], rb[12:16], rb[16:20], rb[20:24], rb[24:28], rb[28:32]))
# fl.flSleep(100)
conduit = 1
if argList.c:
conduit = int(argList.c[0])
isNeroCapable = fl.flIsNeroCapable(handle)
isCommCapable = fl.flIsCommCapable(handle, conduit)
fl.flSelectConduit(handle, conduit)
if argList.f and not(isCommCapable):
raise fl.FLException("Data file load requested but device at {} does not support CommFPGA".format(vp))
if isCommCapable and fl.flIsFPGARunning(handle):
fpga = NodeFPGA(handle)
opt = Optimizer(handle, fpga)
#Test setting LD Bias to 0.150A (channels 26, 27)
#opt.setCurrent(0.150)
#this section of code looks like setLaserCurrent()
curr = 0.150
code = curr/(4.096*1.1*((1/6.81)+(1/16500)))*4096
first_byte, second_byte = opt.code2bytes(code)
spi_data = [first_byte, second_byte]
update_SPI(handle, [26,27], spi_data)
#Test reading LD Bias (channels 64 and 65)
rx_bias = read_SPI(handle, [mem_map.getAddress('CC3a'), mem_map.getAddress('CC3b')])
for r in rx_bias:
print "Bias bytes read: ", r
print (rx_bias[1]*256 + rx_bias[0])/4096 * (4.096*1.1*((1/6.81)+(1/16500)))
#Test writing/reading to LD Temp
#TODO Constants are estimated; may need to verify with vendor
R_known = 10000
Vcc = 0.8
B = 3900
R_0 = 10000
T_0 = 25
#writing temp 35C
T = 35
V_set = Vcc/(((m.exp(B/T)*(R_0 * m.exp(-B/T_0)))/R_known)+1)
V_code = opt.voltage2code(V_set) #convert voltage to code
fb, sb = opt.code2byte(V_code) #convert code to bytes
update_SPI(handle, [mem_map.getAddress('LTSa'),mem_map.getAddress('LTSb')], [fb, sb])
#reading temp
bytes__meas = read_SPI(handle, [mem_map.getAddress('LTMa'),mem_map.getAddress('LTMb')]) #read ADC value
code_meas = bytes_meas[1]*256 + bytes_meas[0] #convert bytes to double
V_meas = opt.code2voltage(code_meas) #convert ADC to voltage
def SPImain():
argList = getArgs()
handle = fl.FLHandle()
try:
fl.flInitialise(0)
vp = argList['fpga_vid_pid_did']
print("Attempting to open connection to FPGALink device {}...".format(vp))
try:
handle = fl.flOpen(vp)
except fl.FLException as ex:
ivp = argList['fpga_vid_pid']
print("Loading firmware into {}...".format(ivp))
fl.flLoadStandardFirmware(ivp, vp)
mem_map = mmap.Tester(ivp, vp)
# Long delay for renumeration
# TODO: fix this hack. The timeout value specified in flAwaitDevice() below doesn't seem to work
time.sleep(3)
print("Awaiting renumeration...")
if not fl.flAwaitDevice(vp, 10000):
raise fl.FLException("FPGALink device did not renumerate properly as {}".format(vp))
print("Attempting to open connection to FPGALink device {} again...".format(vp))
handle = fl.flOpen(vp)
# if ( argList.d ):
# print("Configuring ports...")
# rb = "{:0{}b}".format(fl.flMultiBitPortAccess(handle, argList.d[0]), 32)
# print("Readback: 28 24 20 16 12 8 4 0\n {} {} {} {} {} {} {} {}".format(
# rb[0:4], rb[4:8], rb[8:12], rb[12:16], rb[16:20], rb[20:24], rb[24:28], rb[28:32]))
# fl.flSleep(100)
conduit = 1
isNeroCapable = fl.flIsNeroCapable(handle)
isCommCapable = fl.flIsCommCapable(handle, conduit)
fl.flSelectConduit(handle, conduit)
if argList['dataToWrite'] != None and not(isCommCapable):
raise fl.FLException("Data file load requested but device at {} does not support CommFPGA".format(vp))
if isCommCapable and fl.flIsFPGARunning(handle):
fpga = NodeFPGA(handle)
opt = Optimizer(handle, fpga)
#Test setting LD Bias to 0.150A (channels 26, 27)
#opt.setCurrent(0.150)
#this section of code looks like setLaserCurrent()
curr = 0.150
code = curr/(4.096*1.1*((1/6.81)+(1/16500)))*4096
first_byte, second_byte = opt.code2bytes(code)
spi_data = [first_byte, second_byte]
updateSPI(handle, [mem_map.getAddress('LCCa'), mem_map.getAddress('LCCb')], spi_data)
#Test reading LD Bias (channels 64 and 65)
rx_bias = readSPI(handle, [mem_map.getAddress('CC3a'), mem_map.getAddress('CC3b')])
for r in rx_bias:
print ("Bias bytes read: ", r)
print (rx_bias[1]*256 + rx_bias[0])/4096 * (4.096*1.1*((1/6.81)+(1/16500)))
#Test writing/reading to LD Temp
#TODO Constants are estimated; may need to verify with vendor
R_known = 10000
Vcc = 0.8
B = 3900
R_0 = 10000
T_0 = 25
#writing temp 35C
T = 35
V_set = Vcc/(((m.exp(B/T)*(R_0 * m.exp(-B/T_0)))/R_known)+1)
V_code = opt.voltage2code(V_set) #convert voltage to code
fb, sb = opt.code2byte(V_code) #convert code to bytes
updateSPI(handle, [mem_map.getAddress('LTSa'),mem_map.getAddress('LTSb')], [fb, sb])
#reading temp
bytes__meas = readSPI(handle, [mem_map.getAddress('LTMa'),mem_map.getAddress('LTMb')]) #read ADC value
code_meas = bytes_meas[1]*256 + bytes_meas[0] #convert bytes to double
V_meas = opt.code2voltage(code_meas) #convert ADC to voltage
R_t = R_known * (Vcc/V_meas - 1)
T = B/m.log(R_t/R_0 * m.exp(-B/T_0))
print ("Temp read: ", T)
#Test reading from RTD
A = 3.81e-3 #from datasheet
B = -6.02e-7 #from datasheet
R_t0 = 1000
T_bm = readSPI(handle, [mem_map.getAddress('TE1a'),mem_map.getAddress('TE1b')]) #temp code measured
T_cm = 256*T_bm[1] + T_bm[0] #convert bytes to double
T_meas = opt.code2voltage(T_cm) #convert ADC to voltage
R_T = R_known * (Vcc/T_meas - 1)
C = 1 -( R_T/R_t0)
T_R = (-A + (A**2-(4*B*C))**0.5) / (2*B)
print ("RTD temp: ", T_R)
# You should have received a copy of the GNU Lesser General Public License
# along with this program. If not, see <http://www.gnu.org/licenses/>.
import fl
VID_PID = "1d50:602b:0002"
PROG_CONFIG = "D0D2D3D4"
CONDUIT = 1
BYTE_ARRAY = b"\xCA\xFE\xBA\xBE"
conn = fl.FLHandle()
try:
fl.flInitialise(0)
if ( not fl.flIsDeviceAvailable(VID_PID) ):
print("Loading firmware...")
fl.flLoadStandardFirmware("04b4:8613", VID_PID)
print("Awaiting...")
fl.flAwaitDevice(VID_PID, 600)
conn = fl.flOpen(VID_PID)
fl.flSingleBitPortAccess(conn, 3, 7, fl.PIN_LOW)
print("flMultiBitPortAccess() returned {:032b}".format(
fl.flMultiBitPortAccess(conn, "D7+")))
fl.flSleep(100)
print("flGetFirmwareID(): {:04X}".format(fl.flGetFirmwareID(conn)))
print("flGetFirmwareVersion(): {:08X}".format(fl.flGetFirmwareVersion(conn)))
print("flIsNeroCapable(): {}".format(fl.flIsNeroCapable(conn)))
print("flIsCommCapable(): {}".format(fl.flIsCommCapable(conn, CONDUIT)))
)
parser.add_argument("-f", action="store", nargs=1, metavar="<dataFile>", help="binary data to write to channel 0")
argList = parser.parse_args()
handle = fl.FLHandle()
try:
fl.flInitialise(0)
vp = argList.v[0]
print("Attempting to open connection to FPGALink device {}...".format(vp))
try:
handle = fl.flOpen(vp)
except fl.FLException as ex:
if argList.i:
ivp = argList.i[0]
print("Loading firmware into {}...".format(ivp))
fl.flLoadStandardFirmware(ivp, vp)
print("Awaiting renumeration...")
if not fl.flAwaitDevice(vp, 600):
raise fl.FLException("FPGALink device did not renumerate properly as {}".format(vp))
print("Attempting to open connection to FPGALink device {} again...".format(vp))
handle = fl.flOpen(vp)
else:
raise fl.FLException("Could not open FPGALink device at {} and no initial VID:PID was supplied".format(vp))
if argList.d:
print("Configuring ports...")
rb = "{:0{}b}".format(fl.flMultiBitPortAccess(handle, argList.d[0]), 32)
print(
"Readback: 28 24 20 16 12 8 4 0\n {} {} {} {} {} {} {} {}".format(
