def build_graph (): rx_decim = 32 tb = gr.top_block () usrp_rx = usrp.source_s (0, rx_decim, 1, 0x32103210, usrp.FPGA_MODE_COUNTING) sink = gr.check_counting_s () tb.connect (usrp_rx, sink) # file_sink = gr.file_sink (gr.sizeof_short, 'counting.dat') # tb.connect (usrp_rx, file_sink) return tb
def build_graph(): rx_decim = 32 tb = gr.top_block() usrp_rx = usrp.source_s(0, rx_decim, 1, 0x32103210, usrp.FPGA_MODE_COUNTING) sink = gr.check_counting_s() tb.connect(usrp_rx, sink) # file_sink = gr.file_sink (gr.sizeof_short, 'counting.dat') # tb.connect (usrp_rx, file_sink) return tb
def build_graph (): tx_interp = 32 # tx should be twice rx rx_decim = 16 tb = gr.top_block () data_src = ramp_source (tb) # usrp_tx = usrp.sink_s (0, tx_interp, 1, 0x98) usrp_tx = usrp.sink_s (0, tx_interp) tb.connect (data_src, usrp_tx) usrp_rx = usrp.source_s (0, rx_decim, 1, 0x32103210, usrp.FPGA_MODE_LOOPBACK) sink = gr.check_counting_s () tb.connect (usrp_rx, sink) # file_sink = gr.file_sink (gr.sizeof_short, "loopback.dat") # tb.connect (usrp_rx, file_sink) return tb