def test(_, path):
project = StandaloneProjectBuilder()
source, remarks = project.getSourceByPath(path)
it.assertEquals(source, VerilogParser(path, library='undefined'))
if project.builder.builder_name in ('msim', 'ghdl', 'xvhdl'):
it.assertEquals(remarks, [{
'checker':
'hdlcc',
'line_number':
'',
'column':
'',
'filename':
'',
'error_number':
'',
'error_type':
'W',
'error_message':
'Path "%s" not found in project file' % p.abspath(path)
}])
else:
it.assertEquals(remarks, [])
def test():
path = p.join(VIM_HDL_EXAMPLES, 'basic_library', 'very_common_pkg.vhd')
project = StandaloneProjectBuilder()
source, remarks = project.getSourceByPath(path)
it.assertEquals(source, VhdlParser(path, library='undefined'))
if project.builder.builder_name in ('msim', 'ghdl', 'xvhdl'):
it.assertEquals(remarks, [{
'checker':
'hdlcc',
'line_number':
'',
'column':
'',
'filename':
'',
'error_number':
'',
'error_type':
'W',
'error_message':
'Path "%s" not found in project file' % p.abspath(path)
}])
else:
it.assertEquals(remarks, [])
def test():
records = []
for error_type in ('E', 'W'):
for line_number in (10, 11):
for error_number in (12, 13):
records += [{
'error_type': error_type,
'line_number': line_number,
'error_number': error_number
}]
it.assertEqual(StandaloneProjectBuilder._sortBuildMessages(records),
[{
'error_type': 'E',
'line_number': 10,
'error_number': 12
}, {
'error_type': 'E',
'line_number': 10,
'error_number': 13
}, {
'error_type': 'E',
'line_number': 11,
'error_number': 12
}, {
'error_type': 'E',
'line_number': 11,
'error_number': 13
}, {
'error_type': 'W',
'line_number': 10,
'error_number': 12
}, {
'error_type': 'W',
'line_number': 10,
'error_number': 13
}, {
'error_type': 'W',
'line_number': 11,
'error_number': 12
}, {
'error_type': 'W',
'line_number': 11,
'error_number': 13
}])
def test():
project = StandaloneProjectBuilder()
it.assertIsNone(project._getCacheFilename())
it.assertEqual(project._getCacheFilename('some_path'),
p.join('some_path', '.hdlcc.cache'))
def test():
cache_content = {
"_logger": {
"name": "hdlcc.hdlcc_base",
"level": 0
},
"builder": {
"_builtin_libraries": [],
"_added_libraries": [],
"_logger": "hdlcc.builders.msim_mock",
"_target_folder":
"/home/souto/dev/vim-hdl/dependencies/hdlcc/.hdlcc",
"_build_info_cache": {}
},
"_config": {
"_parms": {
"target_dir":
"/home/souto/dev/vim-hdl/dependencies/hdlcc/.hdlcc",
"builder": "msim_mock",
"single_build_flags": {
"verilog": [],
"vhdl": [],
"systemverilog": []
},
"batch_build_flags": {
"verilog": [],
"vhdl": [],
"systemverilog": []
},
"global_build_flags": {
"verilog": [],
"vhdl": [],
"systemverilog": []
}
},
"_timestamp":
1474839625.2375762,
"_sources": {},
"filename":
"/home/souto/dev/vim-hdl/dependencies/hdlcc/myproject.prj"
},
"serializer": "json"
}
cache_path = p.join('.hdlcc', '.hdlcc.cache')
if p.exists(p.dirname(cache_path)):
shutil.rmtree(p.dirname(cache_path))
os.mkdir('.hdlcc')
with open(cache_path, 'w') as fd:
fd.write(repr(cache_content))
project = StandaloneProjectBuilder()
time.sleep(0.5)
found = True
while not project._msg_queue.empty():
severity, message = project._msg_queue.get()
_logger.info("Message found: [%s] %s", severity, message)
if message == "Failed to create builder '%s'" % FailingBuilder.builder_name:
found = True
break
it.assertTrue(found, "Failed to warn that cache recovering has failed")
it.assertTrue(project.builder.builder_name, 'Fallback')
def test():
project = StandaloneProjectBuilder()
it.assertIsNotNone(project.builder)
project.clean()
it.assertIsNone(project.builder)
def test():
project = StandaloneProjectBuilder()
project._recoverCache(project._getCacheFilename())