def prepare(self):
"""Prepare the environment for attachment with a jitter"""
# Disassembler
self.mdis = self.machine.dis_engine(bin_stream_vm(self.jitter.vm),
lines_wd=1,
loc_db=self.loc_db)
# Symbexec engine
## Prepare symbexec engines
self.symb = self.SYMB_ENGINE(self.jitter.cpu, self.jitter.vm,
self.ir_arch, {})
self.symb.enable_emulated_simplifications()
self.symb_concrete = EmulatedSymbExec(
self.jitter.cpu, self.jitter.vm,
self.ir_arch, {}
)
### Avoid side effects on jitter while using 'symb_concrete'
self.symb_concrete.func_write = None
## Update registers value
self.symb.symbols[self.ir_arch.IRDst] = ExprInt(
getattr(self.jitter.cpu, self.ir_arch.pc.name),
self.ir_arch.IRDst.size
)
# Avoid memory write
self.symb.func_write = None
# Activate callback on each instr
self.jitter.jit.set_options(max_exec_per_call=1, jit_maxline=1)
self.jitter.exec_cb = self.callback
# Clean jit cache to avoid multi-line basic blocks already jitted
self.jitter.jit.clear_jitted_blocks()
def __init__(self, ir_arch, bs=None):
super(JitCore_Python, self).__init__(ir_arch, bs)
self.ir_arch = ir_arch
# CPU & VM (None for now) will be set later
expr_simp = ExpressionSimplifier()
expr_simp.enable_passes(ExpressionSimplifier.PASS_COMMONS)
self.symbexec = EmulatedSymbExec(None,
None,
self.ir_arch, {},
sb_expr_simp=expr_simp)
self.symbexec.enable_emulated_simplifications()
def __init__(self, ir_arch, jit_type="gcc"):
"""Init an instance of jitter.
@ir_arch: ir instance for this architecture
@jit_type: JiT backend to use. Available options are:
- "gcc"
- "tcc"
- "llvm"
- "python"
"""
self.arch = ir_arch.arch
self.attrib = ir_arch.attrib
arch_name = ir_arch.arch.name # (ir_arch.arch.name, ir_arch.attrib)
try:
if arch_name == "x86":
from miasm2.jitter.arch import JitCore_x86 as jcore
elif arch_name == "arm":
from miasm2.jitter.arch import JitCore_arm as jcore
elif arch_name == "aarch64":
from miasm2.jitter.arch import JitCore_aarch64 as jcore
elif arch_name == "msp430":
from miasm2.jitter.arch import JitCore_msp430 as jcore
elif arch_name == "mips32":
from miasm2.jitter.arch import JitCore_mips32 as jcore
else:
raise ValueError("unknown jit arch: %s" % arch_name)
except ImportError:
raise RuntimeError('Unsupported jit arch: %s' % arch_name)
self.vm = VmMngr.Vm()
self.cpu = jcore.JitCpu()
self.ir_arch = ir_arch
self.bs = bin_stream_vm(self.vm)
self.symbexec = EmulatedSymbExec(self.cpu, self.vm, self.ir_arch, {})
self.symbexec.reset_regs()
try:
if jit_type == "tcc":
from miasm2.jitter.jitcore_tcc import JitCore_Tcc as JitCore
elif jit_type == "llvm":
from miasm2.jitter.jitcore_llvm import JitCore_LLVM as JitCore
elif jit_type == "python":
from miasm2.jitter.jitcore_python import JitCore_Python as JitCore
elif jit_type == "gcc":
from miasm2.jitter.jitcore_gcc import JitCore_Gcc as JitCore
else:
raise ValueError("Unknown jitter %s" % jit_type)
except ImportError:
raise RuntimeError('Unsupported jitter: %s' % jit_type)
self.jit = JitCore(self.ir_arch, self.bs)
if isinstance(self.jit, JitCore_Cc_Base):
self.jit.init_codegen(self.C_Gen(self.ir_arch))
elif jit_type == "python":
self.jit.set_cpu_vm(self.cpu, self.vm)
self.cpu.init_regs()
self.vm.init_memory_page_pool()
self.vm.init_code_bloc_pool()
self.vm.init_memory_breakpoint()
self.jit.load()
self.cpu.vmmngr = self.vm
self.cpu.jitter = self.jit
self.stack_size = 0x10000
self.stack_base = 0x1230000
# Init callback handler
self.breakpoints_handler = CallbackHandler()
self.exceptions_handler = CallbackHandlerBitflag()
self.init_exceptions_handler()
self.exec_cb = None
def __init__(self, ir_arch, bs=None):
super(JitCore_Python, self).__init__(ir_arch, bs)
self.ir_arch = ir_arch
# CPU (None for now) will be set by the "jitted" Python function
self.symbexec = EmulatedSymbExec(None, self.ir_arch, {})
def __init__(self, ir_arch, jit_type="tcc"):
"""Init an instance of jitter.
@ir_arch: ir instance for this architecture
@jit_type: JiT backend to use. Available options are:
- "tcc"
- "llvm"
- "python"
"""
self.arch = ir_arch.arch
self.attrib = ir_arch.attrib
arch_name = ir_arch.arch.name # (ir_arch.arch.name, ir_arch.attrib)
if arch_name == "x86":
from miasm2.jitter.arch import JitCore_x86 as jcore
elif arch_name == "arm":
from miasm2.jitter.arch import JitCore_arm as jcore
elif arch_name == "aarch64":
from miasm2.jitter.arch import JitCore_aarch64 as jcore
elif arch_name == "msp430":
from miasm2.jitter.arch import JitCore_msp430 as jcore
elif arch_name == "mips32":
from miasm2.jitter.arch import JitCore_mips32 as jcore
else:
raise ValueError("unsupported jit arch!")
self.vm = VmMngr.Vm()
self.cpu = jcore.JitCpu()
self.ir_arch = ir_arch
self.bs = bin_stream_vm(self.vm)
init_arch_C(self.arch)
self.symbexec = EmulatedSymbExec(self.cpu, self.ir_arch, {})
self.symbexec.reset_regs()
if jit_type == "tcc":
self.jit = JitCore_Tcc(self.ir_arch, self.bs)
elif jit_type == "llvm":
self.jit = JitCore_LLVM(self.ir_arch, self.bs)
elif jit_type == "python":
self.jit = JitCore_Python(self.ir_arch, self.bs)
else:
raise Exception("Unkown JiT Backend")
self.cpu.init_regs()
self.vm.init_memory_page_pool()
self.vm.init_code_bloc_pool()
self.vm.init_memory_breakpoint()
self.vm.set_addr2obj(self.jit.addr2obj)
self.jit.load()
self.cpu.vmmngr = self.vm
self.cpu.jitter = self.jit
self.stack_size = 0x10000
self.stack_base = 0x1230000
# Init callback handler
self.breakpoints_handler = CallbackHandler()
self.exceptions_handler = CallbackHandlerBitflag()
self.init_exceptions_handler()
self.exec_cb = None
