def functest(self):
cc = ComponentClass(
name='PulsingCurrentClamp',
parameters=['i', 'cycle_length'],
analog_ports=[SendPort('I')],
regimes=[
Regime(
name='off',
transitions=On('t > tchange + cycle_length',
do=['tchange = t', 'I = 0'],
to='on'),
),
Regime(
name='on',
transitions=On('t > tchange + cycle_length',
do=['tchange = t', 'I = i'],
to='off'),
),
])
nrn = ComponentClass(
name='LeakyNeuron',
parameters=['Cm', 'gL', 'E'],
regimes=[
Regime('dV/dt = (iInj + (E-V)*gL )/Cm'),
],
analog_ports=[SendPort('V'),
ReducePort('iInj', reduce_op='+')],
)
combined_comp = ComponentClass(name='Comp1',
subnodes={
'nrn': nrn,
'cc1': cc
},
portconnections=[('cc1.I', 'nrn.iInj')])
records = [
RecordValue(what='cc1_I', tag='Current', label='Current Clamp 1'),
RecordValue(what='nrn_V', tag='Voltage', label='Neuron Voltage'),
RecordValue(what='cc1_tchange', tag='Tchange', label='tChange'),
RecordValue(what='regime', tag='Regime', label='Regime'),
]
parameters = {
'cc1_i': 13.8,
'cc1_cycle_length': 20,
'nrn_gL': 2,
'nrn_E': -70
}
results = std_pynn_simulation(test_component=combined_comp,
parameters=parameters,
initial_values={},
synapse_components=[],
records=records,
plot=True)
def test1(self):
cc = ComponentClass(
name='SimpleCurrentClamp',
parameters=['i'],
analog_ports=[SendPort('I')],
aliases='I:=i',
)
nrn = ComponentClass(
name='LeakyNeuron',
parameters=['Cm', 'gL', 'E'],
regimes=[
Regime('dV/dt = (iInj + (E-V)*gL )/Cm'),
],
analog_ports=[SendPort('V'),
ReducePort('iInj', reduce_op='+')],
)
combined_comp = ComponentClass(name='Comp1',
subnodes={
'nrn': nrn,
'cc1': cc
},
portconnections=[('cc1.I', 'nrn.iInj')])
records = [
RecordValue(what='cc1_I', tag='Current', label='Current Clamp 1'),
RecordValue(what='nrn_V', tag='Voltage', label='Neuron Voltage'),
]
res = std_pynn_simulation(test_component=combined_comp,
parameters={
'cc1_i': 13.8,
'nrn_gL': 2,
'nrn_E': -70
},
initial_values={},
synapse_components=[],
records=records,
plot=False)
t, records = res
self.assertAlmostEqual(records['cc1_I'][t > 10].mean(), 13.8)
self.assertAlmostEqual(records['cc1_I'][t > 10].std(), 0.0)
self.assertAlmostEqual(records['nrn_V'][t > 10].mean(), -63.1)
self.assertAlmostEqual(records['nrn_V'][t > 10].std(), 0.0)
def get_component():
off_regime = Regime(name="off_regime",
time_derivatives=[
"dRon/dt = -Ron/Rtau",
"dRoff/dt = -Beta*Roff",
],
transitions=On('spikeoutput',
do=[
"t_off = t+Cdur",
"r0 = r0*exp(-Beta*(t - t0))",
"t0 = t", "Ron = Ron +r0",
"Roff = Roff - r0"
],
to="on_regime"))
on_regime = Regime(
name="on_regime",
time_derivatives=[
"dRon/dt = (weight*Rinf - Ron)/Rtau",
"dRoff/dt = -Beta*Roff",
],
transitions=[
On('spikeoutput', do="t_off = t+Cdur"
), # Extend duration if input spike arrives while on
On(
"t_off>t", # What to do when its time to turn off
do=[
"r0 = weight*Rinf + (r0 - weight*Rinf)*exp(-(t - t0)/Rtau)",
"t0 = t", "Ron = Ron - r0", "Roff = Roff - r0"
],
to='off_regime')
])
analog_ports = [
RecvPort("weight"),
RecvPort("V"),
SendPort("Isyn"),
SendPort("gsyn")
]
c1 = ComponentClass(
"AMPA",
regimes=[off_regime, on_regime],
analog_ports=analog_ports,
aliases=["g := (on + off)", "Isyn := g*(E-V)", "gsyn := g"])
return c1
def func_test(self):
emitter = ComponentClass(
name='EventEmitter',
parameters=['cyclelength'],
regimes=[
Regime(transitions=On('t > tchange + cyclelength',
do=[OutputEvent('emit'), 'tchange=t'])),
])
ev_based_cc = ComponentClass(
name='EventBasedCurrentClass',
parameters=['dur', 'i'],
analog_ports=[SendPort('I')],
regimes=[
Regime(transitions=[
On('inputevent', do=['I=i', 'tchange = t']),
On('t>tchange + dur', do=['I=0', 'tchange=t'])
])
])
pulsing_emitter = ComponentClass(name='pulsing_cc',
subnodes={
'evs': emitter,
'cc': ev_based_cc
},
portconnections=[('evs.emit',
'cc.inputevent')])
nrn = ComponentClass(
name='LeakyNeuron',
parameters=['Cm', 'gL', 'E'],
regimes=[
Regime('dV/dt = (iInj + (E-V)*gL )/Cm'),
],
aliases=['iIn := iInj'],
analog_ports=[SendPort('V'),
ReducePort('iInj', reduce_op='+')],
)
combined_comp = ComponentClass(name='Comp1',
subnodes={
'nrn': nrn,
'cc1': pulsing_emitter,
'cc2': pulsing_emitter
},
portconnections=[
('cc1.cc.I', 'nrn.iInj'),
('cc2.cc.I', 'nrn.iInj')
])
combined_comp = flattening.flatten(combined_comp)
records = [
RecordValue(what='cc1_cc_I',
tag='Current',
label='Current Clamp 1'),
RecordValue(what='cc2_cc_I',
tag='Current',
label='Current Clamp 2'),
RecordValue(what='nrn_iIn',
tag='Current',
label='Total Input Current'),
RecordValue(what='nrn_V', tag='Voltage', label='Neuron Voltage'),
RecordValue(what='cc1_cc_tchange',
tag='Tchange',
label='tChange CC1'),
RecordValue(what='cc2_cc_tchange',
tag='Tchange',
label='tChange CC2'),
RecordValue(what='regime', tag='Regime', label='Regime'),
]
parameters = flattening.ComponentFlattener.flatten_namespace_dict({
'cc1.cc.i':
13.8,
'cc1.cc.dur':
10,
'cc1.evs.cyclelength':
30,
'cc2.cc.i':
20.8,
'cc2.cc.dur':
5.0,
'cc2.evs.cyclelength':
20,
'nrn.gL':
4.3,
'nrn.E':
-70
})
res = std_pynn_simulation(
test_component=combined_comp,
parameters=parameters,
initial_values={},
synapse_components=[],
records=records,
# plot = False,
)
return
t, records = res
def check_trace(trace_name, time_period, exp_mean, exp_std=0):
t_indices = (t > time_period[0] + 1) & (t < time_period[1] - 1)
self.assertAlmostEqual(records[trace_name][t_indices].mean(),
exp_mean,
places=3)
self.assertAlmostEqual(records[trace_name][t_indices].std(),
exp_std,
places=3)
check_trace('cc1_cc_I', (00, 30), exp_mean=0.0)
check_trace('cc1_cc_I', (30, 40), exp_mean=13.8)
check_trace('cc1_cc_I', (40, 60), exp_mean=0.0)
check_trace('cc1_cc_I', (60, 70), exp_mean=13.8)
check_trace('cc1_cc_I', (70, 90), exp_mean=0.0)
check_trace('cc1_cc_I', (90, 100), exp_mean=13.8)
check_trace('cc2_cc_I', (00, 20), exp_mean=0.0)
check_trace('cc2_cc_I', (20, 25), exp_mean=20.8)
check_trace('cc2_cc_I', (25, 40), exp_mean=0.0)
check_trace('cc2_cc_I', (40, 45), exp_mean=20.8)
check_trace('cc2_cc_I', (45, 60), exp_mean=0.0)
check_trace('cc2_cc_I', (60, 65), exp_mean=20.8)
check_trace('cc2_cc_I', (65, 80), exp_mean=0.0)
check_trace('cc2_cc_I', (80, 85), exp_mean=20.8)
check_trace('cc2_cc_I', (85, 100), exp_mean=0.0)
check_trace('nrn_iIn', (00, 20), exp_mean=0.0)
check_trace('nrn_iIn', (20, 25), exp_mean=20.8)
check_trace('nrn_iIn', (25, 30), exp_mean=0.0)
check_trace('nrn_iIn', (30, 40), exp_mean=13.8)
check_trace('nrn_iIn', (40, 45), exp_mean=20.8)
check_trace('nrn_iIn', (45, 60), exp_mean=0.0)
check_trace('nrn_iIn', (60, 65), exp_mean=34.6)
check_trace('nrn_iIn', (65, 70), exp_mean=13.8)
check_trace('nrn_iIn', (70, 80), exp_mean=0.0)
check_trace('nrn_iIn', (80, 85), exp_mean=20.8)
check_trace('nrn_iIn', (85, 90), exp_mean=0.0)
check_trace('nrn_iIn', (90, 100), exp_mean=13.8)
check_trace('nrn_V', (00 + 2, 20), exp_mean=(0.0 / 4.3) - 70)
check_trace('nrn_V', (20 + 2, 25), exp_mean=(20.8 / 4.3) - 70)
check_trace('nrn_V', (25 + 2, 30), exp_mean=(0.0 / 4.3) - 70)
check_trace('nrn_V', (30 + 2, 40), exp_mean=(13.8 / 4.3) - 70)
check_trace('nrn_V', (40 + 2, 45), exp_mean=(20.8 / 4.3) - 70)
check_trace('nrn_V', (45 + 2, 60), exp_mean=(0.0 / 4.3) - 70)
check_trace('nrn_V', (60 + 2, 65), exp_mean=(34.6 / 4.3) - 70)
check_trace('nrn_V', (65 + 2, 70), exp_mean=(13.8 / 4.3) - 70)
check_trace('nrn_V', (70 + 2, 80), exp_mean=(0.0 / 4.3) - 70)
check_trace('nrn_V', (80 + 2, 85), exp_mean=(20.8 / 4.3) - 70)
check_trace('nrn_V', (85 + 2, 90), exp_mean=(0.0 / 4.3) - 70)
check_trace('nrn_V', (90 + 2, 100), exp_mean=(13.8 / 4.3) - 70)
def test_Constructor(self):
d = ComponentClass(
name='D',
aliases=['D1:=dp1', 'D2 := dIn1', 'D3 := SV1'],
regimes=[
Regime('dSV1/dt = -SV1/dp2', name='r1', transitions=On('input', 'SV1=SV1+1'))],
analog_ports=[RecvPort('dIn1'), SendPort('D1'), SendPort('D2')],
parameters=['dp1', 'dp2']
)
c = ComponentClass(
name='C',
aliases=['C1:=cp1', 'C2 := cIn1', 'C3 := SV1'],
regimes=[
Regime(
'dSV1/dt = -SV1/cp2',
transitions=[On('SV1>cp1', do=[OutputEvent('emit')]),
On('spikein', do=[OutputEvent('emit')])],
name='r1',
),
Regime(name='r2', transitions=On('SV1>1', to='r1'))
],
analog_ports=[RecvPort('cIn1'), RecvPort('cIn2'), SendPort('C1'), SendPort('C2')],
parameters=['cp1', 'cp2']
)
# Test Cloner, no hierachy
# Everything should be as before:
c_clone = DynamicsClonerVisitorPrefixNamespace().visit(c)
self.assertEqual(c_clone.name, 'C')
self.assertEqual(set(c_clone.aliases_map.keys()), set(['C1', 'C2', 'C3']))
# - Regimes and Transitions:
self.assertEqual(set(c_clone.regimes_map.keys()), set(['r1', 'r2']))
self.assertEqual(len(list(c_clone.regimes_map['r1'].on_events)), 1)
self.assertEqual(len(list(c_clone.regimes_map['r1'].on_conditions)), 1)
self.assertEqual(len(list(c_clone.regimes_map['r2'].on_events)), 0)
self.assertEqual(len(list(c_clone.regimes_map['r2'].on_conditions)), 1)
self.assertEqual(len(list(c_clone.regimes_map['r2'].on_conditions)), 1)
# - Ports & Parameters:
self.assertEqual(
set(c_clone.query.analog_ports_map.keys()), set(['cIn2', 'cIn1', 'C1', 'C2']))
self.assertEqual(set(c_clone.query.event_ports_map.keys()), set(['spikein', 'emit']))
self.assertEqual(set(c_clone.query.parameters_map.keys()), set(['cp1', 'cp2']))
self.assertEqual(set(c_clone.state_variables_map.keys()), set(['SV1']))
del c_clone
# Test Cloner, 1 level of hierachy
# Everything should be as before:
b = ComponentClass(name='B',
subnodes={'c1': c, 'c2': c},
portconnections=[('c1.C1', 'c2.cIn1'), ('c2.emit', 'c1.spikein'), ])
b_clone = DynamicsClonerVisitorPrefixNamespace().visit(b)
c1_clone = b_clone.get_subnode('c1')
c2_clone = b_clone.get_subnode('c2')
self.assertEqual(c1_clone.name, 'C')
self.assertEqual(c2_clone.name, 'C')
self.assertEqual(set(c1_clone.aliases_map.keys()), set(['c1_C1', 'c1_C2', 'c1_C3']))
self.assertEqual(set(c2_clone.aliases_map.keys()), set(['c2_C1', 'c2_C2', 'c2_C3']))
# - Regimes and Transitions:
self.assertEqual(set(c1_clone.regimes_map.keys()), set(['r1', 'r2']))
self.assertEqual(len(list(c1_clone.regimes_map['r1'].on_events)), 1)
self.assertEqual(len(list(c1_clone.regimes_map['r1'].on_conditions)), 1)
self.assertEqual(len(list(c1_clone.regimes_map['r2'].on_events)), 0)
self.assertEqual(len(list(c1_clone.regimes_map['r2'].on_conditions)), 1)
self.assertEqual(len(list(c1_clone.regimes_map['r2'].on_conditions)), 1)
self.assertEqual(set(c2_clone.regimes_map.keys()), set(['r1', 'r2']))
self.assertEqual(len(list(c2_clone.regimes_map['r1'].on_events)), 1)
self.assertEqual(len(list(c2_clone.regimes_map['r1'].on_conditions)), 1)
self.assertEqual(len(list(c2_clone.regimes_map['r2'].on_events)), 0)
self.assertEqual(len(list(c2_clone.regimes_map['r2'].on_conditions)), 1)
self.assertEqual(len(list(c2_clone.regimes_map['r2'].on_conditions)), 1)
# - Ports & Parameters:
self.assertEqual(
set(c1_clone.query.analog_ports_map.keys()),
set(['c1_cIn1', 'c1_cIn2', 'c1_C1', 'c1_C2']))
self.assertEqual(
set(c2_clone.query.analog_ports_map.keys()),
set(['c2_cIn1', 'c2_cIn2', 'c2_C1', 'c2_C2']))
self.assertEqual(set(c1_clone.query.event_ports_map.keys()),
set(['c1_spikein', 'c1_emit']))
self.assertEqual(set(c2_clone.query.event_ports_map.keys()),
set(['c2_spikein', 'c2_emit']))
self.assertEqual(
set(c1_clone.query.parameters_map.keys()),
set(['c1_cp1', 'c1_cp2']))
self.assertEqual(
set(c2_clone.query.parameters_map.keys()),
set(['c2_cp1', 'c2_cp2']))
self.assertEqual(
set(c1_clone.state_variables_map.keys()),
set(['c1_SV1']))
self.assertEqual(
set(c2_clone.state_variables_map.keys()),
set(['c2_SV1']))
# - Port Connections:
self.assertEqual(
set(b_clone.portconnections),
set([(NSA('c1.c1_C1'), NSA('c2.c2_cIn1')),
(NSA('c2.c2_emit'), NSA('c1.c1_spikein'))])
)
del b_clone
del c1_clone
del c2_clone
# Two Levels of nesting:
a = ComponentClass(name='A',
subnodes={'b1': b, 'b2': b, 'c3': c},
portconnections=[
('b1.c1.emit', 'c3.spikein'),
('c3.C2', 'b1.c2.cIn2')
]
)
a_clone = DynamicsClonerVisitorPrefixNamespace().visit(a)
b1_clone = a_clone.get_subnode('b1')
b2_clone = a_clone.get_subnode('b2')
b1c1_clone = a_clone.get_subnode('b1.c1')
b1c2_clone = a_clone.get_subnode('b1.c2')
b2c1_clone = a_clone.get_subnode('b2.c1')
b2c2_clone = a_clone.get_subnode('b2.c2')
c3_clone = a_clone.get_subnode('c3')
clones = [b1_clone,
b2_clone,
b1c1_clone,
b1c2_clone,
b2c1_clone,
b2c2_clone,
c3_clone, ]
# Check for duplicates:
self.assertEquals(len(clones), len(set(clones)))
# Names:
self.assertEqual(b1_clone.name, 'B')
self.assertEqual(b2_clone.name, 'B')
self.assertEqual(b1c1_clone.name, 'C')
self.assertEqual(b1c2_clone.name, 'C')
self.assertEqual(c3_clone.name, 'C')
self.assertEqual(b2c1_clone.name, 'C')
self.assertEqual(b2c2_clone.name, 'C')
# Aliases:
self.assertEqual(set(b1_clone.aliases_map.keys()), set([]))
self.assertEqual(set(b2_clone.aliases_map.keys()), set([]))
self.assertEqual(set(b1c1_clone.aliases_map.keys()), set(
['b1_c1_C1', 'b1_c1_C2', 'b1_c1_C3']))
self.assertEqual(set(b1c2_clone.aliases_map.keys()), set(
['b1_c2_C1', 'b1_c2_C2', 'b1_c2_C3']))
self.assertEqual(set(b2c1_clone.aliases_map.keys()), set(
['b2_c1_C1', 'b2_c1_C2', 'b2_c1_C3']))
self.assertEqual(set(b2c2_clone.aliases_map.keys()), set(
['b2_c2_C1', 'b2_c2_C2', 'b2_c2_C3']))
self.assertEqual(set(c3_clone.aliases_map.keys()), set(['c3_C1', 'c3_C2', 'c3_C3']))
# Regimes:
self.assertEqual(set(b1_clone.regimes_map.keys()), set([]))
self.assertEqual(set(b2_clone.regimes_map.keys()), set([]))
self.assertEqual(set(b1c1_clone.regimes_map.keys()), set(['r1', 'r2']))
self.assertEqual(set(b1c2_clone.regimes_map.keys()), set(['r1', 'r2']))
self.assertEqual(set(b2c1_clone.regimes_map.keys()), set(['r1', 'r2']))
self.assertEqual(set(b2c2_clone.regimes_map.keys()), set(['r1', 'r2']))
self.assertEqual(set(c3_clone.regimes_map.keys()), set(['r1', 'r2']))
self.assertEqual(len(list(b1c1_clone.regimes_map['r1'].on_events)), 1)
self.assertEqual(len(list(b1c1_clone.regimes_map['r1'].on_conditions)), 1)
self.assertEqual(len(list(b1c1_clone.regimes_map['r2'].on_events)), 0)
self.assertEqual(len(list(b1c1_clone.regimes_map['r2'].on_conditions)), 1)
self.assertEqual(len(list(b1c1_clone.regimes_map['r2'].on_conditions)), 1)
self.assertEqual(len(list(b1c2_clone.regimes_map['r1'].on_events)), 1)
self.assertEqual(len(list(b1c2_clone.regimes_map['r1'].on_conditions)), 1)
self.assertEqual(len(list(b1c2_clone.regimes_map['r2'].on_events)), 0)
self.assertEqual(len(list(b1c2_clone.regimes_map['r2'].on_conditions)), 1)
self.assertEqual(len(list(b1c2_clone.regimes_map['r2'].on_conditions)), 1)
self.assertEqual(len(list(b2c1_clone.regimes_map['r1'].on_events)), 1)
self.assertEqual(len(list(b2c1_clone.regimes_map['r1'].on_conditions)), 1)
self.assertEqual(len(list(b2c1_clone.regimes_map['r2'].on_events)), 0)
self.assertEqual(len(list(b2c1_clone.regimes_map['r2'].on_conditions)), 1)
self.assertEqual(len(list(b2c1_clone.regimes_map['r2'].on_conditions)), 1)
self.assertEqual(len(list(b2c2_clone.regimes_map['r1'].on_events)), 1)
self.assertEqual(len(list(b2c2_clone.regimes_map['r1'].on_conditions)), 1)
self.assertEqual(len(list(b2c2_clone.regimes_map['r2'].on_events)), 0)
self.assertEqual(len(list(b2c2_clone.regimes_map['r2'].on_conditions)), 1)
self.assertEqual(len(list(b2c2_clone.regimes_map['r2'].on_conditions)), 1)
self.assertEqual(len(list(c3_clone.regimes_map['r1'].on_events)), 1)
self.assertEqual(len(list(c3_clone.regimes_map['r1'].on_conditions)), 1)
self.assertEqual(len(list(c3_clone.regimes_map['r2'].on_events)), 0)
self.assertEqual(len(list(c3_clone.regimes_map['r2'].on_conditions)), 1)
self.assertEqual(len(list(c3_clone.regimes_map['r2'].on_conditions)), 1)
# Ports, params and state-vars:
# c1:
self.assertEqual(set(b1c1_clone.query.analog_ports_map.keys()), set(
['b1_c1_cIn1', 'b1_c1_cIn2', 'b1_c1_C1', 'b1_c1_C2']))
self.assertEqual(
set(b1c1_clone.query.event_ports_map.keys()), set(['b1_c1_spikein', 'b1_c1_emit']))
self.assertEqual(
set(b1c1_clone.query.parameters_map.keys()), set(['b1_c1_cp1', 'b1_c1_cp2']))
self.assertEqual(set(b1c1_clone.state_variables_map.keys()), set(['b1_c1_SV1']))
self.assertEqual(set(b1c2_clone.query.analog_ports_map.keys()), set(
['b1_c2_cIn1', 'b1_c2_cIn2', 'b1_c2_C1', 'b1_c2_C2']))
self.assertEqual(
set(b1c2_clone.query.event_ports_map.keys()), set(['b1_c2_spikein', 'b1_c2_emit']))
self.assertEqual(
set(b1c2_clone.query.parameters_map.keys()), set(['b1_c2_cp1', 'b1_c2_cp2']))
self.assertEqual(set(b1c2_clone.state_variables_map.keys()), set(['b1_c2_SV1']))
self.assertEqual(set(b2c1_clone.query.analog_ports_map.keys()),
set(['b2_c1_cIn1', 'b2_c1_cIn2', 'b2_c1_C1', 'b2_c1_C2']))
self.assertEqual(
set(b2c1_clone.query.event_ports_map.keys()), set(['b2_c1_spikein', 'b2_c1_emit']))
self.assertEqual(
set(b2c1_clone.query.parameters_map.keys()), set(['b2_c1_cp1', 'b2_c1_cp2']))
self.assertEqual(set(b2c1_clone.state_variables_map.keys()), set(['b2_c1_SV1']))
self.assertEqual(set(b2c2_clone.query.analog_ports_map.keys()), set(
['b2_c2_cIn1', 'b2_c2_cIn2', 'b2_c2_C1', 'b2_c2_C2']))
self.assertEqual(
set(b2c2_clone.query.event_ports_map.keys()), set(['b2_c2_spikein', 'b2_c2_emit']))
self.assertEqual(
set(b2c2_clone.query.parameters_map.keys()), set(['b2_c2_cp1', 'b2_c2_cp2']))
self.assertEqual(set(b2c2_clone.state_variables_map.keys()), set(['b2_c2_SV1']))
self.assertEqual(set(c3_clone.query.analog_ports_map.keys()), set(
['c3_cIn1', 'c3_cIn2', 'c3_C1', 'c3_C2']))
self.assertEqual(
set(c3_clone.query.event_ports_map.keys()), set(['c3_spikein', 'c3_emit']))
self.assertEqual(
set(c3_clone.query.parameters_map.keys()), set(['c3_cp1', 'c3_cp2']))
self.assertEqual(set(c3_clone.state_variables_map.keys()), set(['c3_SV1']))
self.assertEqual(set(b1_clone.query.analog_ports_map.keys()), set([]))
self.assertEqual(set(b1_clone.query.event_ports_map.keys()), set([]))
self.assertEqual(set(b1_clone.query.parameters_map.keys()), set([]))
self.assertEqual(set(b1_clone.state_variables_map.keys()), set([]))
self.assertEqual(set(b2_clone.query.analog_ports_map.keys()), set([]))
self.assertEqual(set(b2_clone.query.event_ports_map.keys()), set([]))
self.assertEqual(set(b2_clone.query.parameters_map.keys()), set([]))
self.assertEqual(set(b2_clone.state_variables_map.keys()), set([]))
# Port Connections
self.assertEqual(
set(b1_clone.portconnections),
set([
(NSA('c1.b1_c1_C1'), NSA('c2.b1_c2_cIn1')),
(NSA('c2.b1_c2_emit'), NSA('c1.b1_c1_spikein')),
])
)
self.assertEqual(
set(b2_clone.portconnections),
set([
(NSA('c1.b2_c1_C1'), NSA('c2.b2_c2_cIn1')),
(NSA('c2.b2_c2_emit'), NSA('c1.b2_c1_spikein')),
])
)
self.assertEqual(
set(a_clone.portconnections),
set([
(NSA('b1.c1.b1_c1_emit'), NSA('c3.c3_spikein')),
(NSA('c3.c3_C2'), NSA('b1.c2.b1_c2_cIn2')),
])
)
def get_compound_component():
"""Cannot yet be implemented in PyDSTool
"""
from nineml.abstraction_layer.testing_utils import RecordValue
from nineml.abstraction_layer import ComponentClass, Regime, On, OutputEvent, SendPort, ReducePort
emitter = ComponentClass(
name='EventEmitter',
parameters=['cyclelength'],
regimes=[
Regime(transitions=On('t > tchange + cyclelength',
do=[OutputEvent('emit'), 'tchange=t'])),
])
ev_based_cc = ComponentClass(
name='EventBasedCurrentClass',
parameters=['dur', 'i'],
analog_ports=[SendPort('I')],
regimes=[
Regime(transitions=[
On('inputevent', do=['I=i', 'tchange = t']),
On('t>tchange + dur', do=['I=0', 'tchange=t'])
])
])
pulsing_emitter = ComponentClass(name='pulsing_cc',
subnodes={
'evs': emitter,
'cc': ev_based_cc
},
portconnections=[('evs.emit',
'cc.inputevent')])
nrn = ComponentClass(
name='LeakyNeuron',
parameters=['Cm', 'gL', 'E'],
regimes=[
Regime('dV/dt = (iInj + (E-V)*gL )/Cm'),
],
aliases=['iIn := iInj'],
analog_ports=[SendPort('V'),
ReducePort('iInj', reduce_op='+')],
)
combined_comp = ComponentClass(name='Comp1',
subnodes={
'nrn': nrn,
'cc1': pulsing_emitter,
'cc2': pulsing_emitter
},
portconnections=[('cc1.cc.I', 'nrn.iInj'),
('cc2.cc.I', 'nrn.iInj')])
combined_comp = al.flattening.flatten(combined_comp)
## records = [
## RecordValue(what='cc1_cc_I', tag='Current', label='Current Clamp 1'),
## RecordValue(what='cc2_cc_I', tag='Current', label='Current Clamp 2'),
## RecordValue(what='nrn_iIn', tag='Current', label='Total Input Current'),
## RecordValue(what='nrn_V', tag='Voltage', label='Neuron Voltage'),
## RecordValue(what='cc1_cc_tchange', tag='Tchange', label='tChange CC1'),
## RecordValue(what='cc2_cc_tchange', tag='Tchange', label='tChange CC2'),
## RecordValue(what='regime', tag='Regime', label='Regime'),
## ]
parameters = al.flattening.ComponentFlattener.flatten_namespace_dict({
'cc1.cc.i':
13.8,
'cc1.cc.dur':
10,
'cc1.evs.cyclelength':
30,
'cc2.cc.i':
20.8,
'cc2.cc.dur':
5.0,
'cc2.evs.cyclelength':
20,
'nrn.gL':
4.3,
'nrn.E':
-70
})
return combined_comp, parameters