def test_full_bus_with_integration(self): sm = som.SOM() sm.initialize_root() root = sm.get_root() peripheral = sm.insert_bus() peripheral.set_name("peripheral") memory = sm.insert_bus() memory.set_name("memory") d1 = sdbc.create_device_record(name="device 1", size=0x100) d2 = sdbc.create_device_record(name="device 2", size=0x100) m1 = sdbc.create_device_record(name="memory 1", size=0x10000) m2 = sdbc.create_device_record(name="memory 2", size=0x20000) intr = sdbc.create_integration_record("Integration Data", vendor_id=0x800BEAF15DEADC03, device_id=0x00000000) peripheral.set_child_spacing(0x0100000000) sm.insert_component(peripheral, intr) sm.insert_component(peripheral, d1) sm.insert_component(peripheral, d2) sm.insert_component(memory, m1) sm.insert_component(memory, m2) rom = generate_rom_image(sm) rom_in = sdbc.convert_rom_to_32bit_buffer(rom) #rom_in = ROM2 #print_sdb_rom(rom_in) sm = parse_rom_image(rom_in) rom_out = generate_rom_image(sm) rom_out = sdbc.convert_rom_to_32bit_buffer(rom_out) #print_sdb_rom(rom_out) #compare_roms(rom_in, rom_out) self.assertEqual(rom_in, rom_out)
def test_generate_one_sub_bus_with_url(self): sm = som.SOM() sm.initialize_root() root = sm.get_root() peripheral = sm.insert_bus() peripheral.set_name("peripheral") memory = sm.insert_bus() memory.set_name("memory") d1 = sdbc.create_device_record(name="device 1", size=0x100) d2 = sdbc.create_device_record(name="device 2", size=0x100) m1 = sdbc.create_device_record(name="memory 1", size=0x10000) m2 = sdbc.create_device_record(name="memory 2", size=0x20000) intr = sdbc.create_integration_record("Integration Data", vendor_id=0x800BEAF15DEADC03, device_id=0x00000000) url = sdbc.create_repo_url_record("http://www.geocities.com") synthesis = sdbc.create_synthesis_record("Synthesis Name", 123, "cool tool", 1.0, "jeff") sm.insert_component(root, url) sm.insert_component(root, synthesis) peripheral.set_child_spacing(0x0100000000) sm.insert_component(peripheral, intr) sm.insert_component(peripheral, d1) sm.insert_component(peripheral, d2) sm.insert_component(memory, m1) sm.insert_component(memory, m2) rom = generate_rom_image(sm) rom_in = sdbc.convert_rom_to_32bit_buffer(rom) #print_sdb(rom) sm = parse_rom_image(rom_in) rom_out = generate_rom_image(sm) rom_out = sdbc.convert_rom_to_32bit_buffer(rom_out) #print_sdb_rom(rom_out) #compare_roms(rom_in, rom_out) self.assertEqual(rom_in, rom_out)
def setUp(self): self.status = Status() self.status.set_level("error") self.som = som.SOM()
def setUp(self): self.som = som.SOM()
def gen_som(self, tags={}, buf="", user_paths=[], debug=False): tags = copy.deepcopy(tags) self.rom_element_count = 0 if "MEMORY" not in tags: tags["MEMORY"] = {} self.user_paths = user_paths board_name = tags["board"].lower() if not utils.board_exists(board_name): try: utils.install_remote_board_package(board_name) except IBuilderError as e: raise IBuilderError( \ "Board %s could not be found, Attempted to " \ "find it in the remote table and failed. If " \ "this is a local board make sure to run the " \ "local install" % (board_name)) image_id = 0 for key in tags.keys(): if key.lower() == "image_id": image_id = tags[key] sm = som.SOM() sm.initialize_root() root = sm.get_root() #Add 1 for Root self.rom_element_count += 1 peripheral = sm.insert_bus(root, name="peripheral") memory = sm.insert_bus(root, name="memory") #Add one for SDB ROM self.rom_element_count += 1 self.rom_element_count += 1 version_major = device_manager.get_device_id_from_name("SDB") sdb_rom = sdbc.create_device_record(name="SDB", version_major=version_major) #Add two for bridge and one extra for empty self.rom_element_count += 3 #Peripheral Bus #Add one for interconnect self.rom_element_count += 1 ''' #Move all the platform peripherals to the front of the SDB Bus temp_unordered_platform_tags = {} temp_platform_tags = OrderedDict() temp_periph_tags = OrderedDict() minor_dict = {} peripheral_id = device_manager.get_device_id_from_name("platform") for key in tags["SLAVES"]: filename = tags["SLAVES"][key]["filename"] absfilename = utils.find_rtl_file_location(filename, self.user_paths) f = open(absfilename, 'r') slave_buffer = f.read() f.close() per = sdbc.create_device_record(name = key) per.parse_buffer(slave_buffer) if per.get_abi_version_major_as_int() == peripheral_id: minor = per.get_abi_version_minor_as_int() minor_dict[minor] = key temp_unordered_platform_tags[key] = tags["SLAVES"][key] else: temp_periph_tags[key] = tags["SLAVES"][key] if len(minor_dict.keys()) > 0: #Order the platforms in terms of their minor numbers ordered_keys = sorted(minor_dict.keys(), key=int) for okey in ordered_keys: key = minor_dict[okey] temp_platform_tags[key] = temp_unordered_platform_tags[key] #Add all the peripheral slaves for key in temp_periph_tags: temp_platform_tags[key] = temp_periph_tags[key] #Put the slaves back in the original dictionary tags["SLAVES"] = temp_platform_tags ''' #Add one per peripheral for i in range(0, len(tags["SLAVES"])): key = tags["SLAVES"].keys()[i] if is_integration_required(tags["SLAVES"][key]): ir = generate_integration_record(tags["SLAVES"], key) #print "Inserting Integration record for: %s" % key sm.insert_component(peripheral, ir) filename = tags["SLAVES"][key]["filename"] absfilename = utils.find_rtl_file_location(filename, self.user_paths) f = open(absfilename, 'r') slave_buffer = f.read() f.close() per = sdbc.create_device_record(name=key) per.parse_buffer(slave_buffer) per.set_name(str(key)) sm.insert_component(peripheral, per) self.rom_element_count += 1 #Add one for empty self.rom_element_count += 1 #Memory Bus #Add one for interconnect self.rom_element_count += 1 #Add one per memory peripheral for i in range(0, len(tags["MEMORY"])): key = tags["MEMORY"].keys()[i] name = tags["MEMORY"][key]["filename"] absfilename = utils.find_rtl_file_location(name, self.user_paths) f = open(absfilename, 'r') memory_buffer = f.read() f.close() mem = sdbc.create_device_record(name=key) mem.parse_buffer(memory_buffer) mem.set_name(str(key)) sm.insert_component(memory, mem) self.rom_element_count += 1 #add one for empty self.rom_element_count += 1 #TODO: add Add one for URL of repo ?? Maybe #TODO: add Add one for Synthesis Record self.rom_element_count += 1 sdb_rom.set_size(self.rom_element_count * sdbc.SDB_ROM_RECORD_LENGTH) sm.insert_component(peripheral, sdb_rom, 0) #Generate the ROM image sm.set_child_spacing(root, 0x0100000000) sm.set_child_spacing(peripheral, 0x0001000000) return sm