Example #1
0
def main():
    tests = fpgamux.create()
    threads = []
    tokens = tests[0].enumerate()
    if not tokens:
        tests[0].logger.error("Could not find suitable accelerator")
        sys.exit(EX_UNAVAILABLE)
    with fpga.open(tokens[0]) as h:
        parent = fpga.properties(h).parent
        with fpga.open(parent, fpga.OPEN_SHARED) as d:
            for test in tests:
                threads.append(
                    threading.Thread(target=mux_run, args=(test, h, d)))

            for t in threads:
                t.start()
            for t in threads:
                t.join()

        return EX_OK
    return EX_SOFTWARE
Example #2
0
def main():
    test = fpgadiag.create()
    if not test.setup():
        sys.exit(EX_USAGE)
    tokens = test.enumerate()
    if not tokens:
        test.logger.error("Could not find suitable accelerator")
        sys.exit(EX_UNAVAILABLE)
    with fpga.open(tokens[0]) as handle:
        parent = fpga.properties(handle).parent
        with fpga.open(parent, fpga.OPEN_SHARED) as device:
            try:
                test.logger.info("{} OPAE {}, build {}".format(
                    basename(sys.argv[0]), fpga.version(), fpga.build()))
                test.run(handle, device)
            except KeyboardInterrupt:
                test.logger.info("User requested interrupt - ending execution")
            except RuntimeError as e:
                test.logger.error("Error running test: %s", e)
            else:
                return EX_OK
    return EX_SOFTWARE
Example #3
0
import time
from opae import fpga

NLB0 = "C6AA954A-9B91-4A37-ABC1-1D9F0709DCC3"


def cl_align(addr):
    return addr >> 6


tokens = fpga.enumerate(type=fpga.ACCELERATOR, guid=NLB0)
assert tokens, "Could not enumerate accelerator: {}".format(NlB0)

with fpga.open(tokens[0], fpga.OPEN_SHARED) as handle:
    src = fpga.allocate_shared_buffer(handle, 4096)
    dst = fpga.allocate_shared_buffer(handle, 4096)

    handle.write_csr64(0x1018, cl_align(src.io_address()))  # cacheline-aligned
    handle.write_csr64(0x1020, cl_align(dst.io_address()))  # cacheline-aligned
    handle.write_csr32(0x1028, 4096)
    r32_val = handle.read_csr32(0x1004)
    while r32_val & 0x2 != 0x2:
        time.sleep(0.001)
        r32_val = handle.read_csr32(0x1004)