Example #1
0
 def test_get_bits_from_int(self):
     # default bits list size is 16
     self.assertEqual(len(utils.get_bits_from_int(0)), 16)
     # for 8 size (positional arg)
     self.assertEqual(len(utils.get_bits_from_int(0, 8)), 8)
     # for 32 size (named arg)
     self.assertEqual(len(utils.get_bits_from_int(0, val_size=32)), 32)
     # test binary decode
     self.assertEqual(utils.get_bits_from_int(6, 4),
                      [False, True, True, False])
Example #2
0
 if regs and not clone_regs:
     clone_regs = list(regs)
 # display regs value
 # current line
 c_line = 9
 for i, value in enumerate(regs):
     # current cursor and line
     c_line  += 1
     c_cursor = 4
     # line name (ME or Txx)
     stdscr.addstr(c_line, c_cursor,
                   "ME    " if not i else "T%02d   " % i,
                   curses.A_BOLD)
     c_cursor += 6
     # builts bits list for regs and clone
     bits = utils.get_bits_from_int(value, val_size=16)
     bits.reverse()
     clone_bits = utils.get_bits_from_int(clone_regs[i],
                                          val_size=16)
     clone_bits.reverse()
     # bit value (ts number or ".")
     for x, bit in enumerate(bits):
         ts_label = str(x+1)[-1:]
         if clone_bits[x] == bits[x]:
             stdscr.addstr(c_line, c_cursor,
                           ts_label if bit else ".",
                           curses.A_NORMAL)
         else:
             stdscr.addstr(c_line, c_cursor,
                           ts_label if bit else ".",
                           curses.A_REVERSE)
Example #3
0
if not c.open():
    print("unable to connect to "+SERVER_HOST+":"+str(SERVER_PORT))
    sys.exit(1)

# banner
sys.stdout.write("----------------------------------------" + EOL)
sys.stdout.write("NTS   0 0 0 0  0 0 0 0  0 1 1 1  1 1 1 1" + EOL)
sys.stdout.write("      1 2 3 4  5 6 7 8  9 0 1 2  3 4 5 6" + EOL)
sys.stdout.write("----------------------------------------" + EOL)

# do modbus read
regs = c.read_holding_registers(20610, 20)
c.close()

# if read ok
if regs:
    for i, value in enumerate(regs):
        # builts bits list
        bits = utils.get_bits_from_int(value, val_size=16)
        bits.reverse()
        # line name (ME or Txx)
        sys.stdout.write("ME    " if not i else "T%02d   " % i)
        # bit value (1 or " ")
        for x, bit in enumerate(bits):
            sys.stdout.write("1 " if bit else ". ")
            if not (x+1)%4:
                sys.stdout.write(" ")
        sys.stdout.write(EOL)