async def test(top):
"""
Hold the payload DUT in reset via the logic analyzer
Meanwhile, test that the management interface can access memory
"""
print("--> pybfms.init()")
await pybfms.init()
print("<-- pybfms.init()")
u_wb: WbInitiatorBfm = pybfms.find_bfm(".*u_wb")
u_la: LaInitiatorBfm = pybfms.find_bfm(".*u_la")
print("u_wb=" + str(u_wb))
print("u_la=" + str(u_la))
# Bring the system out of reset
la_utils = LaUtils(u_la)
print("--> reset_cycle_dut")
await la_utils.reset_cycle_dut(100)
print("<-- reset_cycle_dut")
await la_utils.set_dut_clock_control(False)
# Load a short program that toggles the GPIO lines
gpio_toggle_program = [
0x010000b7, 0x20008093, 0x00000113, 0x0020a023, 0x00110113, 0xff9ff06f,
0x00000000
]
for i, data in enumerate(gpio_toggle_program):
print("Write: " + hex(0x30000000 + 4 * i) + " " + hex(data))
await u_wb.write(0x30000000 + 4 * i, data, 0xF)
# Take back clock control
await la_utils.set_dut_clock_control(True)
await la_utils.set_sys_reset(False)
# Release the processor from reset
await la_utils.set_core_reset(True)
for i in range(10):
await la_utils.reset_cycle_dut(10)
await la_utils.set_core_reset(False)
# Clock the system, while observing GPIO via the logic analyzer
gpio_out_last = None
for i in range(1000):
await la_utils.clock_dut()
gpio_out_new = la_utils.get_gpio_out()
if gpio_out_last is None or gpio_out_new != gpio_out_last:
print("New: " + hex(gpio_out_new))
gpio_out_last = gpio_out_new
if gpio_out_last == 0xF:
break
if gpio_out_last is None:
raise cocotb.result.TestError("No gpio activity")
if gpio_out_last != 0xF:
raise cocotb.result.TestError(
"GPIO did something, but we didn't reach 0xF")
async def entry(dut):
await pybfms.init()
reg_bfm: WbInitiatorBfm = pybfms.find_bfm(".*u_reg_bfm", WbInitiatorBfm)
irq_bfm: GpioBfm = pybfms.find_bfm(".*u_irq_bfm", GpioBfm)
spi_bfm: SpiTargetBfm = pybfms.find_bfm(".*u_spi_bfm")
dat = await reg_bfm.read(0x0)
dat |= 0xC0 # Enable
dat = await reg_bfm.write(0x0, dat, 0xF)
recv_data = []
# Collect the data received
def recv_data_cb(data):
nonlocal recv_data
print("recv_data_cb: " + hex(data))
recv_data.append(data)
spi_bfm.recv_f = recv_data_cb
count = 10
i = 0
while i < count:
# Send data in blocks of 4
start_i = i
for x in range(4):
if i < count:
send_dat = 0x5A + i
await reg_bfm.write(0x8, send_dat, 0xF)
i += 1
# Wait for an interrupt
for x in range(i - start_i):
while True:
val = await irq_bfm.on_in()
dat = await reg_bfm.read(0x4) # status
dat |= 0x8 # clear IRQ
await reg_bfm.write(0x4, dat, 0xF) # status
if val:
break
# Check data
for x in range(4):
if start_i < count:
send_dat = 0x5A + start_i
recv = recv_data.pop(0)
if send_dat != recv:
raise Exception("Expect " + hex(send_dat) + " receive " +
hex(recv))
start_i += 1
async def test(top):
await pybfms.init()
reg_bfm = pybfms.find_bfm(".*u_reg_bfm") #, WbInitiatorBfm)
irq_bfm = pybfms.find_bfm(".*u_irq") #, EventBfm)
tt = TrafficTest(reg_bfm, irq_bfm)
await tt.run()
async def test(top):
await pybfms.init()
u_bram = pybfms.find_bfm(".*u_bram")
u_dbg_bfm: RiscvDebugBfm = pybfms.find_bfm(".*u_dbg_bfm")
u_uart_bfm: UartBfm = pybfms.find_bfm(".*u_uart_bfm")
uart_bfm_sw: UartBfmSwAPI = UartBfmSwAPI([u_uart_bfm])
sw_image = cocotb.plusargs["sw.image"]
u_dbg_bfm.load_elf(sw_image)
u_dbg_bfm.register_export_api(UartBfmSwAPI)
u_dbg_bfm.set_export_impl(UartBfmSwAPI, uart_bfm_sw)
print("Note: loading image " + sw_image)
with open(sw_image, "rb") as f:
elffile = ELFFile(f)
symtab = elffile.get_section_by_name('.symtab')
# Find the section that contains the data we need
section = None
for i in range(elffile.num_sections()):
shdr = elffile._get_section_header(i)
# print("sh_addr=" + hex(shdr['sh_addr']) + " sh_size=" + hex(shdr['sh_size']) + " flags=" + hex(shdr['sh_flags']))
# print(" keys=" + str(shdr.keys()))
if shdr['sh_size'] != 0 and (shdr['sh_flags'] & 0x2) == 0x2:
section = elffile.get_section(i)
data = section.data()
addr = shdr['sh_addr']
j = 0
while j < len(data):
word = (data[j + 0] << (8 * 0))
word |= (data[j + 1] <<
(8 * 1)) if j + 1 < len(data) else 0
word |= (data[j + 2] <<
(8 * 2)) if j + 2 < len(data) else 0
word |= (data[j + 3] <<
(8 * 3)) if j + 3 < len(data) else 0
# print("Write: " + hex(addr) + "(" + hex(int((addr & 0xFFFFF)/4)) + ") " + hex(word))
u_bram.write_nb(int((addr & 0xFFFFF) / 4), word, 0xF)
addr += 4
j += 4
# Wait for the main function to exit
print("--> wait main")
await u_dbg_bfm.on_exit("main")
print("<-- wait main")
# Wait for all objections to be dropped
await pybfms.objection.inst().wait()
async def test(top):
await pybfms.init()
u_bram = pybfms.find_bfm(".*u_bram")
u_dbg_bfm: RiscvDebugBfm = pybfms.find_bfm(".*u_dbg_bfm")
sw_image = cocotb.plusargs["sw.image"]
u_dbg_bfm.load_elf(sw_image)
print("Note: loading image " + sw_image)
with open(sw_image, "rb") as f:
elffile = ELFFile(f)
# Find the section that contains the data we need
section = None
for i in range(elffile.num_sections()):
shdr = elffile._get_section_header(i)
# print("sh_addr=" + hex(shdr['sh_addr']) + " sh_size=" + hex(shdr['sh_size']) + " flags=" + hex(shdr['sh_flags']))
# print(" keys=" + str(shdr.keys()))
print("sh_size=" + hex(shdr['sh_size']) + " sh_flags=" +
hex(shdr['sh_flags']))
if shdr['sh_size'] != 0 and (shdr['sh_flags'] & 0x2) == 0x2:
section = elffile.get_section(i)
data = section.data()
addr = shdr['sh_addr']
j = 0
while j < len(data):
word = (data[j + 0] << (8 * 0))
word |= (data[j + 1] <<
(8 * 1)) if j + 1 < len(data) else 0
word |= (data[j + 2] <<
(8 * 2)) if j + 2 < len(data) else 0
word |= (data[j + 3] <<
(8 * 3)) if j + 3 < len(data) else 0
print("Write: " + hex(addr) + "(" +
hex(int((addr & 0xFFFFF) / 4)) + ") " + hex(word))
u_bram.write_nb(int((addr & 0xFFFFF) / 4), word, 0xF)
addr += 4
j += 4
print("Hello")
print("--> wait main")
await u_dbg_bfm.on_exit("done")
print("<-- wait main")
async def entry(dut):
print("Hello")
await pybfms.init()
reg_bfm: WbInitiatorBfm = pybfms.find_bfm(".*u_reg_bfm", WbInitiatorBfm)
irq_bfm: GpioBfm = pybfms.find_bfm(".*u_irq_bfm", GpioBfm)
spi_bfm: SpiTargetBfm = pybfms.find_bfm(".*u_spi_bfm")
dat = await reg_bfm.read(0x0)
dat |= 0xC0 # Enable
dat = await reg_bfm.write(0x0, dat, 0xF)
recv_data = 0
def recv_data_cb(data):
nonlocal recv_data
recv_data = data
spi_bfm.recv_f = recv_data_cb
for i in range(10):
# Send data
send_dat = 0x5A + i
await reg_bfm.write(0x8, send_dat, 0xF)
# Wait for an interrupt
while True:
val = await irq_bfm.on_in()
if val:
break
dat = await reg_bfm.read(0x4) # status
dat |= 0x8 # clear IRQ
await reg_bfm.write(0x4, dat, 0xF) # status
if send_dat != recv_data:
raise Exception("Expect " + hex(send_dat) + " receive " +
hex(recv_data))
print("Done: data=" + str(recv_data))
await cocotb.triggers.Timer(1, units="ms")
async def entry(dut):
print("entry")
await pybfms.init()
u_bfm : WbInitiatorBfm = pybfms.find_bfm(".*u_bfm")
print("u_bfm=" + str(u_bfm))
for i in range(10):
print("--> write")
await u_bfm.write(0x80000000+4*i, i, 0xF)
print("<-- write")
pass
async def test(top):
await pybfms.init()
u_reg_bfm = pybfms.find_bfm(".*u_reg_bfm")
exp = [(0, 0), (0, 0), (0, 0), (0, 0), (0, 0), (0, 0), (0, 0), (0, 0),
(0, 0), (0, 0), (0, 0), (0, 0), (0, 0), (0, 0), (0, 0), (0, 0),
(0, 0), (0, 0), (0, 0), (0, 0), (0, 0), (0, 0), (0, 0), (0, 0),
(0, 0), (0, 0), (0, 0), (0, 0)]
for i, vm in enumerate(exp):
await u_reg_bfm.write(4 * i, 0x5555aaa5, 0xF)
data = await u_reg_bfm.read(4 * i)
print("Read: " + hex(4 * i) + " " + hex(data))
print("Hello")
pass
def __init__(self):
self.out_bfm = pybfms.find_bfm(".*u_dut")
self.mon_bfm = pybfms.find_bfm(".*u_mon")
self.mon_bfm.add_listener(self)
self.recv_data_l = []
pass
async def test(top):
"""
Hold the payload DUT in reset via the logic analyzer
Meanwhile, test that the management interface can access memory
"""
await pybfms.init()
u_wb: WbInitiatorBfm = pybfms.find_bfm(".*u_wb")
u_la: LaInitiatorBfm = pybfms.find_bfm(".*u_la")
# Bring the system out of reset, while leaving the
# FWRISC core in reset
la_utils = LaUtils(u_la)
await la_utils.reset_cycle_dut(100)
await la_utils.set_dut_clock_control(False)
# Test that we can write and read dut 'ROM'
n_fails = 0
r = Random(0)
# First, do word accesses
print("** Testing Word Accesses")
wr_data = []
for i in range(16):
data = r.randint(0, 0xFFFFFFFF)
print("Write: " + hex(0x30000000 + 4 * i) + " = " + hex(data))
await u_wb.write(0x30000000 + 4 * i, data, 0xF)
wr_data.append(data)
print("wr_data[" + str(i) + "] = " + hex(wr_data[i]))
for i in range(16):
data = await u_wb.read(0x30000000 + 4 * i)
if wr_data[i] == data:
print("PASS: "******"FAIL: " + hex(0x30000000 + 4 * i) + " expect " +
hex(wr_data[i]) + " receive " + hex(data))
raise cocotb.result.TestError("Addr: " + hex(0x30000000 + 4 * i) +
" expect " + hex(wr_data[i]) +
" receive " + hex(data))
n_fails += 1
# First, do word accesses
print("** Testing Half-word Accesses")
wr_data = []
for i in range(32):
data = r.randint(0, 0xFFFF)
wr_data.append(data)
data <<= (16 * (i % 2))
print("Write: " + hex(0x30000000 + 2 * i) + " = " + hex(data))
await u_wb.write(0x30000000 + 2 * i, data, 0x3 if
(i % 2) == 0 else 0xC)
print("wr_data[" + str(i) + "] = " + hex(wr_data[i]))
for i in range(32):
data = await u_wb.read(0x30000000 + 2 * i)
if (i % 2) != 0:
data >>= 16
data &= 0xFFFF
if wr_data[i] == data:
print("PASS: "******"FAIL: " + hex(0x30000000 + 2 * i) + " expect " +
hex(wr_data[i]) + " receive " + hex(data))
raise cocotb.result.TestError("Addr: " + hex(0x30000000 + 2 * i) +
" expect " + hex(wr_data[i]) +
" receive " + hex(data))
n_fails += 1
# First, do word accesses
print("** Testing Byte Accesses")
wr_data = []
for i in range(64):
data = r.randint(0, 0xFF)
wr_data.append(data)
data <<= (8 * (i % 4))
print("Write: " + hex(0x30000000 + i) + " = " + hex(data))
await u_wb.write(0x30000000 + i, data, (1 << (i % 4)))
print("wr_data[" + str(i) + "] = " + hex(wr_data[i]))
for i in range(64):
data = await u_wb.read(0x30000000 + i)
data >>= (8 * (i % 4))
data &= 0xFF
if wr_data[i] == data:
print("PASS: "******"FAIL: " + hex(0x30000000 + i) + " expect " +
hex(wr_data[i]) + " receive " + hex(data))
raise cocotb.result.TestError("Addr: " + hex(0x30000000 + i) +
" expect " + hex(wr_data[i]) +
" receive " + hex(data))
n_fails += 1
async def test(top):
await pybfms.init()
u_bram = pybfms.find_bfm(".*u_bram")
u_dbg_bfm: RiscvDebugBfm = pybfms.find_bfm(".*u_dbg_bfm")
sw_image = cocotb.plusargs["sw.image"]
u_dbg_bfm.load_elf(sw_image)
u_dbg_bfm.set_trace_level(RiscvDebugTraceLevel.All)
ram_console = 0
ram_console_sz = 0
print("Note: loading image " + sw_image)
with open(sw_image, "rb") as f:
elffile = ELFFile(f)
symtab = elffile.get_section_by_name('.symtab')
ram_console = 0
ram_console_sz = 0
if symtab.get_symbol_by_name("ram_console") is not None:
ram_console = symtab.get_symbol_by_name(
"ram_console")[0]["st_value"]
ram_console_sz = symtab.get_symbol_by_name(
"CONFIG_RAM_CONSOLE_BUFFER_SIZE")[0]["st_value"]
# Find the section that contains the data we need
section = None
for i in range(elffile.num_sections()):
shdr = elffile._get_section_header(i)
# print("sh_addr=" + hex(shdr['sh_addr']) + " sh_size=" + hex(shdr['sh_size']) + " flags=" + hex(shdr['sh_flags']))
# print(" keys=" + str(shdr.keys()))
if shdr['sh_size'] != 0 and (shdr['sh_flags'] & 0x2) == 0x2:
section = elffile.get_section(i)
data = section.data()
addr = shdr['sh_addr']
j = 0
while j < len(data):
word = (data[j + 0] << (8 * 0))
word |= (data[j + 1] <<
(8 * 1)) if j + 1 < len(data) else 0
word |= (data[j + 2] <<
(8 * 2)) if j + 2 < len(data) else 0
word |= (data[j + 3] <<
(8 * 3)) if j + 3 < len(data) else 0
# print("Write: " + hex(addr) + "(" + hex(int((addr & 0xFFFFF)/4)) + ") " + hex(word))
u_bram.write_nb(int((addr & 0xFFFFF) / 4), word, 0xF)
addr += 4
j += 4
if ram_console != 0:
console = RamConsole(ram_console, ram_console_sz)
u_dbg_bfm.add_memwrite_cb(console.memwrite)
# Wait for the main function to exit
print("--> wait main")
await u_dbg_bfm.on_exit("main")
print("<-- wait main")
# Wait for the OS to go idle
print("--> wait idle")
await u_dbg_bfm.on_entry("idle")
print("<-- wait idle")
# Wait for all objections to be dropped
await pybfms.objection.inst().wait()
