def test_root(): # Test __enter__ and __exit_ methods with pyrogue.Root(name='root') as root: # Test: # - a non-default poll value # - set the initRead to true # - set the initWrite to true root.start(timeout=2.0, initRead=True, initWrite=True, zmqPort=None)
def __init__(self, dev, name, description): import rogue.hardware.axi import SmurfKcu1500RssiOffload as fpga self._root = pyrogue.Root(name=name, description=description, serverPort=None, pollEn='False', initRead='True') self._memMap = rogue.hardware.axi.AxiMemMap(dev) self._root.add(fpga.Core(memBase=self._memMap)) self._root.start()
def main(): global prefix prefix = '' parser = argparse.ArgumentParser(prog=sys.argv[0], description='reprogram XPM PROM') parser.add_argument('-v', '--verbose', action='store_true', help='be verbose') parser.add_argument('--file', type=str, required=True, help="MCS file") parser.add_argument('--ip', type=str, required=True, help="IP address") args = parser.parse_args() if args.verbose: logging.basicConfig(level=logging.DEBUG) # Set base base = pr.Root(name='AMCc', description='') base.add(Top(name='XPM', ipAddr=args.ip)) # Start the system base.start( pollEn=False, initRead=False, zmqPort=None, ) AxiVersion = base.XPM.AxiVersion PROM = base.XPM.MicronN25Q AxiVersion.printStatus() PROM.LoadMcsFile(args.file) if (PROM._progDone): print('\nReloading FPGA firmware from PROM ....') AxiVersion.FpgaReload() time.sleep(10) print('\nReloading FPGA done') print('###################################################') print('# New Firmware #') print('###################################################') AxiVersion.printStatus() else: print('Failed to program FPGA') base.stop() exit()
def init_hardware(self, session, params=None): self.base = pr.Root(name='AMCc', description='') self.base.add(FpgaTopLevel( simGui = self.args["simGui"], commType = self.args['commType'], ipAddr = self.args['ipAddr'], pcieRssiLink = (int(self.args['slot']) - 2) )) streamDataWriter = pr.utilities.fileio.StreamWriter(name="streamDataWriter") self.base.add(streamDataWriter) pr.streamConnect(self.base.FpgaTopLevel.stream.application(0xC1), self.base.streamDataWriter.getChannel(0)) self.base.start(pollEn = self.args['pollEn']) return True, "Hardware Initialized"
def main(): global pvdb pvdb = {} # start with empty dictionary global prefix prefix = '' global provider parser = argparse.ArgumentParser(prog=sys.argv[0], description='host PVs for KCU') parser.add_argument('-i', '--interval', type=int, help='PV update interval', default=10) parser.add_argument('-H', '--hsd', action='store_true', help='HSD node', default=False) args = parser.parse_args() # Set base base = pr.Root(name='KCUr', description='') coreMap = rogue.hardware.axi.AxiMemMap('/dev/datadev_0') base.add(Top(memBase=coreMap)) # Start the system base.start( pollEn=False, initRead=False, zmqPort=None, ) kcu = base.KCU if args.hsd: kcu.I2cBus.selectDevice('QSFP0') print(kcu.I2cBus.QSFP0.getRxPwr()) else: print(kcu.TDetTiming.getClkRates()) print(kcu.TDetSemi.getRTT()) provider = StaticProvider(__name__) pvstats = PVStats( 'DAQ:LAB2:' + socket.gethostname().replace('-', '_').upper(), kcu, args.hsd) # process PVA transactions updatePeriod = args.interval with Server(providers=[provider]): try: pvstats.init() while True: prev = time.perf_counter() pvstats.update() curr = time.perf_counter() delta = prev + updatePeriod - curr # print('Delta {:.2f} Update {:.2f} curr {:.2f} prev {:.2f}'.format(delta,curr-prev,curr,prev)) if delta > 0: time.sleep(delta) except KeyboardInterrupt: pass
parser.add_argument( "--initRead", type=argBool, required=False, default=True, help="Enable read all variables at start", ) # Get the arguments args = parser.parse_args() ################################################################# # Set base base = pr.Root(name='simulation', description='Simple RogueSim Example') # Connect the SRPv3 stream port srpStream = pr.interfaces.simulation.StreamSim(host='localhost', dest=0, uid=1, ssi=True) memMap = rogue.protocols.srp.SrpV3() pr.streamConnectBiDir(memMap, srpStream) # Add devices base.add( axiVer.AxiVersion( name='AxiVersion', memBase=memMap, offset=0x00000000,
type = argBool, required = False, default = True, help = "Enable read all variables at start", ) # Get the arguments args = parser.parse_args() ################################################################# # Set the DMA loopback channel vcPrbs = rogue.hardware.axi.AxiStreamDma(args.dev,0,1) # Set base base = pr.Root(name='rceServer',description='DPM Loopback Testing') prbsRx = pyrogue.utilities.prbs.PrbsRx(name='PrbsRx') pyrogue.streamConnect(vcPrbs,prbsRx) base.add(prbsRx) prbTx = pyrogue.utilities.prbs.PrbsTx(name="PrbsTx") pyrogue.streamConnect(prbTx, vcPrbs) base.add(prbTx) ################################################################# # Create the mmap interface rceMap = rogue.hardware.axi.AxiMemMap('/dev/rce_memmap') # Add RCE version device
parser.add_argument( "--initRead", type=argBool, required=False, default=True, help="Enable read all variables at start", ) # Get the arguments args = parser.parse_args() ################################################################# # Set base base = pr.Root(name='pcie', description='') # Create the stream interface memMap = rogue.hardware.axi.AxiMemMap(args.dev) # Add Base Device base.add(smurf.Core(memBase=memMap, expand=True)) # Start the system base.start(pollEn=args.pollEn, initRead=args.initRead, zmqPort=None) # Print the AxiVersion Summary base.Core.AxiPcieCore.AxiVersion.printStatus() # Create GUI appTop = pr.gui.application(sys.argv)
def __init__(self, comm_type, link, ip_addr='', dev='/dev/datadev_0'): print("Setting up the RSSI PCIe card...") # Get system status: # Check if the PCIe card is present in the system if Path(dev).exists(): self.pcie_present = True else: self.pcie_present = False # Check if we use the PCIe for communication if 'pcie-' in comm_type: self.use_pcie = True else: self.use_pcie = False # Look for configuration errors: # Check if we are trying to use PCIe communication without the Pcie # card present in the system if self.use_pcie and not self.pcie_present: exit_message(" ERROR: PCIe device {} does not exist.".format(dev)) # When the PCIe is in used verify the link number is valid if self.use_pcie: if link == None: exit_message(" ERROR: Must specify an RSSI link number") if link in range(0, 6): self.link = link else: exit_message( " ERROR: Invalid RSSI link number. Must be between 0 and 5" ) # Should need to check that the IP address is defined when PCIe is present # and not in used, but that is enforce in the main function. We need to # know the IP address so we can look for all RSSI links that point to it # and close their connections. # Not more configuration errors at this point # Prepare the PCIe when present if self.pcie_present: # Build the pyrogue device for the PCIe board import rogue.hardware.axi import SmurfKcu1500RssiOffload as fpga self.pcie = pyrogue.Root(name='pcie', description='') memMap = rogue.hardware.axi.AxiMemMap(dev) self.pcie.add(fpga.Core(memBase=memMap)) self.pcie.start(pollEn='False', initRead='True') # If the IP was not defined, read the one from the register space. # Note: this could be the case only the PCIe is in used. if not ip_addr: ip_addr = self.pcie.Core.EthLane[0].UdpClient[ self.link].ClientRemoteIp.get() # Check if the IP address read from the PCIe card is valid try: socket.inet_pton(socket.AF_INET, ip_addr) except socket.error: exit_message( "ERROR: IP Address read from the PCIe card: {} is invalid." .format(ip_addr)) # Update the IP address. # Note: when the PCIe card is not in used, the IP will be defined # by the user. self.ip_addr = ip_addr # Print system configuration and status print(" - PCIe present in the system : {}".format( "Yes" if self.pcie_present else "No")) print(" - PCIe based communicartion selected : {}".format( "Yes" if self.use_pcie else "No")) # Show IP address and link when the PCIe is in use if self.use_pcie: print(" - Using IP address : {}".format( self.ip_addr)) print(" - Using RSSI link number : {}".format( self.link)) # Print the FW version information when the PCIe is present if self.pcie_present: self.print_version()
# Add arguments parser.add_argument( "--ip", type=str, required=True, help="RCE's IP address", ) # Get the arguments args = parser.parse_args() ################################################################# # Set base system = pr.Root(name='System', description='Front End Board') # File writer dataWriter = pr.utilities.fileio.StreamWriter(name='dataWriter') system.add(dataWriter) # Create the ETH interface @ IP Address = args.ip ethLink = pr.protocols.UdpRssiPack(host=args.ip, port=8192, size=1400) print("RSSI Link Up!") # Add data stream to file as channel 0 to tDest = 0x0 pr.streamConnect(ethLink.application(0), dataWriter.getChannel(0x0)) # Start the system system.start(pollEn=False)
def main(): global pvdb pvdb = {} # start with empty dictionary global prefix prefix = '' parser = argparse.ArgumentParser(prog=sys.argv[0], description='host PVs for XPM') parser.add_argument('-P', required=True, help='e.g. DAQ:LAB2:XPM:1', metavar='PREFIX') parser.add_argument('-v', '--verbose', action='store_true', help='be verbose') parser.add_argument('--ip', type=str, required=True, help="IP address") parser.add_argument( '--db', type=str, default=None, help= "save/restore db, for example [https://pswww.slac.stanford.edu/ws-auth/devconfigdb/ws/,configDB,LAB2,PROD]" ) parser.add_argument('-I', action='store_true', help='initialize Cu timing') parser.add_argument('-L', action='store_true', help='bypass AMC Locks') parser.add_argument('-F', type=float, default=1.076923e-6, help='fiducial period (sec)') parser.add_argument('-C', type=int, default=200, help='clocks per fiducial') args = parser.parse_args() if args.verbose: # logging.basicConfig(level=logging.DEBUG) setVerbose(True) # Set base base = pr.Root(name='AMCc', description='') base.add(Top( name='XPM', ipAddr=args.ip, fidPrescale=args.C, )) # Start the system base.start( # pollEn = False, # initRead = False, # zmqPort = None, ) xpm = base.XPM app = base.XPM.XpmApp # Print the AxiVersion Summary xpm.AxiVersion.printStatus() provider = StaticProvider(__name__) lock = Lock() pvstats = PVStats(provider, lock, args.P, xpm, args.F) # pvctrls = PVCtrls(provider, lock, name=args.P, ip=args.ip, xpm=xpm, stats=pvstats._groups, handle=pvstats.handle, db=args.db, cuInit=True) pvctrls = PVCtrls(provider, lock, name=args.P, ip=args.ip, xpm=xpm, stats=pvstats._groups, handle=pvstats.handle, db=args.db, cuInit=args.I, fidPrescale=args.C, fidPeriod=args.F * 1.e9) pvxtpg = None # process PVA transactions updatePeriod = 1.0 cycle = 0 with Server(providers=[provider]): try: if pvxtpg is not None: pvxtpg.init() pvstats.init() while True: prev = time.perf_counter() pvstats.update(cycle) pvctrls.update(cycle) # We have to delay the startup of some classes if cycle == 5: pvxtpg = PVXTpg(provider, lock, args.P, xpm, xpm.mmcmParms, cuMode='xtpg' in xpm.AxiVersion.ImageName.get(), bypassLock=args.L) pvxtpg.init() elif cycle < 5: print('pvxtpg in %d' % (5 - cycle)) if pvxtpg is not None: pvxtpg.update() curr = time.perf_counter() delta = prev + updatePeriod - curr # print('Delta {:.2f} Update {:.2f} curr {:.2f} prev {:.2f}'.format(delta,curr-prev,curr,prev)) if delta > 0: time.sleep(delta) cycle += 1 except KeyboardInterrupt: pass
def __init__(self, dev, name, description): import rogue.hardware.axi import SmurfKcu1500RssiOffload as fpga self.root = pyrogue.Root(name=name,description=description) memMap = rogue.hardware.axi.AxiMemMap(dev) self.root.add(fpga.Core(memBase=memMap))
def test_local_root(): """ Test Epics Server """ return # Test both autogeneration and mapping of PV names pv_map_states = [False, True] for s in pv_map_states: with LocalRootWithEpics(use_map=s) as root: time.sleep(1) # Device EPICS PV name prefix device_epics_prefix = epics_prefix + ':LocalRoot:myDevice' # Test dump method root.epics.dump() # Test list method root.epics.list() time.sleep(1) # Test RW a variable holding an scalar value pv_name = device_epics_prefix + ':var' test_value = 314 caput(pv_name, test_value) time.sleep(1) test_result = caget(pv_name) if test_result != test_value: raise AssertionError('pv_name={}: test_value={}; test_result={}'.format(\ pv_name, test_value, test_result)) # Test RW a variable holding a float value pv_name = device_epics_prefix + ':var_float' test_value = 5.67 caput(pv_name, test_value) time.sleep(1) test_result = round(caget(pv_name), 2) if test_result != test_value: raise AssertionError('pvStates={} pv_name={}: test_value={}; test_result={}'.format(\ s, pv_name, test_value, test_result)) # Allow epics client to reset time.sleep(5) """ Test EPICS server with a non-started tree """ try: root = pyrogue.Root(name='LocalRoot', description='Local root') root.epics = pyrogue.protocols.epics.EpicsCaServer(base=epics_prefix, root=root) root.epics.start() raise AssertionError( 'Attaching a pyrogue.epics to a non-started tree did not throw exception' ) except Exception as e: pass """ Test createMaster and createSlave methods """ with LocalRootWithEpics() as root: slave = root.epics.createSlave(name='slave', maxSize=1000, type='UInt16') master = root.epics.createMaster(name='master', maxSize=1000, type='UInt16')
parser.add_argument( "--pollEn", type=argBool, required=False, default=True, help="auto-polling", ) # Get the arguments args = parser.parse_args() ################################################################# # Set base base = pr.Root(name='AMCc', description='') # Add Base Device base.add( FpgaTopLevel( simGui=args.simGui, commType=args.commType, ipAddr=args.ipAddr, pcieRssiLink=(int(args.slot) - 2), )) streamDataWriter = pyrogue.utilities.fileio.StreamWriter( name='streamDataWriter') base.add(streamDataWriter)
) parser.add_argument( "--mcs_sec", type=str, required=True, help="path to secondary MCS file", ) # Get the arguments args = parser.parse_args() ################################################################# # Set base base = pr.Root(name='PcieTop', description='') # Create the stream interface memMap = rogue.hardware.axi.AxiMemMap(args.dev) # Add Base Device base.add(pcie.AxiPcieCore(memBase=memMap, useSpi=True)) # Start the system base.start(pollEn=False) # Load the primary MCS file to QSPI[0] base.AxiPcieCore.AxiMicronN25Q[0].LoadMcsFile(args.mcs_pri) # Load the secondary MCS file to QSPI[1] base.AxiPcieCore.AxiMicronN25Q[1].LoadMcsFile(args.mcs_sec)
def main(): global pvdb pvdb = {} # start with empty dictionary global prefix prefix = '' parser = argparse.ArgumentParser(prog=sys.argv[0], description='host PVs for XPM') parser.add_argument('-P', required=True, help='e.g. DAQ:LAB2:XPM:1', metavar='PREFIX') parser.add_argument('-v', '--verbose', action='store_true', help='be verbose') parser.add_argument('--ip', type=str, required=True, help="IP address" ) parser.add_argument('--db', type=str, default=None, help="save/restore db, for example [https://pswww.slac.stanford.edu/ws-auth/devconfigdb/ws/,configDB,LAB2,PROD]") args = parser.parse_args() if args.verbose: # logging.basicConfig(level=logging.DEBUG) setVerbose(True) # Set base base = pr.Root(name='AMCc',description='') base.add(Top( name = 'XPM', ipAddr = args.ip )) # Start the system base.start( pollEn = False, initRead = False, zmqPort = None, ) xpm = base.XPM app = base.XPM.XpmApp # Print the AxiVersion Summary xpm.AxiVersion.printStatus() provider = StaticProvider(__name__) lock = Lock() pvstats = PVStats(provider, lock, args.P, xpm) pvctrls = PVCtrls(provider, lock, name=args.P, ip=args.ip, xpm=xpm, stats=pvstats._groups, db=args.db) pvxtpg = PVXTpg(provider, lock, args.P, xpm, xpm.mmcmParms, cuMode='xtpg' in xpm.AxiVersion.ImageName.get()) # process PVA transactions updatePeriod = 1.0 with Server(providers=[provider]): try: if pvxtpg is not None: pvxtpg .init() pvstats.init() while True: prev = time.perf_counter() if pvxtpg is not None: pvxtpg .update() pvstats.update() pvctrls.update() curr = time.perf_counter() delta = prev+updatePeriod-curr # print('Delta {:.2f} Update {:.2f} curr {:.2f} prev {:.2f}'.format(delta,curr-prev,curr,prev)) if delta>0: time.sleep(delta) except KeyboardInterrupt: pass
def run_pyrogue_stress_activities(board_ip_address, pyrogue_base, write_value_count=20000, ddr_read_cycles=100, sleep_secs=600): """ Use pyrogue to stress the board by writing values to the FPGA and reading from DDR. Parameters ---------- board_ip_address : str The IP address used to connect to the FPGA board pyrogue_base: pr.Root The root AMC device to run the pyrogue commands write_value_count : int The number of values to write, default at 20,000 ddr_read_cycles : int The number of times to perform a DDR read sleep_secs : int The amount of time to sleep after the value writes. Returns ---------- The pyrogue base object to use for the next stress activity generations """ # Set base if not pyrogue_base: logger.info("Creating a new base...") base = pr.Root(name='AMCc', description='') base.add(FpgaTopLevel( commType='eth-rssi-interleaved', ipAddr=board_ip_address, pcieRssiLink=4 )) pyrogue_base = base else: logger.info("Restarting the existing base...") base = pyrogue_base base.FpgaTopLevel.stream.start() # Start the system base.start(pollEn=1) logger.info("\n## BOARD SUMMARY ##\n") # Capture the AxiVersion Summary to log stdout_handler = sys.stdout stderr_handler = sys.stderr global_logger = logging.getLogger() org_global_logging_level = global_logger.level # Temporary bump up the global logging level to get the Summary printout global_logger.setLevel(logging.INFO) sys.stdout = StreamToLogger(global_logger, logging.INFO) sys.stderr = StreamToLogger(global_logger, logging.ERROR) base.FpgaTopLevel.AmcCarrierCore.AxiVersion.printStatus() # Revert to the current log level and restore stdout and stderr handlers global_logger.setLevel(org_global_logging_level) sys.stdout = stdout_handler sys.stderr = stderr_handler logger.info("-- pyrogue: Start writing to and reading values from the board --") for i in range(write_value_count): logger.debug("-- pyrogue: Writing value: {0} to board".format(i)) base.FpgaTopLevel.AmcCarrierCore.AxiVersion.ScratchPad.set(i, write=True) value = base.FpgaTopLevel.AmcCarrierCore.AxiVersion.ScratchPad.get() logger.info("-- pyrogue: Reading value: {0} from board".format(value)) time.sleep(0.01) for i in range(ddr_read_cycles): logger.info("-- pyrogue: DDR read cycle {0}".format(i)) base.FpgaTopLevel.DDR._rawRead(offset=0x0, numWords=0x100000) time.sleep(0.01) # Close logger.debug("Stopping base") base.stop() logger.debug("Stopping stream") base.FpgaTopLevel.stream.stop() logger.debug("Stopping finished.") logger.info("-- pyrogue: End writing to and reading values from the board --") _count_down_sleep_status(sleep_secs) return pyrogue_base