Example #1
0
    def searchMatchedScopeChain(self, currentchain, targetchain):
        skiplength = len(currentchain) - 1
        printable = currentchain[skiplength].isPrintable()

        if printable:
            if currentchain[skiplength] != targetchain[0]:  # not match
                return None
            if len(targetchain) == 1:
                return ScopeChain([targetchain[0]])
            for nextframe in self.dict[currentchain].getNext():
                rslt = self.searchMatchedScopeChain(nextframe, targetchain[1:])
                if rslt is not None:
                    return ScopeChain([currentchain[skiplength]]) + rslt
            return None

        if (currentchain[skiplength].scopetype == 'for' and
                targetchain[0].scopetype == 'for'):
            if currentchain[skiplength].scopeloop != targetchain[0].scopeloop:
                return None
            if len(targetchain) == 1:
                return ScopeChain([targetchain[0]])
            for nextframe in self.dict[currentchain].getNext():
                rslt = self.searchMatchedScopeChain(nextframe, targetchain[1:])
                if rslt is not None:
                    return ScopeChain([currentchain[skiplength]]) + rslt

            return None

        for nextframe in self.dict[currentchain].getNext():
            rslt = self.searchMatchedScopeChain(nextframe, targetchain)
            if rslt is not None:
                return ScopeChain([currentchain[skiplength]]) + rslt
        return None
Example #2
0
def toTermname_list(name):
    scopechain_list = []
    for n in name:
        if not isinstance(n, str):
            raise TypeError()
        scopechain_list.append(ScopeLabel(n, 'any'))
    return ScopeChain(scopechain_list)
Example #3
0
    def __init__(self):
        self.dict = {}
        self.current = ScopeChain()

        self.function_def = False
        self.task_def = False
        self.for_pre = False
        self.for_post = False
        self.for_iter = None
Example #4
0
 def toScopeChain(self, blocklabel):
     scopelist = []
     for b in blocklabel.labellist:
         if b.loop is not None:
             loop = self.optimize(b.loop)
             if not isinstance(loop, DFEvalValue):
                 raise verror.FormatError('Loop iterator should be constant')
             scopelist.append(ScopeLabel(b.name, 'for', loop))
         scopelist.append(ScopeLabel(b.name, 'any'))
     return ScopeChain(scopelist)
Example #5
0
    def generate(self):
        preprocess_define = []
        if self.single_clock:
            preprocess_define.append('CORAM_SINGLE_CLOCK')
        if self.define:
            preprocess_define.extend(self.define)

        code_parser = VerilogCodeParser(self.filelist,
                                        preprocess_include=self.include,
                                        preprocess_define=preprocess_define)
        ast = code_parser.parse()

        module_visitor = ModuleVisitor()
        module_visitor.visit(ast)
        modulenames = module_visitor.get_modulenames()
        moduleinfotable = module_visitor.get_moduleinfotable()

        instanceconvert_visitor = InstanceConvertVisitor(
            moduleinfotable, self.topmodule)
        instanceconvert_visitor.start_visit()

        replaced_instance = instanceconvert_visitor.getMergedReplacedInstance()
        replaced_instports = instanceconvert_visitor.getReplacedInstPorts()
        replaced_items = instanceconvert_visitor.getReplacedItems()

        new_moduleinfotable = instanceconvert_visitor.get_new_moduleinfotable()
        instancereplace_visitor = InstanceReplaceVisitor(
            replaced_instance, replaced_instports, replaced_items,
            new_moduleinfotable)
        ret = instancereplace_visitor.getAST()

        # gather user-defined io-ports on top-module and parameters to connect external
        frametable = instanceconvert_visitor.getFrameTable()
        top_ioports = []
        for i in moduleinfotable.getIOPorts(self.topmodule):
            if signaltype.isClock(i) or signaltype.isReset(i): continue
            top_ioports.append(i)

        top_scope = ScopeChain([ScopeLabel(self.topmodule, 'module')])
        top_sigs = frametable.getSignals(top_scope)
        top_params = frametable.getConsts(top_scope)

        for sk, sv in top_sigs.items():
            if len(sk) > 2: continue
            signame = sk[1].scopename
            for svv in sv:
                if (signame in top_ioports
                        and not (signaltype.isClock(signame)
                                 or signaltype.isReset(signame))
                        and isinstance(svv, vast.Input)
                        or isinstance(svv, vast.Output)
                        or isinstance(svv, vast.Inout)):
                    port = svv
                    msb_val = instanceconvert_visitor.optimize(
                        instanceconvert_visitor.getTree(
                            port.width.msb, top_scope))
                    lsb_val = instanceconvert_visitor.optimize(
                        instanceconvert_visitor.getTree(
                            port.width.lsb, top_scope))
                    width = int(msb_val.value) - int(lsb_val.value) + 1
                    self.top_ioports[signame] = (port, width)
                    break

        for ck, cv in top_params.items():
            if len(ck) > 2: continue
            signame = ck[1].scopename
            param = cv[0]
            if isinstance(param, vast.Genvar): continue
            self.top_parameters[signame] = param

        self.coram_object = instanceconvert_visitor.getCoramObject()

        return ret
Example #6
0
def toTermname_str(name):
    scopechain_list = []
    for n in name.split('.'):
        # fix me: to support "module.scope.signal[ptr]", lexical analyzer is required.
        scopechain_list.append(ScopeLabel(n, 'any'))
    return ScopeChain(scopechain_list)
Example #7
0
    def generate(self):
        code_parser = VerilogCodeParser(self.filelist,
                                        preprocess_include=self.include,
                                        preprocess_define=self.define)
        ast = code_parser.parse()

        module_visitor = ModuleVisitor()
        module_visitor.visit(ast)
        modulenames = module_visitor.get_modulenames()
        moduleinfotable = module_visitor.get_moduleinfotable()

        template_parser = VerilogCodeParser((self.template_file, ))
        template_ast = template_parser.parse()
        template_visitor = ModuleVisitor()
        template_visitor.visit(template_ast)
        templateinfotable = template_visitor.get_moduleinfotable()

        instanceconvert_visitor = InstanceConvertVisitor(
            moduleinfotable, self.topmodule, templateinfotable)
        instanceconvert_visitor.start_visit()

        replaced_instance = instanceconvert_visitor.getMergedReplacedInstance()
        replaced_instports = instanceconvert_visitor.getReplacedInstPorts()
        replaced_items = instanceconvert_visitor.getReplacedItems()

        new_moduleinfotable = instanceconvert_visitor.get_new_moduleinfotable()
        instancereplace_visitor = InstanceReplaceVisitor(
            replaced_instance, replaced_instports, replaced_items,
            new_moduleinfotable)
        ret = instancereplace_visitor.getAST()

        # gather user-defined io-ports on top-module and parameters to connect external
        frametable = instanceconvert_visitor.getFrameTable()
        top_ioports = []
        for i in moduleinfotable.getIOPorts(self.topmodule):
            if signaltype.isClock(i) or signaltype.isReset(i): continue
            top_ioports.append(i)

        top_sigs = frametable.getSignals(
            ScopeChain([ScopeLabel(self.topmodule, 'module')]))
        top_params = frametable.getConsts(
            ScopeChain([ScopeLabel(self.topmodule, 'module')]))
        for sk, sv in top_sigs.items():
            if len(sk) > 2: continue
            signame = sk[1].scopename
            for svv in sv:
                if (signame in top_ioports
                        and not (signaltype.isClock(signame)
                                 or signaltype.isReset(signame))
                        and isinstance(svv, vast.Input)
                        or isinstance(svv, vast.Output)
                        or isinstance(svv, vast.Inout)):
                    port = svv
                    self.top_ioports[signame] = port
                    break

        for ck, cv in top_params.items():
            if len(ck) > 2: continue
            signame = ck[1].scopename
            param = cv[0]
            if isinstance(param, vast.Genvar): continue
            self.top_parameters[signame] = param

        self.target_object = instanceconvert_visitor.getTargetObject()

        return ret