async def task():
n = 0
Rega = pyvpi_tools.Reg("top.a")
Regb = pyvpi_tools.Reg("top.b")
clk = pyvpi_tools.Reg("top.clk")
try:
await Timer(100,'us')
for _ in range(1000):
print('Ctime1=%d \n'%Simtime.value)
print('waiting trigger\n')
await Edge(Rega)
print("edge triggered\n")
# print(Rega.value)
n+=1
# print(n)
# Rega.value = n
# print('Ctime2=%d'%Simtime.value)
# Rega.value= Rega.value+1
if(n%100==0):
print_mem()
# print(sys.getrefcount(Rega))
# # print(sys.getrefcount(func))
except Exception as e:
RT.append(e)
print(RT)
print("TASK DONE\n")
def __init__(self, trigobj=None, edge = 1):
super().__init__()
self.edge = edge
if trigobj == None:
self.reg = None
elif type(trigobj)==str:
self.reg = pyvpi_tools.Reg(trigobj)
else:
self.reg = trigobj
def __init__(self, reg):
super().__init__()
if type(reg)==str:
reg = pyvpi_tools.Reg(reg)
self.reg = reg
self.name = '{} Edge'.format(self.reg.fullname)
self.trgobj = self.reg.handle
self.reason = cons.cbValueChange
self.lock = threading.Event()
self.wait_ev = asyncio.Event()
self.loop = None
self.armed = 0
def __init__(self):
self.swclk = pyvpi_tools.Reg('main.swdclk')
self.swdio = pyvpi_tools.Reg('main.swdio')
self.swclk_net = pyvpi_tools.Reg('main.swdclk_net')
self.swdio_net = pyvpi_tools.Reg('main.swdio_net')
self.freq = 10e6
self.vl = 0
self.vh = 1.2
self.pose_trig_w = True
self.pose_trig_r = False
self.APnDP = 1 # 1=Ap 0=Dp
self.RnW = 0 # 0=write 1= read
self.Address = 0 # Ap or DP reg address
pyvpi.printf('SWD created\n')
self.trig = Edge(self.swclk)
self.hclk = Timer(1 / 2 / self.freq, 's')
self.swclk.value = 0
self.DAPSTATUS = DAPSTATUS()
self._log = pyvpi_tools.Reg('main.cmd')
self._log2 = pyvpi_tools.Reg('main.ack')
self.arm_time = Simtime.value
pending_task.append(self)
# print('arm_time:', self.arm_time)
return self.wait().__await__()
def done(self):
self.wait_ev.set()
async def wait(self):
await self.wait_ev.wait()
pending_task.remove(self)
#IPython.embed()
Rega = pyvpi_tools.Reg("top.a")
async def task():
a = Timer(1, 'us')
while (1):
# print('Ctime1=%d'%Simtime.value)
await a
# print('Ctime2=%d'%Simtime.value)
Rega.value += 1
import tracemalloc
async def task2():