def optimize_circuit(circuit, coupling_list=None):
"""Use the qiskit transpiler module to perform a suite of optimizations on
the given circuit, including imposing swap coupling.
Args:
circuit :: qiskit.QuantumCircuit - the circuit to optimize
coupling_list :: [(int, int)] - the list of connected qubit pairs
if None is passed in, will not perform mapping
Returns:
optimized_circuit :: qiskit.QuantumCircuit - the optimized circuit
"""
# TODO: optimize until gates count stays stagnant.
# TODO: implement rotation merge for clifford gates as pass.
merge_rotation_gates(circuit)
coupling_map = None if coupling_list is None else CouplingMap(
coupling_list)
pass_manager = PassManager()
pass_manager.append(HCancellation())
pass_manager.append(CXCancellation())
# Some CNOT identities are interleaved between others,
# for this reason a second pass is required. More passes
# may be required for other circuits.
pass_manager.append(CXCancellation())
if coupling_map is not None:
pass_manager.append(BasicSwap(coupling_map))
optimized_circuit = transpile(circuit,
backend=state_backend,
coupling_map=coupling_list,
pass_manager=pass_manager)
return optimized_circuit
def compile_circuit ( circuit ): pm = PassManager() pm.append( CXCancellation() ) pm.append( Optimize1qGates() ) pm.append( CXCancellation() ) pm.append( Optimize1qGates() ) pm.append( CXCancellation() ) pm.append( Optimize1qGates() ) return transpile( circuit, basis_gates = ['u1', 'u2', 'u3', 'cx'], optimization_level = 2 )
def test_pass_cx_cancellation(self):
"""Test the cx cancellation pass.
It should cancel consecutive cx pairs on same qubits.
"""
qr = QuantumRegister(2)
circuit = QuantumCircuit(qr)
circuit.h(qr[0])
circuit.h(qr[0])
circuit.cx(qr[0], qr[1])
circuit.cx(qr[0], qr[1])
circuit.cx(qr[0], qr[1])
circuit.cx(qr[0], qr[1])
circuit.cx(qr[1], qr[0])
circuit.cx(qr[1], qr[0])
pass_manager = PassManager()
pass_manager.append(CXCancellation())
out_circuit = pass_manager.run(circuit)
expected = QuantumCircuit(qr)
expected.h(qr[0])
expected.h(qr[0])
self.assertEqual(out_circuit, expected)
def apply(self, program, accelerator, options):
# Import qiskit modules here so that users
# who don't have qiskit can still use rest of xacc
from qiskit import QuantumCircuit, transpile
from qiskit.transpiler import PassManager
from qiskit.transpiler.passes import CXCancellation
# Map CompositeInstruction program to OpenQasm string
openqasm_compiler = xacc.getCompiler('openqasm')
src = openqasm_compiler.translate(program).replace('\\', '')
# Create a QuantumCircuit
circuit = QuantumCircuit.from_qasm_str(src)
# Create the PassManager and run the pass
pass_manager = PassManager()
pass_manager.append(CXCancellation())
out_circuit = transpile(circuit, pass_manager=pass_manager)
# Map the output to OpenQasm and map to XACC IR
out_src = out_circuit.qasm()
out_src = '__qpu__ void ' + program.name(
) + '(qbit q) {\n' + out_src + "\n}"
out_prog = openqasm_compiler.compile(out_src,
accelerator).getComposites()[0]
# update the given program CompositeInstruction reference
program.clear()
for inst in out_prog.getInstructions():
program.addInstruction(inst)
return
def test_2q_unitary(self):
"""test 2 qubit unitary matrix"""
backend = BasicAer.get_backend('qasm_simulator')
qr = QuantumRegister(2)
cr = ClassicalRegister(2)
qc = QuantumCircuit(qr, cr)
sigmax = numpy.array([[0, 1], [1, 0]])
sigmay = numpy.array([[0, -1j], [1j, 0]])
matrix = numpy.kron(sigmax, sigmay)
qc.x(qr[0])
uni2q = Unitary(matrix)
qc.append(uni2q, [qr[0], qr[1]])
passman = PassManager()
passman.append(CXCancellation())
qc2 = transpile(qc, backend, pass_manager=passman)
# test of qasm output
self.log.info(qc2.qasm())
# test of text drawer
self.log.info(qc2)
dag = circuit_to_dag(qc)
nodes = dag.twoQ_nodes()
self.assertTrue(len(nodes) == 1)
dnode = nodes[0]
self.assertIsInstance(dnode.op, Unitary)
for qubit in dnode.qargs:
self.assertTrue(qubit[1] in [0, 1])
self.assertTrue(numpy.allclose(dnode.op._representation, matrix))
qc3 = dag_to_circuit(dag)
self.assertEqual(qc2, qc3)
def default_pass_manager(transpile_config):
"""
The default pass manager that maps to the coupling map.
Args:
transpile_config (TranspileConfig)
Returns:
PassManager: A pass manager to map and optimize.
"""
basis_gates = transpile_config.basis_gates
coupling_map = transpile_config.coupling_map
initial_layout = transpile_config.initial_layout
seed_transpiler = transpile_config.seed_transpiler
pass_manager = PassManager()
pass_manager.append(SetLayout(initial_layout))
pass_manager.append(Unroller(basis_gates))
# Use the trivial layout if no layout is found
pass_manager.append(
TrivialLayout(coupling_map),
condition=lambda property_set: not property_set['layout'])
# if the circuit and layout already satisfy the coupling_constraints, use that layout
# otherwise layout on the most densely connected physical qubit subset
pass_manager.append(CheckMap(coupling_map))
pass_manager.append(
DenseLayout(coupling_map),
condition=lambda property_set: not property_set['is_swap_mapped'])
# Extend the the dag/layout with ancillas using the full coupling map
pass_manager.append(FullAncillaAllocation(coupling_map))
pass_manager.append(EnlargeWithAncilla())
# Circuit must only contain 1- or 2-qubit interactions for swapper to work
pass_manager.append(Unroll3qOrMore())
# Swap mapper
pass_manager.append(BarrierBeforeFinalMeasurements())
pass_manager.append(
LegacySwap(coupling_map, trials=20, seed=seed_transpiler))
# Expand swaps
pass_manager.append(Decompose(SwapGate))
# Change CX directions
pass_manager.append(CXDirection(coupling_map))
# Simplify single qubit gates and CXs
simplification_passes = [
Optimize1qGates(),
CXCancellation(),
RemoveResetInZeroState()
]
pass_manager.append(
simplification_passes + [Depth(), FixedPoint('depth')],
do_while=lambda property_set: not property_set['depth_fixed_point'])
return pass_manager
def test_2q_unitary(self):
"""test 2 qubit unitary matrix"""
qr = QuantumRegister(2)
cr = ClassicalRegister(2)
qc = QuantumCircuit(qr, cr)
sigmax = numpy.array([[0, 1], [1, 0]])
sigmay = numpy.array([[0, -1j], [1j, 0]])
matrix = numpy.kron(sigmax, sigmay)
qc.x(qr[0])
uni2q = UnitaryGate(matrix)
qc.append(uni2q, [qr[0], qr[1]])
passman = PassManager()
passman.append(CXCancellation())
qc2 = passman.run(qc)
# test of qasm output
self.log.info(qc2.qasm())
# test of text drawer
self.log.info(qc2)
dag = circuit_to_dag(qc)
nodes = dag.two_qubit_ops()
self.assertEqual(len(nodes), 1)
dnode = nodes[0]
self.assertIsInstance(dnode.op, UnitaryGate)
for qubit in dnode.qargs:
self.assertIn(qubit.index, [0, 1])
assert_allclose(dnode.op.to_matrix(), matrix)
qc3 = dag_to_circuit(dag)
self.assertEqual(qc2, qc3)
def test_inverted_cx(self):
"""Test that CX order dependence is respected."""
qr = QuantumRegister(4)
circuit = QuantumCircuit(qr)
circuit.cx(qr[0], qr[1])
circuit.cx(qr[1], qr[0])
circuit.cx(qr[0], qr[1])
pass_manager = PassManager()
pass_manager.append(CXCancellation())
out_circuit = pass_manager.run(circuit)
self.assertEqual(out_circuit, circuit)
def test_swapped_cx(self):
"""Test that CX isn't cancelled if there are intermediary ops."""
qr = QuantumRegister(4)
circuit = QuantumCircuit(qr)
circuit.cx(qr[1], qr[0])
circuit.swap(qr[1], qr[2])
circuit.cx(qr[1], qr[0])
pass_manager = PassManager()
pass_manager.append(CXCancellation())
out_circuit = pass_manager.run(circuit)
self.assertEqual(out_circuit, circuit)
def test_pass_cx_cancellation_chained_cx(self):
"""Include a test were not all operations can be cancelled."""
# ┌───┐
# q0_0: ┤ H ├──■─────────■───────
# ├───┤┌─┴─┐ ┌─┴─┐
# q0_1: ┤ H ├┤ X ├──■──┤ X ├─────
# └───┘└───┘┌─┴─┐└───┘
# q0_2: ──────────┤ X ├──■────■──
# └───┘┌─┴─┐┌─┴─┐
# q0_3: ───────────────┤ X ├┤ X ├
# └───┘└───┘
qr = QuantumRegister(4)
circuit = QuantumCircuit(qr)
circuit.h(qr[0])
circuit.h(qr[1])
circuit.cx(qr[0], qr[1])
circuit.cx(qr[1], qr[2])
circuit.cx(qr[0], qr[1])
circuit.cx(qr[2], qr[3])
circuit.cx(qr[2], qr[3])
pass_manager = PassManager()
pass_manager.append(CXCancellation())
out_circuit = pass_manager.run(circuit)
# ┌───┐
# q0_0: ┤ H ├──■─────────■──
# ├───┤┌─┴─┐ ┌─┴─┐
# q0_1: ┤ H ├┤ X ├──■──┤ X ├
# └───┘└───┘┌─┴─┐└───┘
# q0_2: ──────────┤ X ├─────
# └───┘
# q0_3: ────────────────────
expected = QuantumCircuit(qr)
expected.h(qr[0])
expected.h(qr[1])
expected.cx(qr[0], qr[1])
expected.cx(qr[1], qr[2])
expected.cx(qr[0], qr[1])
self.assertEqual(out_circuit, expected)
def test_pass_cx_cancellation_intermixed_ops(self):
"""Cancellation shouldn't be affected by the order of ops on different qubits."""
qr = QuantumRegister(4)
circuit = QuantumCircuit(qr)
circuit.h(qr[0])
circuit.h(qr[1])
circuit.cx(qr[0], qr[1])
circuit.cx(qr[2], qr[3])
circuit.cx(qr[0], qr[1])
circuit.cx(qr[2], qr[3])
pass_manager = PassManager()
pass_manager.append(CXCancellation())
out_circuit = pass_manager.run(circuit)
expected = QuantumCircuit(qr)
expected.h(qr[0])
expected.h(qr[1])
self.assertEqual(out_circuit, expected)
def get_map_circuit(circuit, coupling_list=None):
#merge_rotation_gates(circuit)
coupling_map = None if coupling_list is None else CouplingMap(
couplinglist=coupling_list)
bs = BasicSwap(coupling_map=coupling_map)
pass_manager = PassManager(bs)
# Some CNOT identities are interleaved between others,
# for this reason a second pass is required. More passes
# may be required for other circuits.
pass_manager.append(CXCancellation())
#if coupling_map is not None:
# pass_manager.append(BasicSwap(coupling_map))
optimized_circuit = transpile(
circuit, #backend=state_backend,
#coupling_map=coupling_map,
pass_manager=pass_manager)
return optimized_circuit
def test_pass_cx_cancellation(self):
"""Test the cx cancellation pass.
It should cancel consecutive cx pairs on same qubits.
"""
qr = QuantumRegister(2)
circuit = QuantumCircuit(qr)
circuit.h(qr[0])
circuit.h(qr[0])
circuit.cx(qr[0], qr[1])
circuit.cx(qr[0], qr[1])
circuit.cx(qr[0], qr[1])
circuit.cx(qr[0], qr[1])
circuit.cx(qr[1], qr[0])
circuit.cx(qr[1], qr[0])
pass_manager = PassManager()
pass_manager.append(CXCancellation())
out_circuit = transpile(circuit, pass_manager=pass_manager)
resources_after = out_circuit.count_ops()
self.assertNotIn('cx', resources_after)
def test_pass_cx_cancellation(self):
"""Test the cx cancellation pass.
It should cancel consecutive cx pairs on same qubits.
"""
q = QuantumRegister(2)
circ = QuantumCircuit(q)
circ.h(q[0])
circ.h(q[0])
circ.cx(q[0], q[1])
circ.cx(q[0], q[1])
circ.cx(q[0], q[1])
circ.cx(q[0], q[1])
circ.cx(q[1], q[0])
circ.cx(q[1], q[0])
dag_circuit = DAGCircuit.fromQuantumCircuit(circ)
pass_manager = PassManager()
pass_manager.add_pass(CXCancellation())
dag_circuit = transpile(dag_circuit, pass_manager=pass_manager)
resources_after = dag_circuit.count_ops()
self.assertNotIn('cx', resources_after)
def test_pass_cx_cancellation_chained_cx(self):
"""Include a test were not all operations can be cancelled."""
qr = QuantumRegister(4)
circuit = QuantumCircuit(qr)
circuit.h(qr[0])
circuit.h(qr[1])
circuit.cx(qr[0], qr[1])
circuit.cx(qr[1], qr[2])
circuit.cx(qr[0], qr[1])
circuit.cx(qr[2], qr[3])
circuit.cx(qr[2], qr[3])
pass_manager = PassManager()
pass_manager.append(CXCancellation())
out_circuit = pass_manager.run(circuit)
expected = QuantumCircuit(qr)
expected.h(qr[0])
expected.h(qr[1])
expected.cx(qr[0], qr[1])
expected.cx(qr[1], qr[2])
expected.cx(qr[0], qr[1])
self.assertEqual(out_circuit, expected)
def level_1_pass_manager(pass_manager_config):
"""
Level 1 pass manager: light optimization by simple adjacent gate collapsing
This pass manager applies the user-given initial layout. If none is given, and a trivial
layout (i-th virtual -> i-th physical) makes the circuit fit the coupling map, that is used.
Otherwise, the circuit is mapped to the most densely connected coupling subgraph, and swaps
are inserted to map. Any unused physical qubit is allocated as ancilla space.
The pass manager then unrolls the circuit to the desired basis, and transforms the
circuit to match the coupling map. Finally, optimizations in the form of adjacent
gate collapse and redundant reset removal are performed.
Note: in simulators where coupling_map=None, only the unrolling and optimization
stages are done.
Args:
pass_manager_config (PassManagerConfig)
Returns:
PassManager: a level 1 pass manager.
"""
basis_gates = pass_manager_config.basis_gates
coupling_map = pass_manager_config.coupling_map
initial_layout = pass_manager_config.initial_layout
seed_transpiler = pass_manager_config.seed_transpiler
backend_properties = pass_manager_config.backend_properties
# 1. Use trivial layout if no layout given
_set_initial_layout = SetLayout(initial_layout)
def _choose_layout_condition(property_set):
return not property_set['layout']
# 2. Use a better layout on densely connected qubits, if circuit needs swaps
def _not_perfect_yet(property_set):
return property_set['trivial_layout_score'] is not None and \
property_set['trivial_layout_score'] != 0
# 3. Extend dag/layout with ancillas using the full coupling map
_embed = [
FullAncillaAllocation(coupling_map),
EnlargeWithAncilla(),
ApplyLayout()
]
# 4. Unroll to the basis
_unroll = Unroller(basis_gates)
# 5. Swap to fit the coupling map
_swap_check = CheckMap(coupling_map)
def _swap_condition(property_set):
return not property_set['is_swap_mapped']
_swap = [
BarrierBeforeFinalMeasurements(),
Unroll3qOrMore(),
StochasticSwap(coupling_map, trials=20, seed=seed_transpiler),
Decompose(SwapGate)
]
# 6. Fix any bad CX directions
_direction_check = [CheckCXDirection(coupling_map)]
def _direction_condition(property_set):
return not property_set['is_direction_mapped']
_direction = [CXDirection(coupling_map)]
# 7. Remove zero-state reset
_reset = RemoveResetInZeroState()
# 8. Merge 1q rotations and cancel CNOT gates iteratively until no more change in depth
_depth_check = [Depth(), FixedPoint('depth')]
def _opt_control(property_set):
return not property_set['depth_fixed_point']
_opt = [Optimize1qGates(), CXCancellation()]
pm1 = PassManager()
if coupling_map:
pm1.append(_set_initial_layout)
pm1.append([
TrivialLayout(coupling_map),
Layout2qDistance(coupling_map,
property_name='trivial_layout_score')
],
condition=_choose_layout_condition)
pm1.append(DenseLayout(coupling_map, backend_properties),
condition=_not_perfect_yet)
pm1.append(_embed)
pm1.append(_unroll)
if coupling_map:
pm1.append(_swap_check)
pm1.append(_swap, condition=_swap_condition)
if not coupling_map.is_symmetric:
pm1.append(_direction_check)
pm1.append(_direction, condition=_direction_condition)
pm1.append(_reset)
pm1.append(_depth_check + _opt, do_while=_opt_control)
return pm1
backend_device = IBMQ.get_backend('ibmqx4')
# 0. build circuit
from qiskit import QuantumRegister, ClassicalRegister, QuantumCircuit
q = QuantumRegister(2)
c = ClassicalRegister(2)
circ = QuantumCircuit(q, c)
circ.cx(q[0], q[1])
circ.cx(q[0], q[1])
circ.cx(q[0], q[1])
circ.cx(q[0], q[1])
circ.measure(q, c)
# draw circuit
print("orginal circuit")
print(circ.draw())
# 1. standard compile -- standard qiskit passes, when no PassManager given
from qiskit import transpiler
circuit1 = transpiler.transpile(circ, backend_device)
print("circuit after standard pass manager")
print(circuit1.draw())
# 2. custom compile -- customize PassManager to run specific circuit transformations
from qiskit.transpiler.passes import CXCancellation
pm = transpiler.PassManager()
pm.append(CXCancellation())
circuit2 = transpiler.transpile(circ, backend_device, pass_manager=pm)
print("circuit after custom pass manager")
print(circuit2.draw())
def level_1_pass_manager(
pass_manager_config: PassManagerConfig) -> PassManager:
"""Level 1 pass manager: light optimization by simple adjacent gate collapsing.
This pass manager applies the user-given initial layout. If none is given,
and a trivial layout (i-th virtual -> i-th physical) makes the circuit fit
the coupling map, that is used.
Otherwise, the circuit is mapped to the most densely connected coupling subgraph,
and swaps are inserted to map. Any unused physical qubit is allocated as ancilla space.
The pass manager then unrolls the circuit to the desired basis, and transforms the
circuit to match the coupling map. Finally, optimizations in the form of adjacent
gate collapse and redundant reset removal are performed.
Note:
In simulators where ``coupling_map=None``, only the unrolling and
optimization stages are done.
Args:
pass_manager_config: configuration of the pass manager.
Returns:
a level 1 pass manager.
Raises:
TranspilerError: if the passmanager config is invalid.
"""
basis_gates = pass_manager_config.basis_gates
inst_map = pass_manager_config.inst_map
coupling_map = pass_manager_config.coupling_map
initial_layout = pass_manager_config.initial_layout
layout_method = pass_manager_config.layout_method or "dense"
routing_method = pass_manager_config.routing_method or "stochastic"
translation_method = pass_manager_config.translation_method or "translator"
scheduling_method = pass_manager_config.scheduling_method
instruction_durations = pass_manager_config.instruction_durations
seed_transpiler = pass_manager_config.seed_transpiler
backend_properties = pass_manager_config.backend_properties
approximation_degree = pass_manager_config.approximation_degree
unitary_synthesis_method = pass_manager_config.unitary_synthesis_method
unitary_synthesis_plugin_config = pass_manager_config.unitary_synthesis_plugin_config
timing_constraints = pass_manager_config.timing_constraints or TimingConstraints(
)
target = pass_manager_config.target
# 1. Use trivial layout if no layout given
_given_layout = SetLayout(initial_layout)
_choose_layout_and_score = [
TrivialLayout(coupling_map),
Layout2qDistance(coupling_map, property_name="trivial_layout_score"),
]
def _choose_layout_condition(property_set):
return not property_set["layout"]
# 2. Decompose so only 1-qubit and 2-qubit gates remain
_unroll3q = [
# Use unitary synthesis for basis aware decomposition of UnitaryGates
UnitarySynthesis(
basis_gates,
approximation_degree=approximation_degree,
method=unitary_synthesis_method,
min_qubits=3,
plugin_config=unitary_synthesis_plugin_config,
),
Unroll3qOrMore(),
]
# 3. Use a better layout on densely connected qubits, if circuit needs swaps
if layout_method == "trivial":
_improve_layout = TrivialLayout(coupling_map)
elif layout_method == "dense":
_improve_layout = DenseLayout(coupling_map, backend_properties)
elif layout_method == "noise_adaptive":
_improve_layout = NoiseAdaptiveLayout(backend_properties)
elif layout_method == "sabre":
_improve_layout = SabreLayout(coupling_map,
max_iterations=2,
seed=seed_transpiler)
else:
raise TranspilerError("Invalid layout method %s." % layout_method)
def _not_perfect_yet(property_set):
return (property_set["trivial_layout_score"] is not None
and property_set["trivial_layout_score"] != 0)
# 4. Extend dag/layout with ancillas using the full coupling map
_embed = [
FullAncillaAllocation(coupling_map),
EnlargeWithAncilla(),
ApplyLayout()
]
# 5. Swap to fit the coupling map
_swap_check = CheckMap(coupling_map)
def _swap_condition(property_set):
return not property_set["is_swap_mapped"]
_swap = [BarrierBeforeFinalMeasurements()]
if routing_method == "basic":
_swap += [BasicSwap(coupling_map)]
elif routing_method == "stochastic":
_swap += [
StochasticSwap(coupling_map, trials=20, seed=seed_transpiler)
]
elif routing_method == "lookahead":
_swap += [LookaheadSwap(coupling_map, search_depth=4, search_width=4)]
elif routing_method == "sabre":
_swap += [
SabreSwap(coupling_map,
heuristic="lookahead",
seed=seed_transpiler)
]
elif routing_method == "none":
_swap += [
Error(
msg=
("No routing method selected, but circuit is not routed to device. "
"CheckMap Error: {check_map_msg}"),
action="raise",
)
]
else:
raise TranspilerError("Invalid routing method %s." % routing_method)
# 6. Unroll to the basis
if translation_method == "unroller":
_unroll = [Unroller(basis_gates)]
elif translation_method == "translator":
from qiskit.circuit.equivalence_library import SessionEquivalenceLibrary as sel
_unroll = [
# Use unitary synthesis for basis aware decomposition of UnitaryGates before
# custom unrolling
UnitarySynthesis(
basis_gates,
approximation_degree=approximation_degree,
coupling_map=coupling_map,
method=unitary_synthesis_method,
backend_props=backend_properties,
plugin_config=unitary_synthesis_plugin_config,
),
UnrollCustomDefinitions(sel, basis_gates),
BasisTranslator(sel, basis_gates, target),
]
elif translation_method == "synthesis":
_unroll = [
# Use unitary synthesis for basis aware decomposition of UnitaryGates before
# collection
UnitarySynthesis(
basis_gates,
approximation_degree=approximation_degree,
coupling_map=coupling_map,
method=unitary_synthesis_method,
backend_props=backend_properties,
min_qubits=3,
),
Unroll3qOrMore(),
Collect2qBlocks(),
ConsolidateBlocks(basis_gates=basis_gates),
UnitarySynthesis(
basis_gates,
approximation_degree=approximation_degree,
coupling_map=coupling_map,
method=unitary_synthesis_method,
backend_props=backend_properties,
plugin_config=unitary_synthesis_plugin_config,
),
]
else:
raise TranspilerError("Invalid translation method %s." %
translation_method)
# 7. Fix any bad CX directions
_direction_check = [CheckGateDirection(coupling_map, target)]
def _direction_condition(property_set):
return not property_set["is_direction_mapped"]
_direction = [GateDirection(coupling_map, target)]
# 8. Remove zero-state reset
_reset = RemoveResetInZeroState()
# 9. Merge 1q rotations and cancel CNOT gates iteratively until no more change in depth
_depth_check = [Depth(), FixedPoint("depth")]
def _opt_control(property_set):
return not property_set["depth_fixed_point"]
_opt = [Optimize1qGatesDecomposition(basis_gates), CXCancellation()]
# 10. Unify all durations (either SI, or convert to dt if known)
# Schedule the circuit only when scheduling_method is supplied
_time_unit_setup = [ContainsInstruction("delay")]
_time_unit_conversion = [TimeUnitConversion(instruction_durations)]
def _contains_delay(property_set):
return property_set["contains_delay"]
_scheduling = []
if scheduling_method:
_scheduling += _time_unit_conversion
if scheduling_method in {"alap", "as_late_as_possible"}:
_scheduling += [ALAPSchedule(instruction_durations)]
elif scheduling_method in {"asap", "as_soon_as_possible"}:
_scheduling += [ASAPSchedule(instruction_durations)]
else:
raise TranspilerError("Invalid scheduling method %s." %
scheduling_method)
# 11. Call measure alignment. Should come after scheduling.
if (timing_constraints.granularity != 1
or timing_constraints.min_length != 1
or timing_constraints.acquire_alignment != 1):
_alignments = [
ValidatePulseGates(granularity=timing_constraints.granularity,
min_length=timing_constraints.min_length),
AlignMeasures(alignment=timing_constraints.acquire_alignment),
]
else:
_alignments = []
# Build pass manager
pm1 = PassManager()
if coupling_map or initial_layout:
pm1.append(_given_layout)
pm1.append(_unroll3q)
pm1.append(_choose_layout_and_score,
condition=_choose_layout_condition)
pm1.append(_improve_layout, condition=_not_perfect_yet)
pm1.append(_embed)
pm1.append(_swap_check)
pm1.append(_swap, condition=_swap_condition)
pm1.append(_unroll)
if (coupling_map and not coupling_map.is_symmetric) or (
target is not None
and target.get_non_global_operation_names(strict_direction=True)):
pm1.append(_direction_check)
pm1.append(_direction, condition=_direction_condition)
pm1.append(_reset)
pm1.append(_depth_check + _opt + _unroll, do_while=_opt_control)
if inst_map and inst_map.has_custom_gate():
pm1.append(PulseGates(inst_map=inst_map))
if scheduling_method:
pm1.append(_scheduling)
elif instruction_durations:
pm1.append(_time_unit_setup)
pm1.append(_time_unit_conversion, condition=_contains_delay)
pm1.append(_alignments)
return pm1
def level_1_pass_manager(
pass_manager_config: PassManagerConfig) -> PassManager:
"""Level 1 pass manager: light optimization by simple adjacent gate collapsing.
This pass manager applies the user-given initial layout. If none is given,
and a trivial layout (i-th virtual -> i-th physical) makes the circuit fit
the coupling map, that is used.
Otherwise, the circuit is mapped to the most densely connected coupling subgraph,
and swaps are inserted to map. Any unused physical qubit is allocated as ancilla space.
The pass manager then unrolls the circuit to the desired basis, and transforms the
circuit to match the coupling map. Finally, optimizations in the form of adjacent
gate collapse and redundant reset removal are performed.
Note:
In simulators where ``coupling_map=None``, only the unrolling and
optimization stages are done.
Args:
pass_manager_config: configuration of the pass manager.
Returns:
a level 1 pass manager.
Raises:
TranspilerError: if the passmanager config is invalid.
"""
basis_gates = pass_manager_config.basis_gates
coupling_map = pass_manager_config.coupling_map
initial_layout = pass_manager_config.initial_layout
layout_method = pass_manager_config.layout_method or 'dense'
routing_method = pass_manager_config.routing_method or 'stochastic'
translation_method = pass_manager_config.translation_method or 'translator'
scheduling_method = pass_manager_config.scheduling_method
instruction_durations = pass_manager_config.instruction_durations
seed_transpiler = pass_manager_config.seed_transpiler
backend_properties = pass_manager_config.backend_properties
approximation_degree = pass_manager_config.approximation_degree
# 1. Use trivial layout if no layout given
_given_layout = SetLayout(initial_layout)
_choose_layout_and_score = [
TrivialLayout(coupling_map),
Layout2qDistance(coupling_map, property_name='trivial_layout_score')
]
def _choose_layout_condition(property_set):
return not property_set['layout']
# 2. Use a better layout on densely connected qubits, if circuit needs swaps
if layout_method == 'trivial':
_improve_layout = TrivialLayout(coupling_map)
elif layout_method == 'dense':
_improve_layout = DenseLayout(coupling_map, backend_properties)
elif layout_method == 'noise_adaptive':
_improve_layout = NoiseAdaptiveLayout(backend_properties)
elif layout_method == 'sabre':
_improve_layout = SabreLayout(coupling_map,
max_iterations=2,
seed=seed_transpiler)
else:
raise TranspilerError("Invalid layout method %s." % layout_method)
def _not_perfect_yet(property_set):
return property_set['trivial_layout_score'] is not None and \
property_set['trivial_layout_score'] != 0
# 3. Extend dag/layout with ancillas using the full coupling map
_embed = [
FullAncillaAllocation(coupling_map),
EnlargeWithAncilla(),
ApplyLayout()
]
# 4. Decompose so only 1-qubit and 2-qubit gates remain
_unroll3q = Unroll3qOrMore()
# 5. Swap to fit the coupling map
_swap_check = CheckMap(coupling_map)
def _swap_condition(property_set):
return not property_set['is_swap_mapped']
_swap = [BarrierBeforeFinalMeasurements()]
if routing_method == 'basic':
_swap += [BasicSwap(coupling_map)]
elif routing_method == 'stochastic':
_swap += [
StochasticSwap(coupling_map, trials=20, seed=seed_transpiler)
]
elif routing_method == 'lookahead':
_swap += [LookaheadSwap(coupling_map, search_depth=4, search_width=4)]
elif routing_method == 'sabre':
_swap += [
SabreSwap(coupling_map,
heuristic='lookahead',
seed=seed_transpiler)
]
elif routing_method == 'none':
_swap += [
Error(
msg=
'No routing method selected, but circuit is not routed to device. '
'CheckMap Error: {check_map_msg}',
action='raise')
]
else:
raise TranspilerError("Invalid routing method %s." % routing_method)
# 6. Unroll to the basis
if translation_method == 'unroller':
_unroll = [Unroller(basis_gates)]
elif translation_method == 'translator':
from qiskit.circuit.equivalence_library import SessionEquivalenceLibrary as sel
_unroll = [
UnrollCustomDefinitions(sel, basis_gates),
BasisTranslator(sel, basis_gates)
]
elif translation_method == 'synthesis':
_unroll = [
Unroll3qOrMore(),
Collect2qBlocks(),
ConsolidateBlocks(basis_gates=basis_gates),
UnitarySynthesis(basis_gates,
approximation_degree=approximation_degree),
]
else:
raise TranspilerError("Invalid translation method %s." %
translation_method)
# 7. Fix any bad CX directions
_direction_check = [CheckGateDirection(coupling_map)]
def _direction_condition(property_set):
return not property_set['is_direction_mapped']
_direction = [GateDirection(coupling_map)]
# 8. Remove zero-state reset
_reset = RemoveResetInZeroState()
# 9. Merge 1q rotations and cancel CNOT gates iteratively until no more change in depth
_depth_check = [Depth(), FixedPoint('depth')]
def _opt_control(property_set):
return not property_set['depth_fixed_point']
_opt = [Optimize1qGatesDecomposition(basis_gates), CXCancellation()]
# 10. Unify all durations (either SI, or convert to dt if known)
# Schedule the circuit only when scheduling_method is supplied
_scheduling = [TimeUnitConversion(instruction_durations)]
if scheduling_method:
if scheduling_method in {'alap', 'as_late_as_possible'}:
_scheduling += [ALAPSchedule(instruction_durations)]
elif scheduling_method in {'asap', 'as_soon_as_possible'}:
_scheduling += [ASAPSchedule(instruction_durations)]
else:
raise TranspilerError("Invalid scheduling method %s." %
scheduling_method)
# Build pass manager
pm1 = PassManager()
if coupling_map or initial_layout:
pm1.append(_given_layout)
pm1.append(_choose_layout_and_score,
condition=_choose_layout_condition)
pm1.append(_improve_layout, condition=_not_perfect_yet)
pm1.append(_embed)
pm1.append(_unroll3q)
pm1.append(_swap_check)
pm1.append(_swap, condition=_swap_condition)
pm1.append(_unroll)
if coupling_map and not coupling_map.is_symmetric:
pm1.append(_direction_check)
pm1.append(_direction, condition=_direction_condition)
pm1.append(_unroll)
pm1.append(_reset)
pm1.append(_depth_check + _opt, do_while=_opt_control)
pm1.append(_scheduling)
return pm1
def level_1_pass_manager(pass_manager_config: PassManagerConfig) -> StagedPassManager:
"""Level 1 pass manager: light optimization by simple adjacent gate collapsing.
This pass manager applies the user-given initial layout. If none is given,
and a trivial layout (i-th virtual -> i-th physical) makes the circuit fit
the coupling map, that is used.
Otherwise, the circuit is mapped to the most densely connected coupling subgraph,
and swaps are inserted to map. Any unused physical qubit is allocated as ancilla space.
The pass manager then unrolls the circuit to the desired basis, and transforms the
circuit to match the coupling map. Finally, optimizations in the form of adjacent
gate collapse and redundant reset removal are performed.
Args:
pass_manager_config: configuration of the pass manager.
Returns:
a level 1 pass manager.
Raises:
TranspilerError: if the passmanager config is invalid.
"""
basis_gates = pass_manager_config.basis_gates
inst_map = pass_manager_config.inst_map
coupling_map = pass_manager_config.coupling_map
initial_layout = pass_manager_config.initial_layout
layout_method = pass_manager_config.layout_method or "dense"
routing_method = pass_manager_config.routing_method or "stochastic"
translation_method = pass_manager_config.translation_method or "translator"
scheduling_method = pass_manager_config.scheduling_method
instruction_durations = pass_manager_config.instruction_durations
seed_transpiler = pass_manager_config.seed_transpiler
backend_properties = pass_manager_config.backend_properties
approximation_degree = pass_manager_config.approximation_degree
unitary_synthesis_method = pass_manager_config.unitary_synthesis_method
unitary_synthesis_plugin_config = pass_manager_config.unitary_synthesis_plugin_config
timing_constraints = pass_manager_config.timing_constraints or TimingConstraints()
target = pass_manager_config.target
# Use trivial layout if no layout given
_given_layout = SetLayout(initial_layout)
def _choose_layout_condition(property_set):
return not property_set["layout"]
def _trivial_not_perfect(property_set):
# Verify that a trivial layout is perfect. If trivial_layout_score > 0
# the layout is not perfect. The layout is unconditionally set by trivial
# layout so we need to clear it before contuing.
if (
property_set["trivial_layout_score"] is not None
and property_set["trivial_layout_score"] != 0
):
return True
return False
# Use a better layout on densely connected qubits, if circuit needs swaps
def _vf2_match_not_found(property_set):
# If a layout hasn't been set by the time we run vf2 layout we need to
# run layout
if property_set["layout"] is None:
return True
# if VF2 layout stopped for any reason other than solution found we need
# to run layout since VF2 didn't converge.
if (
property_set["VF2Layout_stop_reason"] is not None
and property_set["VF2Layout_stop_reason"] is not VF2LayoutStopReason.SOLUTION_FOUND
):
return True
return False
_choose_layout_0 = (
[]
if pass_manager_config.layout_method
else [
TrivialLayout(coupling_map),
Layout2qDistance(coupling_map, property_name="trivial_layout_score"),
]
)
_choose_layout_1 = (
[]
if pass_manager_config.layout_method
else VF2Layout(
coupling_map,
seed=seed_transpiler,
call_limit=int(5e4), # Set call limit to ~100ms with retworkx 0.10.2
properties=backend_properties,
target=target,
)
)
if layout_method == "trivial":
_improve_layout = TrivialLayout(coupling_map)
elif layout_method == "dense":
_improve_layout = DenseLayout(coupling_map, backend_properties, target=target)
elif layout_method == "noise_adaptive":
_improve_layout = NoiseAdaptiveLayout(backend_properties)
elif layout_method == "sabre":
_improve_layout = SabreLayout(coupling_map, max_iterations=2, seed=seed_transpiler)
else:
raise TranspilerError("Invalid layout method %s." % layout_method)
toqm_pass = False
if routing_method == "basic":
routing_pass = BasicSwap(coupling_map)
elif routing_method == "stochastic":
routing_pass = StochasticSwap(coupling_map, trials=20, seed=seed_transpiler)
elif routing_method == "lookahead":
routing_pass = LookaheadSwap(coupling_map, search_depth=4, search_width=4)
elif routing_method == "sabre":
routing_pass = SabreSwap(coupling_map, heuristic="lookahead", seed=seed_transpiler)
elif routing_method == "toqm":
HAS_TOQM.require_now("TOQM-based routing")
from qiskit_toqm import ToqmSwap, ToqmStrategyO1, latencies_from_target
if initial_layout:
raise TranspilerError("Initial layouts are not supported with TOQM-based routing.")
toqm_pass = True
# Note: BarrierBeforeFinalMeasurements is skipped intentionally since ToqmSwap
# does not yet support barriers.
routing_pass = ToqmSwap(
coupling_map,
strategy=ToqmStrategyO1(
latencies_from_target(
coupling_map, instruction_durations, basis_gates, backend_properties, target
)
),
)
elif routing_method == "none":
routing_pass = Error(
msg="No routing method selected, but circuit is not routed to device. "
"CheckMap Error: {check_map_msg}",
action="raise",
)
else:
raise TranspilerError("Invalid routing method %s." % routing_method)
# Build optimization loop: merge 1q rotations and cancel CNOT gates iteratively
# until no more change in depth
_depth_check = [Depth(), FixedPoint("depth")]
_size_check = [Size(), FixedPoint("size")]
def _opt_control(property_set):
return (not property_set["depth_fixed_point"]) or (not property_set["size_fixed_point"])
_opt = [Optimize1qGatesDecomposition(basis_gates), CXCancellation()]
unroll_3q = None
# Build full pass manager
if coupling_map or initial_layout:
unroll_3q = common.generate_unroll_3q(
target,
basis_gates,
approximation_degree,
unitary_synthesis_method,
unitary_synthesis_plugin_config,
)
layout = PassManager()
layout.append(_given_layout)
layout.append(_choose_layout_0, condition=_choose_layout_condition)
layout.append(_choose_layout_1, condition=_trivial_not_perfect)
layout.append(_improve_layout, condition=_vf2_match_not_found)
layout += common.generate_embed_passmanager(coupling_map)
vf2_call_limit = None
if pass_manager_config.layout_method is None and pass_manager_config.initial_layout is None:
vf2_call_limit = int(5e4) # Set call limit to ~100ms with retworkx 0.10.2
routing = common.generate_routing_passmanager(
routing_pass,
target,
coupling_map,
vf2_call_limit=vf2_call_limit,
backend_properties=backend_properties,
seed_transpiler=seed_transpiler,
check_trivial=True,
use_barrier_before_measurement=not toqm_pass,
)
else:
layout = None
routing = None
translation = common.generate_translation_passmanager(
target,
basis_gates,
translation_method,
approximation_degree,
coupling_map,
backend_properties,
unitary_synthesis_method,
unitary_synthesis_plugin_config,
)
pre_routing = None
if toqm_pass:
pre_routing = translation
if (coupling_map and not coupling_map.is_symmetric) or (
target is not None and target.get_non_global_operation_names(strict_direction=True)
):
pre_optimization = common.generate_pre_op_passmanager(target, coupling_map, True)
else:
pre_optimization = common.generate_pre_op_passmanager(remove_reset_in_zero=True)
optimization = PassManager()
unroll = [pass_ for x in translation.passes() for pass_ in x["passes"]]
optimization.append(_depth_check + _size_check)
opt_loop = _opt + unroll + _depth_check + _size_check
optimization.append(opt_loop, do_while=_opt_control)
sched = common.generate_scheduling(
instruction_durations, scheduling_method, timing_constraints, inst_map
)
return StagedPassManager(
init=unroll_3q,
layout=layout,
pre_routing=pre_routing,
routing=routing,
translation=translation,
pre_optimization=pre_optimization,
optimization=optimization,
scheduling=sched,
)
def level_1_pass_manager(
pass_manager_config: PassManagerConfig) -> PassManager:
"""Level 1 pass manager: light optimization by simple adjacent gate collapsing.
This pass manager applies the user-given initial layout. If none is given,
and a trivial layout (i-th virtual -> i-th physical) makes the circuit fit
the coupling map, that is used.
Otherwise, the circuit is mapped to the most densely connected coupling subgraph,
and swaps are inserted to map. Any unused physical qubit is allocated as ancilla space.
The pass manager then unrolls the circuit to the desired basis, and transforms the
circuit to match the coupling map. Finally, optimizations in the form of adjacent
gate collapse and redundant reset removal are performed.
Note:
In simulators where ``coupling_map=None``, only the unrolling and
optimization stages are done.
Args:
pass_manager_config: configuration of the pass manager.
Returns:
a level 1 pass manager.
Raises:
TranspilerError: if the passmanager config is invalid.
"""
basis_gates = pass_manager_config.basis_gates
inst_map = pass_manager_config.inst_map
coupling_map = pass_manager_config.coupling_map
initial_layout = pass_manager_config.initial_layout
layout_method = pass_manager_config.layout_method or "dense"
routing_method = pass_manager_config.routing_method or "stochastic"
translation_method = pass_manager_config.translation_method or "translator"
scheduling_method = pass_manager_config.scheduling_method
instruction_durations = pass_manager_config.instruction_durations
seed_transpiler = pass_manager_config.seed_transpiler
backend_properties = pass_manager_config.backend_properties
approximation_degree = pass_manager_config.approximation_degree
unitary_synthesis_method = pass_manager_config.unitary_synthesis_method
unitary_synthesis_plugin_config = pass_manager_config.unitary_synthesis_plugin_config
timing_constraints = pass_manager_config.timing_constraints or TimingConstraints(
)
target = pass_manager_config.target
# 1. Use trivial layout if no layout given if that isn't perfect use vf2 layout
_given_layout = SetLayout(initial_layout)
def _choose_layout_condition(property_set):
return not property_set["layout"]
def _trivial_not_perfect(property_set):
# Verify that a trivial layout is perfect. If trivial_layout_score > 0
# the layout is not perfect. The layout is unconditionally set by trivial
# layout so we need to clear it before contuing.
if (property_set["trivial_layout_score"] is not None
and property_set["trivial_layout_score"] != 0):
return True
return False
def _vf2_match_not_found(property_set):
# If a layout hasn't been set by the time we run vf2 layout we need to
# run layout
if property_set["layout"] is None:
return True
# if VF2 layout stopped for any reason other than solution found we need
# to run layout since VF2 didn't converge.
if (property_set["VF2Layout_stop_reason"] is not None
and property_set["VF2Layout_stop_reason"]
is not VF2LayoutStopReason.SOLUTION_FOUND):
return True
return False
_choose_layout_0 = ([] if pass_manager_config.layout_method else [
TrivialLayout(coupling_map),
Layout2qDistance(coupling_map, property_name="trivial_layout_score"),
])
_choose_layout_1 = ([] if pass_manager_config.layout_method else VF2Layout(
coupling_map,
seed=seed_transpiler,
call_limit=int(5e4), # Set call limit to ~100ms with retworkx 0.10.2
time_limit=0.1,
properties=backend_properties,
target=target,
))
# 2. Decompose so only 1-qubit and 2-qubit gates remain
_unroll3q = [
# Use unitary synthesis for basis aware decomposition of UnitaryGates
UnitarySynthesis(
basis_gates,
approximation_degree=approximation_degree,
method=unitary_synthesis_method,
min_qubits=3,
plugin_config=unitary_synthesis_plugin_config,
target=target,
),
Unroll3qOrMore(),
]
# 3. Use a better layout on densely connected qubits, if circuit needs swaps
if layout_method == "trivial":
_improve_layout = TrivialLayout(coupling_map)
elif layout_method == "dense":
_improve_layout = DenseLayout(coupling_map,
backend_properties,
target=target)
elif layout_method == "noise_adaptive":
_improve_layout = NoiseAdaptiveLayout(backend_properties)
elif layout_method == "sabre":
_improve_layout = SabreLayout(coupling_map,
max_iterations=2,
seed=seed_transpiler)
else:
raise TranspilerError("Invalid layout method %s." % layout_method)
# 4. Extend dag/layout with ancillas using the full coupling map
_embed = [
FullAncillaAllocation(coupling_map),
EnlargeWithAncilla(),
ApplyLayout()
]
# 5. Swap to fit the coupling map
_swap_check = CheckMap(coupling_map)
def _swap_condition(property_set):
return not property_set["is_swap_mapped"]
_swap = [BarrierBeforeFinalMeasurements()]
if routing_method == "basic":
_swap += [BasicSwap(coupling_map)]
elif routing_method == "stochastic":
_swap += [
StochasticSwap(coupling_map, trials=20, seed=seed_transpiler)
]
elif routing_method == "lookahead":
_swap += [LookaheadSwap(coupling_map, search_depth=4, search_width=4)]
elif routing_method == "sabre":
_swap += [
SabreSwap(coupling_map,
heuristic="lookahead",
seed=seed_transpiler)
]
elif routing_method == "none":
_swap += [
Error(
msg=
("No routing method selected, but circuit is not routed to device. "
"CheckMap Error: {check_map_msg}"),
action="raise",
)
]
else:
raise TranspilerError("Invalid routing method %s." % routing_method)
# 6. Unroll to the basis
if translation_method == "unroller":
_unroll = [Unroller(basis_gates)]
elif translation_method == "translator":
from qiskit.circuit.equivalence_library import SessionEquivalenceLibrary as sel
_unroll = [
# Use unitary synthesis for basis aware decomposition of UnitaryGates before
# custom unrolling
UnitarySynthesis(
basis_gates,
approximation_degree=approximation_degree,
coupling_map=coupling_map,
method=unitary_synthesis_method,
backend_props=backend_properties,
plugin_config=unitary_synthesis_plugin_config,
target=target,
),
UnrollCustomDefinitions(sel, basis_gates),
BasisTranslator(sel, basis_gates, target),
]
elif translation_method == "synthesis":
_unroll = [
# Use unitary synthesis for basis aware decomposition of UnitaryGates before
# collection
UnitarySynthesis(
basis_gates,
approximation_degree=approximation_degree,
coupling_map=coupling_map,
method=unitary_synthesis_method,
backend_props=backend_properties,
min_qubits=3,
target=target,
),
Unroll3qOrMore(),
Collect2qBlocks(),
ConsolidateBlocks(basis_gates=basis_gates, target=target),
UnitarySynthesis(
basis_gates,
approximation_degree=approximation_degree,
coupling_map=coupling_map,
method=unitary_synthesis_method,
backend_props=backend_properties,
plugin_config=unitary_synthesis_plugin_config,
target=target,
),
]
else:
raise TranspilerError("Invalid translation method %s." %
translation_method)
# 7. Fix any bad CX directions
_direction_check = [CheckGateDirection(coupling_map, target)]
def _direction_condition(property_set):
return not property_set["is_direction_mapped"]
_direction = [GateDirection(coupling_map, target)]
# 8. Remove zero-state reset
_reset = RemoveResetInZeroState()
# 9. Merge 1q rotations and cancel CNOT gates iteratively until no more change in depth
# or size of circuit
_depth_check = [Depth(), FixedPoint("depth")]
_size_check = [Size(), FixedPoint("size")]
def _opt_control(property_set):
return (not property_set["depth_fixed_point"]) or (
not property_set["size_fixed_point"])
_opt = [Optimize1qGatesDecomposition(basis_gates), CXCancellation()]
# Build pass manager
pm1 = PassManager()
if coupling_map or initial_layout:
pm1.append(_given_layout)
pm1.append(_unroll3q)
pm1.append(_choose_layout_0, condition=_choose_layout_condition)
pm1.append(_choose_layout_1, condition=_trivial_not_perfect)
pm1.append(_improve_layout, condition=_vf2_match_not_found)
pm1.append(_embed)
pm1.append(_swap_check)
pm1.append(_swap, condition=_swap_condition)
pm1.append(_unroll)
if (coupling_map and not coupling_map.is_symmetric) or (
target is not None
and target.get_non_global_operation_names(strict_direction=True)):
pm1.append(_direction_check)
pm1.append(_direction, condition=_direction_condition)
pm1.append(_reset)
pm1.append(_depth_check + _size_check)
pm1.append(_opt + _unroll + _depth_check + _size_check,
do_while=_opt_control)
if inst_map and inst_map.has_custom_gate():
pm1.append(PulseGates(inst_map=inst_map))
# 10. Unify all durations (either SI, or convert to dt if known)
# Schedule the circuit only when scheduling_method is supplied
# Apply alignment analysis regardless of scheduling for delay validation.
if scheduling_method:
# Do scheduling after unit conversion.
scheduler = {
"alap": ALAPScheduleAnalysis,
"as_late_as_possible": ALAPScheduleAnalysis,
"asap": ASAPScheduleAnalysis,
"as_soon_as_possible": ASAPScheduleAnalysis,
}
pm1.append(TimeUnitConversion(instruction_durations))
try:
pm1.append(scheduler[scheduling_method](instruction_durations))
except KeyError as ex:
raise TranspilerError("Invalid scheduling method %s." %
scheduling_method) from ex
elif instruction_durations:
# No scheduling. But do unit conversion for delays.
def _contains_delay(property_set):
return property_set["contains_delay"]
pm1.append(ContainsInstruction("delay"))
pm1.append(TimeUnitConversion(instruction_durations),
condition=_contains_delay)
if (timing_constraints.granularity != 1
or timing_constraints.min_length != 1
or timing_constraints.acquire_alignment != 1
or timing_constraints.pulse_alignment != 1):
# Run alignment analysis regardless of scheduling.
def _require_alignment(property_set):
return property_set["reschedule_required"]
pm1.append(
InstructionDurationCheck(
acquire_alignment=timing_constraints.acquire_alignment,
pulse_alignment=timing_constraints.pulse_alignment,
))
pm1.append(
ConstrainedReschedule(
acquire_alignment=timing_constraints.acquire_alignment,
pulse_alignment=timing_constraints.pulse_alignment,
),
condition=_require_alignment,
)
pm1.append(
ValidatePulseGates(
granularity=timing_constraints.granularity,
min_length=timing_constraints.min_length,
))
if scheduling_method:
# Call padding pass if circuit is scheduled
pm1.append(PadDelay())
return pm1
# 0. build circuit
from qiskit import QuantumRegister, ClassicalRegister, QuantumCircuit
q = QuantumRegister(2)
c = ClassicalRegister(2)
circ = QuantumCircuit(q, c)
circ.cx(q[0], q[1])
circ.cx(q[0], q[1])
circ.cx(q[0], q[1])
circ.cx(q[0], q[1])
circ.measure(q, c)
# draw circuit
from qiskit.tools.visualization import plot_circuit
plot_circuit(circ)
# 1. standard compile -- standard qiskit passes, when no PassManager given
from qiskit import transpiler, load_qasm_string
qobj_standard = transpiler.compile(circ, backend_device)
compiled_standard = load_qasm_string(
qobj_standard['circuits'][0]['compiled_circuit_qasm'])
plot_circuit(compiled_standard)
# 2. custom compile -- customize PassManager to run specific circuit transformations
from qiskit.transpiler.passes import CXCancellation
pm = transpiler.PassManager()
pm.add_pass(CXCancellation())
qobj_custom = transpiler.compile(circ, backend_device, pass_manager=pm)
compiled_custom = load_qasm_string(
qobj_custom['circuits'][0]['compiled_circuit_qasm'])
plot_circuit(compiled_custom)
def run(self, dag):
"""
Run the CNOTCascadesTransform pass over a dag circuit.
After the transformation, proceeds to check for possible one-qubit gates optimizations and
CNOT cancellations, as subsequent CNOT nearest-neighbor sequences could create
the opportunity for useful circuit simplifications.
Args:
dag (DAGCircuit): the dag circuit to be searched for CNOT cascades.
Returns:
new_dag (DAGCircuit): a new dag where all CNOT cascades have been transformed.
"""
# prepare new dag
new_dag = DAGCircuit()
new_dag.name = dag.name
self._num_qubits = dag.num_qubits()
for q_reg in dag.qregs.values():
new_dag.add_qreg(q_reg)
for c_reg in dag.cregs.values():
new_dag.add_creg(c_reg)
i = 0
for q_reg in dag.qregs.values():
for q in q_reg:
self._wires_to_id[q] = i
self._id_to_wires[i] = q
i += 1
depth = new_dag.depth()
while True:
new_dag = Optimize1qGates().run(new_dag)
new_dag = CXCancellation().run(new_dag)
new_depth = new_dag.depth()
if new_depth < depth:
depth = new_depth
else:
break
# get dag layers
self._layers = [layer['graph'] for layer in dag.layers()]
# this is the list of new layers for the nearest-neighbor CNOT sequences
self._extra_layers = {l: [] for l in range(len(self._layers))}
# loop through all layers
for i, layer in enumerate(self._layers):
if i != 0:
# add nearest-neighbor CNOT sequences in the right layer
for gate in self._extra_layers[i - 1]:
new_dag.apply_operation_back(*gate)
# check all gates in the layer
for gate in layer.op_nodes():
temp = None
# do not add gates that have been used in the transformation process
if gate in self._skip:
continue
# every cnot could be the starting point for a CNOT cascade
elif gate.name == 'cx':
logger.debug('Check Cascade %s with qargs: %s\n' % (gate.name, gate.qargs))
# check for a CNOT cascade
temp = self.check_cascade(gate, i)
if temp is not None:
logger.info('Cascade Starts at %s with qargs: %s\n' % (gate.name, gate.qargs))
self._skip.extend(temp)
else:
logger.debug(
'Check Inverse Cascade at %s with qargs: %s\n' % (gate.name, gate.qargs))
# check for an inverted CNOT cascade
temp = self.check_inverse_cascade(gate, i)
if temp is not None:
logger.info(
'Inverse Cascade Starts at %s with qargs: %s\n' % (gate.name, gate.qargs))
self._skip.extend(temp)
else:
# apply the CNOT if no cascade was found
self._skip.append(gate)
logger.debug(
'Found Nothing at %s with qargs: %s\n' % (gate.name, gate.qargs))
new_dag.apply_operation_back(gate.op, gate.qargs, gate.cargs, gate.condition)
else:
self._skip.append(gate)
new_dag.apply_operation_back(gate.op, gate.qargs, gate.cargs, gate.condition)
logger.debug('Cascades found: %s' % str(self._extra_layers))
# optimize dag after transformation
depth = new_dag.depth()
while True:
new_dag = Optimize1qGates().run(new_dag)
new_dag = CXCancellation().run(new_dag)
new_depth = new_dag.depth()
if new_depth < depth:
depth = new_depth
else:
break
return new_dag
def level_1_pass_manager(
pass_manager_config: PassManagerConfig) -> PassManager:
"""Level 1 pass manager: light optimization by simple adjacent gate collapsing.
This pass manager applies the user-given initial layout. If none is given,
and a trivial layout (i-th virtual -> i-th physical) makes the circuit fit
the coupling map, that is used.
Otherwise, the circuit is mapped to the most densely connected coupling subgraph,
and swaps are inserted to map. Any unused physical qubit is allocated as ancilla space.
The pass manager then unrolls the circuit to the desired basis, and transforms the
circuit to match the coupling map. Finally, optimizations in the form of adjacent
gate collapse and redundant reset removal are performed.
Note:
In simulators where ``coupling_map=None``, only the unrolling and
optimization stages are done.
Args:
pass_manager_config: configuration of the pass manager.
Returns:
a level 1 pass manager.
Raises:
TranspilerError: if the passmanager config is invalid.
"""
basis_gates = pass_manager_config.basis_gates
coupling_map = pass_manager_config.coupling_map
initial_layout = pass_manager_config.initial_layout
layout_method = pass_manager_config.layout_method or 'dense'
routing_method = pass_manager_config.routing_method or 'stochastic'
seed_transpiler = pass_manager_config.seed_transpiler
backend_properties = pass_manager_config.backend_properties
# 1. Use trivial layout if no layout given
_given_layout = SetLayout(initial_layout)
_choose_layout_and_score = [
TrivialLayout(coupling_map),
Layout2qDistance(coupling_map, property_name='trivial_layout_score')
]
def _choose_layout_condition(property_set):
return not property_set['layout']
# 2. Use a better layout on densely connected qubits, if circuit needs swaps
if layout_method == 'trivial':
_improve_layout = TrivialLayout(coupling_map)
elif layout_method == 'dense':
_improve_layout = DenseLayout(coupling_map, backend_properties)
elif layout_method == 'noise_adaptive':
_improve_layout = NoiseAdaptiveLayout(backend_properties)
else:
raise TranspilerError("Invalid layout method %s." % layout_method)
def _not_perfect_yet(property_set):
return property_set['trivial_layout_score'] is not None and \
property_set['trivial_layout_score'] != 0
# 3. Extend dag/layout with ancillas using the full coupling map
_embed = [
FullAncillaAllocation(coupling_map),
EnlargeWithAncilla(),
ApplyLayout()
]
# 4. Decompose so only 1-qubit and 2-qubit gates remain
_unroll3q = Unroll3qOrMore()
# 5. Swap to fit the coupling map
_swap_check = CheckMap(coupling_map)
def _swap_condition(property_set):
return not property_set['is_swap_mapped']
_swap = [BarrierBeforeFinalMeasurements()]
if routing_method == 'basic':
_swap += [BasicSwap(coupling_map)]
elif routing_method == 'stochastic':
_swap += [
StochasticSwap(coupling_map, trials=20, seed=seed_transpiler)
]
elif routing_method == 'lookahead':
_swap += [LookaheadSwap(coupling_map, search_depth=4, search_width=4)]
else:
raise TranspilerError("Invalid routing method %s." % routing_method)
# 6. Unroll to the basis
_unroll = Unroller(basis_gates)
# 7. Fix any bad CX directions
_direction_check = [CheckCXDirection(coupling_map)]
def _direction_condition(property_set):
return not property_set['is_direction_mapped']
_direction = [CXDirection(coupling_map)]
# 8. Remove zero-state reset
_reset = RemoveResetInZeroState()
# 9. Merge 1q rotations and cancel CNOT gates iteratively until no more change in depth
_depth_check = [Depth(), FixedPoint('depth')]
def _opt_control(property_set):
return not property_set['depth_fixed_point']
_opt = [Optimize1qGates(basis_gates), CXCancellation()]
# Build pass manager
pm1 = PassManager()
if coupling_map:
pm1.append(_given_layout)
pm1.append(_choose_layout_and_score,
condition=_choose_layout_condition)
pm1.append(_improve_layout, condition=_not_perfect_yet)
pm1.append(_embed)
pm1.append(_unroll3q)
pm1.append(_swap_check)
pm1.append(_swap, condition=_swap_condition)
pm1.append(_unroll)
if coupling_map and not coupling_map.is_symmetric:
pm1.append(_direction_check)
pm1.append(_direction, condition=_direction_condition)
pm1.append(_reset)
pm1.append(_depth_check + _opt, do_while=_opt_control)
return pm1
qiskit_circ = QuantumCircuit.from_qasm_str(c.to_qasm())
pass_manager = PassManager(_pass)
qiskit_circ_opt = pass_manager.run(qiskit_circ)
c_opt = zx.Circuit.from_qasm(qiskit_circ_opt.qasm())
opt_tcount = c_opt.tcount()
opt_2qubitcount = c_opt.twoqubitcount()
# Quick and dirty. In theory, should depend on score function
if orig_tcount == opt_tcount and orig_2qubitcount == opt_2qubitcount:
return False, (c, g)
return True, (c_opt, c_opt.to_graph())
# basic_swap = partial(qiskit_pass_base, _pass=BasicSwap()) # FIXME: how to use coupling map?
cx_cancellation = partial(qiskit_pass_base, _pass=CXCancellation())
optimize_1q = partial(qiskit_pass_base, _pass=Optimize1qGates())
optimize_1q_decomp = partial(qiskit_pass_base, _pass=Optimize1qGatesDecomposition())
def tket_pass_base(c, g, _pass):
orig_tcount = c.tcount()
orig_2qubitcount = c.twoqubitcount()
c_tket = pyzx_to_tk(c)
_pass.apply(c_tket)
RebasePyZX().apply(c_tket)
c_opt = tk_to_pyzx(c_tket)
opt_tcount = c_opt.tcount()
opt_2qubitcount = c_opt.twoqubitcount()
