def __call__(
self, width=None, height=None, virtual_has_wrap_arounds=None,
version=None, n_cpus_per_chip=18, with_monitors=True,
down_chips=None, down_cores=None, down_links=None):
"""
:param width: The width of the machine in chips
:param height: The height of the machine in chips
:param virtual_has_wrap_arounds: True if the machine\
should be created with wrap_arounds
:param version: The version of board to create
:param n_cpus_per_chip: The number of cores to put on each chip
:param with_monitors: If true, CPU 0 will be marked as a monitor
"""
machine = VirtualMachine(
width=width, height=height,
with_wrap_arounds=virtual_has_wrap_arounds,
version=version, n_cpus_per_chip=n_cpus_per_chip,
with_monitors=with_monitors, down_chips=down_chips,
down_cores=down_cores, down_links=down_links)
# Work out and add the spinnaker links and FPGA links
machine.add_spinnaker_links(version)
machine.add_fpga_links(version)
return machine
def test_ip_tags(self):
machine = VirtualMachine(12, 12, with_wrap_arounds=True)
eth_chips = machine.ethernet_connected_chips
vertices = [
SimpleMachineVertex(ResourceContainer(
iptags=[IPtagResource("127.0.0.1", port=None, strip_sdp=True)
]),
label="Vertex {}".format(i))
for i in range(len(eth_chips))
]
print("Created {} vertices".format(len(vertices)))
placements = Placements(
Placement(vertex, chip.x, chip.y, 1)
for vertex, chip in zip(vertices, eth_chips))
allocator = BasicTagAllocator()
_, _, tags = allocator(machine, placements)
for vertex, chip in zip(vertices, eth_chips):
iptags = tags.get_ip_tags_for_vertex(vertex)
self.assertEqual(len(iptags), 1,
"Incorrect number of tags assigned")
self.assertEqual(iptags[0].destination_x, chip.x,
"Destination of tag incorrect")
self.assertEqual(iptags[0].destination_y, chip.y,
"Destination of tag incorrect")
placement = placements.get_placement_of_vertex(vertex)
print(placement, "has tag", iptags[0])
def test_1_chip_pre_allocated_too_much_sdram(self):
machine = VirtualMachine(width=8, height=8)
graph = ApplicationGraph("Test")
partitioner = PartitionAndPlacePartitioner()
eight_meg = 8 * 1024 * 1024
# add graph vertices which reside on 0,0
for _ in range(0, 13):
graph.add_vertex(
SimpleTestVertex(constraints=[ChipAndCoreConstraint(x=0, y=0)],
n_atoms=1,
fixed_sdram_value=eight_meg))
# add pre-allocated resources for cores on 0,0
twenty_meg = 20 * 1024 * 1024
core_pre = SpecificChipSDRAMResource(chip=machine.get_chip_at(0, 0),
sdram_usage=twenty_meg)
pre_allocated_res = PreAllocatedResourceContainer(
specific_sdram_usage=[core_pre])
# run partitioner that should go boom
try:
partitioner(graph, machine, pre_allocated_res)
raise Exception("should have blown up here")
except PacmanPartitionException:
pass
except Exception:
raise Exception("should have blown up here")
def _do_test(self, placer):
machine = VirtualMachine(width=8, height=8)
graph = MachineGraph("Test")
vertices = [
SimpleMachineVertex(ResourceContainer(), label="v{}".format(i))
for i in range(100)
]
for vertex in vertices:
graph.add_vertex(vertex)
same_vertices = [
SimpleMachineVertex(ResourceContainer(), label="same{}".format(i))
for i in range(10)
]
random.seed(12345)
sdram_edges = list()
for vertex in same_vertices:
graph.add_vertex(vertex)
for i in range(0, random.randint(1, 5)):
sdram_edge = MachineEdge(
vertex, vertices[random.randint(0, 99)],
traffic_type=EdgeTrafficType.SDRAM)
sdram_edges.append(sdram_edge)
graph.add_edge(sdram_edge, "Test")
placements = placer(graph, machine)
for edge in sdram_edges:
pre_place = placements.get_placement_of_vertex(edge.pre_vertex)
post_place = placements.get_placement_of_vertex(edge.post_vertex)
self.assert_(pre_place.x == post_place.x)
self.assert_(pre_place.y == post_place.y)
def test_one_lpg_params(self):
machine = VirtualMachine(width=12, height=12, with_wrap_arounds=True)
default_params = {
'use_prefix': False,
'key_prefix': None,
'prefix_type': None,
'message_type': EIEIOType.KEY_32_BIT,
'right_shift': 0,
'payload_as_time_stamps': True,
'use_payload_prefix': True,
'payload_prefix': None,
'payload_right_shift': 0,
'number_of_packets_sent_per_time_step': 0,
'hostname': None,
'port': None,
'strip_sdp': None,
'board_address': None,
'tag': None
}
# data stores needed by algorithm
live_packet_gatherers = dict()
extended = dict(default_params)
extended.update({'partition_id': "EVENTS"})
default_params_holder = LivePacketGatherParameters(**extended)
live_packet_gatherers[default_params_holder] = list()
# run pre allocator
pre_alloc = PreAllocateResourcesForLivePacketGatherers()
pre_res = pre_alloc(
live_packet_gatherer_parameters=live_packet_gatherers,
machine=machine)
locs = list()
locs.append((0, 0))
locs.append((4, 8))
locs.append((8, 4))
# verify sdram
sdrams = pre_res.specific_sdram_usage
for sdram in sdrams:
locs.remove((sdram.chip.x, sdram.chip.y))
self.assertEqual(sdram.sdram_usage,
LivePacketGatherMachineVertex.get_sdram_usage())
self.assertEqual(len(locs), 0)
locs = list()
locs.append((0, 0))
locs.append((4, 8))
locs.append((8, 4))
# verify cores
cores = pre_res.core_resources
for core in cores:
locs.remove((core.chip.x, core.chip.y))
self.assertEqual(core.n_cores, 1)
self.assertEqual(len(locs), 0)
# verify specific cores
self.assertEqual(len(pre_res.specific_core_resources), 0)
def test_1_chip_pre_allocated_same_core(self):
machine = VirtualMachine(width=8, height=8)
graph = ApplicationGraph("Test")
partitioner = PartitionAndPlacePartitioner()
# add graph vertices which reside on 0,0
for p in range(0, 13):
graph.add_vertex(
SimpleTestVertex(
constraints=[ChipAndCoreConstraint(x=0, y=0, p=p)],
n_atoms=1))
# add pre-allocated resources for cores on 0,0
core_pre = SpecificCoreResource(chip=machine.get_chip_at(0, 0),
cores=[4])
pre_allocated_res = PreAllocatedResourceContainer(
specific_core_resources=[core_pre])
# run partitioner that should go boom
try:
partitioner(graph, machine, pre_allocated_res)
raise Exception("should have blown up here")
except PacmanValueError:
pass
except Exception:
raise Exception("should have blown up here")
def test_n_cores_available(self):
machine = VirtualMachine(width=2,
height=2,
n_cpus_per_chip=18,
with_monitors=True)
chip = machine.get_chip_at(0, 0)
preallocated_resources = PreAllocatedResourceContainer(
specific_core_resources=[
SpecificCoreResource(chip=chip, cores=[1])
],
core_resources=[CoreResource(chip=chip, n_cores=2)])
tracker = ResourceTracker(
machine, preallocated_resources=preallocated_resources)
# Should be 14 cores = 18 - 1 monitor - 1 specific core - 2 other cores
self.assertEqual(tracker._n_cores_available(chip, (0, 0), None), 14)
# Should be 0 since the core is already pre allocated
self.assertEqual(tracker._n_cores_available(chip, (0, 0), 1), 0)
# Should be 1 since the core is not pre allocated
self.assertEqual(tracker._n_cores_available(chip, (0, 0), 2), 1)
# Should be 0 since the core is monitor
self.assertEqual(tracker._n_cores_available(chip, (0, 0), 0), 0)
# Allocate a core
tracker._allocate_core(chip, (0, 0), 2)
# Should be 13 cores as one now allocated
self.assertEqual(tracker._n_cores_available(chip, (0, 0), None), 13)
def test_fail(self):
machine = VirtualMachine(width=12, height=12, with_wrap_arounds=True)
live_packet_gatherers = dict()
pre_alloc = PreAllocateResourcesForLivePacketGatherers()
self.assertRaises(
Exception,
pre_alloc(live_packet_gatherer_parameters=live_packet_gatherers,
machine=machine))
def test_that_6_lpgs_are_generated_2_on_each_eth_chip(self):
machine = VirtualMachine(width=12, height=12, with_wrap_arounds=True)
graph = MachineGraph("Test")
default_params = {
'use_prefix': False,
'key_prefix': None,
'prefix_type': None,
'message_type': EIEIOType.KEY_32_BIT,
'right_shift': 0,
'payload_as_time_stamps': True,
'use_payload_prefix': True,
'payload_prefix': None,
'payload_right_shift': 0,
'number_of_packets_sent_per_time_step': 0,
'hostname': None,
'port': None,
'strip_sdp': None,
'board_address': None,
'tag': None,
'label': "test"
}
# data stores needed by algorithm
live_packet_gatherers = dict()
extended = dict(default_params)
extended.update({'partition_id': "EVENTS"})
default_params_holder = LivePacketGatherParameters(**extended)
live_packet_gatherers[default_params_holder] = list()
# and special LPG on Ethernet connected chips
index = 1
chip_special = dict()
for chip in machine.ethernet_connected_chips:
extended['label'] = "test{}".format(index)
extended['board_address'] = chip.ip_address
default_params_holder2 = LivePacketGatherParameters(**extended)
live_packet_gatherers[default_params_holder2] = list()
chip_special[(chip.x, chip.y)] = default_params_holder2
# run edge inserter that should go boom
edge_inserter = InsertLivePacketGatherersToGraphs()
lpg_verts_mapping = edge_inserter(
live_packet_gatherer_parameters=live_packet_gatherers,
machine=machine,
machine_graph=graph,
application_graph=None,
graph_mapper=None)
self.assertEqual(len(lpg_verts_mapping[default_params_holder]), 3)
for eth_chip in chip_special:
params = chip_special[eth_chip]
self.assertEqual(len(lpg_verts_mapping[params]), 1)
vertex = lpg_verts_mapping[params][eth_chip]
self.assertEqual(eth_chip[0], list(vertex.constraints)[0].x)
self.assertEqual(eth_chip[1], list(vertex.constraints)[0].y)
def test_that_3_lpgs_are_generated_on_3_board(self):
machine = VirtualMachine(width=12, height=12, with_wrap_arounds=True)
graph = MachineGraph("Test")
default_params = {
'use_prefix': False,
'key_prefix': None,
'prefix_type': None,
'message_type': EIEIOType.KEY_32_BIT,
'right_shift': 0,
'payload_as_time_stamps': True,
'use_payload_prefix': True,
'payload_prefix': None,
'payload_right_shift': 0,
'number_of_packets_sent_per_time_step': 0,
'hostname': None,
'port': None,
'strip_sdp': None,
'board_address': None,
'tag': None,
'label': "test"
}
# data stores needed by algorithm
live_packet_gatherers = dict()
extended = dict(default_params)
extended.update({'partition_id': "EVENTS"})
default_params_holder = LivePacketGatherParameters(**extended)
live_packet_gatherers[default_params_holder] = list()
# run edge inserter that should go boom
edge_inserter = InsertLivePacketGatherersToGraphs()
lpg_verts_mapping = edge_inserter(
live_packet_gatherer_parameters=live_packet_gatherers,
machine=machine,
machine_graph=graph,
application_graph=None,
graph_mapper=None)
self.assertEqual(len(lpg_verts_mapping[default_params_holder]), 3)
locs = list()
locs.append((0, 0))
locs.append((4, 8))
locs.append((8, 4))
for vertex in lpg_verts_mapping[default_params_holder].itervalues():
x = list(vertex.constraints)[0].x
y = list(vertex.constraints)[0].y
key = (x, y)
locs.remove(key)
self.assertEqual(len(locs), 0)
verts = lpg_verts_mapping[default_params_holder].values()
for vertex in graph.vertices:
self.assertIn(vertex, verts)
def test_none(self):
machine = VirtualMachine(width=12, height=12, with_wrap_arounds=True)
live_packet_gatherers = dict()
# run pre allocator
pre_alloc = PreAllocateResourcesForLivePacketGatherers()
pre_res = pre_alloc(
live_packet_gatherer_parameters=live_packet_gatherers,
machine=machine)
self.assertEqual(len(pre_res.specific_core_resources), 0)
self.assertEqual(len(pre_res.core_resources), 0)
self.assertEqual(len(pre_res.specific_sdram_usage), 0)
def test_deallocation_of_resources(self):
machine = VirtualMachine(width=2,
height=2,
n_cpus_per_chip=18,
with_monitors=True,
sdram_per_chip=12346)
tracker = ResourceTracker(machine, preallocated_resources=None)
sdram_res = SDRAMResource(12345)
resources = ResourceContainer(sdram=sdram_res)
chip_0 = machine.get_chip_at(0, 0)
# verify core tracker is empty
if (0, 0) in tracker._core_tracker:
raise Exception("shouldnt exist")
# verify sdram tracker
if tracker._sdram_tracker[0, 0] != -12346:
raise Exception("incorrect sdram of {}".format(
tracker._sdram_tracker[0, 0]))
# allocate some res
chip_x, chip_y, processor_id, ip_tags, reverse_ip_tags = \
tracker.allocate_resources(resources, [(0, 0)])
# verify chips used is updated
cores = list(tracker._core_tracker[(0, 0)])
self.assertEqual(len(cores), chip_0.n_user_processors - 1)
# verify sdram used is updated
sdram = tracker._sdram_tracker[(0, 0)]
self.assertEqual(sdram, -1)
if (0, 0) not in tracker._chips_used:
raise Exception("should exist")
# deallocate res
tracker.unallocate_resources(chip_x, chip_y, processor_id, resources,
ip_tags, reverse_ip_tags)
# verify chips used is updated
if ((0, 0) in tracker._core_tracker and len(
tracker._core_tracker[(0, 0)]) != chip_0.n_user_processors):
raise Exception("shouldn't exist or should be right size")
if (0, 0) in tracker._chips_used:
raise Exception("shouldnt exist")
# verify sdram tracker
if tracker._sdram_tracker[0, 0] != -12346:
raise Exception("incorrect sdram of {}".format(
tracker._sdram_tracker[0, 0]))
def test_too_many_ip_tags_for_1_board(self):
n_extra_vertices = 3
machine = VirtualMachine(12, 12, with_wrap_arounds=True)
eth_chips = machine.ethernet_connected_chips
eth_chip = eth_chips[0]
eth_chip_2 = machine.get_chip_at(eth_chip.x + 1, eth_chip.y + 1)
eth_procs = [
proc.processor_id for proc in eth_chip.processors
if not proc.is_monitor
]
procs = [proc for proc in eth_chip_2.processors if not proc.is_monitor]
eth2_procs = [proc.processor_id for proc in procs]
proc = procs[-1]
eth_vertices = [
SimpleMachineVertex(ResourceContainer(
iptags=[IPtagResource("127.0.0.1", port=tag, strip_sdp=True)]),
label="Ethernet Vertex {}".format(proc))
for tag in eth_chip.tag_ids
]
eth2_vertices = [
SimpleMachineVertex(ResourceContainer(iptags=[
IPtagResource("127.0.0.1", port=10000 + tag, strip_sdp=True)
]),
label="Ethernet 2 Vertex {}".format(proc))
for tag in range(n_extra_vertices)
]
placements = Placements(
Placement(vertex, eth_chip.x, eth_chip.y, proc)
for proc, vertex in zip(eth_procs, eth_vertices))
placements.add_placements(
Placement(vertex, eth_chip_2.x, eth_chip_2.y, proc)
for proc, vertex in zip(eth2_procs, eth2_vertices))
allocator = BasicTagAllocator()
_, _, tags = allocator(machine, placements)
tags_by_board = defaultdict(set)
for vertices in (eth_vertices, eth2_vertices):
for vertex in vertices:
iptags = tags.get_ip_tags_for_vertex(vertex)
self.assertEqual(len(iptags), 1,
"Incorrect number of tags assigned")
placement = placements.get_placement_of_vertex(vertex)
print(placement, "has tag", iptags[0])
self.assertFalse(
iptags[0].tag in tags_by_board[iptags[0].board_address],
"Tag used more than once")
tags_by_board[iptags[0].board_address].add(iptags[0].tag)
self.assertEqual(len(tags_by_board[eth_chip.ip_address]),
len(eth_chip.tag_ids),
"Wrong number of tags assigned to first Ethernet")
def __call__(
self,
width=None,
height=None,
virtual_has_wrap_arounds=None,
version=None,
n_cpus_per_chip=Machine.MAX_CORES_PER_CHIP,
with_monitors=True,
down_chips=None,
down_cores=None,
down_links=None,
max_sdram_size=None,
router_entries_per_chip=Router.ROUTER_DEFAULT_AVAILABLE_ENTRIES):
"""
:param width: The width of the machine in chips
:param height: The height of the machine in chips
:param virtual_has_wrap_arounds: \
True if the machine should be created with wrap_arounds
:param version: The version of board to create
:param n_cpus_per_chip: The number of cores to put on each chip
:param with_monitors: If true, CPU 0 will be marked as a monitor
:param down_chips: The set of chips that should be considered broken
:param down_cores: The set of cores that should be considered broken
:param down_links: The set of links that should be considered broken
:param max_sdram_size: The SDRAM that should be given to each chip
"""
# pylint: disable=too-many-arguments
machine = VirtualMachine(
width=width,
height=height,
with_wrap_arounds=virtual_has_wrap_arounds,
version=version,
n_cpus_per_chip=n_cpus_per_chip,
with_monitors=with_monitors,
down_chips=down_chips,
down_cores=down_cores,
down_links=down_links,
sdram_per_chip=max_sdram_size,
router_entries_per_chip=router_entries_per_chip)
# Work out and add the SpiNNaker links and FPGA links
machine.add_spinnaker_links(version)
machine.add_fpga_links(version)
return machine
def test_router_with_one_hop_route_all_default_link_5(self):
self.placements = Placements()
self.placement1 = Placement(x=0, y=2, p=2, vertex=self.vertex1)
self.placement2 = Placement(x=0, y=0, p=2, vertex=self.vertex2)
self.placements.add_placement(self.placement1)
self.placements.add_placement(self.placement2)
# sort out routing infos
self.routing_info = RoutingInfo()
self.edge_routing_info1 = PartitionRoutingInfo(key=2 << 11,
mask=DEFAULT_MASK,
edge=self.edge)
self.routing_info.add_partition_info(self.edge_routing_info1)
# create machine
self.machine = VirtualMachine(10, 10, False)
self.routing = BasicDijkstraRouting()
self.routing.route(machine=self.machine,
placements=self.placements,
machine_graph=self.graph,
routing_info_allocation=self.routing_info)
def _do_test(self, placer):
machine = VirtualMachine(width=8, height=8)
graph = MachineGraph("Test")
vertices = [
SimpleMachineVertex(ResourceContainer(), label="v{}".format(i))
for i in range(100)
]
for vertex in vertices:
graph.add_vertex(vertex)
same_vertices = [
SimpleMachineVertex(ResourceContainer(), label="same{}".format(i))
for i in range(10)
]
random.seed(12345)
for vertex in same_vertices:
graph.add_vertex(vertex)
for i in range(0, random.randint(1, 5)):
vertex.add_constraint(
SameChipAsConstraint(vertices[random.randint(0, 99)]))
placements = placer(graph, machine)
for same in same_vertices:
print("{0.vertex.label}, {0.x}, {0.y}, {0.p}: {1}".format(
placements.get_placement_of_vertex(same), [
"{0.vertex.label}, {0.x}, {0.y}, {0.p}".format(
placements.get_placement_of_vertex(constraint.vertex))
for constraint in same.constraints
]))
placement = placements.get_placement_of_vertex(same)
for constraint in same.constraints:
if isinstance(constraint, SameChipAsConstraint):
other_placement = placements.get_placement_of_vertex(
constraint.vertex)
self.assert_(
other_placement.x == placement.x
and other_placement.y == placement.y,
"Vertex was not placed on the same chip as requested")
def test_1_chip_no_pre_allocated_too_much_sdram(self):
machine = VirtualMachine(width=8, height=8)
graph = ApplicationGraph("Test")
partitioner = PartitionAndPlacePartitioner()
eight_meg = 8 * 1024 * 1024
# add graph vertices which reside on 0,0
for _ in range(0, 13):
graph.add_vertex(
SimpleTestVertex(constraints=[ChipAndCoreConstraint(x=0, y=0)],
n_atoms=1,
fixed_sdram_value=eight_meg))
# add pre-allocated resources for cores on 0,0
pre_allocated_res = PreAllocatedResourceContainer()
# run partitioner that should go boom
try:
partitioner(graph, machine, pre_allocated_res)
except Exception:
raise Exception("should have blown up here")
def test_local_verts_go_to_local_lpgs(self):
machine = VirtualMachine(width=12, height=12, with_wrap_arounds=True)
graph = MachineGraph("Test")
default_params = {
'use_prefix': False,
'key_prefix': None,
'prefix_type': None,
'message_type': EIEIOType.KEY_32_BIT,
'right_shift': 0,
'payload_as_time_stamps': True,
'use_payload_prefix': True,
'payload_prefix': None,
'payload_right_shift': 0,
'number_of_packets_sent_per_time_step': 0,
'hostname': None,
'port': None,
'strip_sdp': None,
'board_address': None,
'tag': None,
'label': "test"
}
# data stores needed by algorithm
live_packet_gatherers = dict()
extended = dict(default_params)
extended.update({'partition_id': "EVENTS"})
default_params_holder = LivePacketGatherParameters(**extended)
live_packet_gatherers[default_params_holder] = list()
live_packet_gatherers_to_vertex_mapping = dict()
live_packet_gatherers_to_vertex_mapping[default_params_holder] = dict()
placements = Placements()
# add LPG's (1 for each Ethernet connected chip)
for chip in machine.ethernet_connected_chips:
vertex = LivePacketGatherMachineVertex(**default_params)
graph.add_vertex(vertex)
placements.add_placement(
Placement(x=chip.x, y=chip.y, p=2, vertex=vertex))
live_packet_gatherers_to_vertex_mapping[default_params_holder][
chip.x, chip.y] = vertex
# tracker of wirings
verts_expected = defaultdict(list)
positions = list()
positions.append([0, 0, 0, 0])
positions.append([4, 4, 0, 0])
positions.append([1, 1, 0, 0])
positions.append([2, 2, 0, 0])
positions.append([8, 4, 8, 4])
positions.append([11, 4, 8, 4])
positions.append([4, 11, 4, 8])
positions.append([4, 8, 4, 8])
positions.append([0, 11, 8, 4])
positions.append([11, 11, 4, 8])
positions.append([8, 8, 4, 8])
positions.append([4, 0, 0, 0])
positions.append([7, 7, 0, 0])
# add graph vertices which reside on areas of the machine to ensure
# spread over boards.
for x, y, eth_x, eth_y in positions:
vertex = SimpleMachineVertex(resources=ResourceContainer())
graph.add_vertex(vertex)
live_packet_gatherers[default_params_holder].append(vertex)
verts_expected[eth_x, eth_y].append(vertex)
placements.add_placement(Placement(x=x, y=y, p=5, vertex=vertex))
# run edge inserter that should go boom
edge_inserter = InsertEdgesToLivePacketGatherers()
edge_inserter(live_packet_gatherer_parameters=live_packet_gatherers,
placements=placements,
live_packet_gatherers_to_vertex_mapping=(
live_packet_gatherers_to_vertex_mapping),
machine=machine,
machine_graph=graph,
application_graph=None,
graph_mapper=None)
# verify edges are in the right place
for chip in machine.ethernet_connected_chips:
edges = graph.get_edges_ending_at_vertex(
live_packet_gatherers_to_vertex_mapping[default_params_holder][
chip.x, chip.y])
for edge in edges:
self.assertIn(edge.pre_vertex, verts_expected[chip.x, chip.y])
def test_added_pre_res(self):
machine = VirtualMachine(width=12, height=12, with_wrap_arounds=True)
default_params = {
'use_prefix': False,
'key_prefix': None,
'prefix_type': None,
'message_type': EIEIOType.KEY_32_BIT,
'right_shift': 0,
'payload_as_time_stamps': True,
'use_payload_prefix': True,
'payload_prefix': None,
'payload_right_shift': 0,
'number_of_packets_sent_per_time_step': 0,
'hostname': None,
'port': None,
'strip_sdp': None,
'board_address': None,
'tag': None,
'label': "test"
}
# data stores needed by algorithm
live_packet_gatherers = dict()
extended = dict(default_params)
extended.update({'partition_id': "EVENTS"})
default_params_holder = LivePacketGatherParameters(**extended)
live_packet_gatherers[default_params_holder] = list()
# create pre res
sdram_requirements = {
machine.get_chip_at(2, 2): 30000,
machine.get_chip_at(7, 7): 50000
}
core_requirements = {machine.get_chip_at(3, 3): 2}
sdrams = list()
cores = list()
for chip in sdram_requirements:
sdrams.append(
SpecificChipSDRAMResource(chip, sdram_requirements[chip]))
for chip in core_requirements:
cores.append(CoreResource(chip, core_requirements[chip]))
pre_pre_res = PreAllocatedResourceContainer(
core_resources=cores, specific_sdram_usage=sdrams)
# run pre allocator
pre_alloc = PreAllocateResourcesForLivePacketGatherers()
pre_res = pre_alloc(
live_packet_gatherer_parameters=live_packet_gatherers,
machine=machine,
pre_allocated_resources=pre_pre_res)
locs = list()
locs.append((0, 0))
locs.append((4, 8))
locs.append((8, 4))
locs.append((2, 2))
locs.append((7, 7))
# verify sdram
sdrams = pre_res.specific_sdram_usage
for sdram in sdrams:
locs.remove((sdram.chip.x, sdram.chip.y))
if sdram.sdram_usage != \
LivePacketGatherMachineVertex.get_sdram_usage():
self.assertIn(sdram.chip.x, (2, 7))
self.assertIn(sdram.chip.y, (2, 7))
self.assertEqual(sdram.chip.x, sdram.chip.y)
if sdram.chip.x == 2 and sdram.chip.y == 2:
self.assertEqual(sdram.sdram_usage, 30000)
elif sdram.chip.x == 7 and sdram.chip.y == 7:
self.assertEqual(sdram.sdram_usage, 50000)
self.assertEqual(len(locs), 0)
locs = list()
locs.append((0, 0))
locs.append((4, 8))
locs.append((8, 4))
locs.append((3, 3))
# verify cores
cores = pre_res.core_resources
for core in cores:
locs.remove((core.chip.x, core.chip.y))
if core.n_cores != 1:
self.assertEqual(core.chip.x, 3)
self.assertEqual(core.chip.y, 3)
self.assertEqual(core.n_cores, 2)
self.assertEqual(len(locs), 0)
# verify specific cores
self.assertEqual(len(pre_res.specific_core_resources), 0)
def test_one_lpg_params_and_3_specific(self):
machine = VirtualMachine(width=12, height=12, with_wrap_arounds=True)
default_params = {
'use_prefix': False,
'key_prefix': None,
'prefix_type': None,
'message_type': EIEIOType.KEY_32_BIT,
'right_shift': 0,
'payload_as_time_stamps': True,
'use_payload_prefix': True,
'payload_prefix': None,
'payload_right_shift': 0,
'number_of_packets_sent_per_time_step': 0,
'hostname': None,
'port': None,
'strip_sdp': None,
'board_address': None,
'tag': None,
'label': "test"
}
# data stores needed by algorithm
live_packet_gatherers = dict()
extended = dict(default_params)
extended.update({'partition_id': "EVENTS"})
default_params_holder = LivePacketGatherParameters(**extended)
live_packet_gatherers[default_params_holder] = list()
# and special LPG on Ethernet connected chips
index = 1
for chip in machine.ethernet_connected_chips:
extended['label'] = "test{}".format(index)
extended['board_address'] = chip.ip_address
default_params_holder2 = LivePacketGatherParameters(**extended)
live_packet_gatherers[default_params_holder2] = list()
pre_alloc = PreAllocateResourcesForLivePacketGatherers()
pre_res = pre_alloc(
live_packet_gatherer_parameters=live_packet_gatherers,
machine=machine)
locs = list()
locs.append((0, 0))
locs.append((4, 8))
locs.append((8, 4))
# verify sdram
sdrams = pre_res.specific_sdram_usage
for sdram in sdrams:
locs.remove((sdram.chip.x, sdram.chip.y))
self.assertEqual(
sdram.sdram_usage,
LivePacketGatherMachineVertex.get_sdram_usage() * 2)
self.assertEqual(len(locs), 0)
locs = dict()
locs[(0, 0)] = 0
locs[(4, 8)] = 0
locs[(8, 4)] = 0
# verify cores
cores = pre_res.core_resources
for core in cores:
locs[(core.chip.x, core.chip.y)] += core.n_cores
for (x, y) in [(0, 0), (4, 8), (8, 4)]:
self.assertEqual(locs[x, y], 2)
# verify specific cores
self.assertEqual(len(pre_res.specific_core_resources), 0)