def _build_options(options): """Build tfprof.OptionsProto. Args: options: A dictionary of options. Returns: tfprof.OptionsProto. """ opts = tfprof_options_pb2.OptionsProto() opts.max_depth = options.get('max_depth', 10) opts.min_bytes = options.get('min_bytes', 0) opts.min_peak_bytes = options.get('min_peak_bytes', 0) opts.min_residual_bytes = options.get('min_residual_bytes', 0) opts.min_output_bytes = options.get('min_output_bytes', 0) opts.min_micros = options.get('min_micros', 0) opts.min_accelerator_micros = options.get('min_accelerator_micros', 0) opts.min_cpu_micros = options.get('min_cpu_micros', 0) opts.min_params = options.get('min_params', 0) opts.min_float_ops = options.get('min_float_ops', 0) opts.min_occurrence = options.get('min_occurrence', 0) opts.step = options.get('step', -1) opts.order_by = options.get('order_by', 'name') for p in options.get('account_type_regexes', []): opts.account_type_regexes.append(p) for p in options.get('start_name_regexes', []): opts.start_name_regexes.append(p) for p in options.get('trim_name_regexes', []): opts.trim_name_regexes.append(p) for p in options.get('show_name_regexes', []): opts.show_name_regexes.append(p) for p in options.get('hide_name_regexes', []): opts.hide_name_regexes.append(p) opts.account_displayed_op_only = options.get('account_displayed_op_only', False) for p in options.get('select', []): opts.select.append(p) opts.output = options.get('output', 'stdout') opts.dump_to_file = options.get('dump_to_file', '') return opts
def testPrintModelAnalysis(self): opts = tfprof_options_pb2.OptionsProto() opts.max_depth = TEST_OPTIONS['max_depth'] opts.min_bytes = TEST_OPTIONS['min_bytes'] opts.min_micros = TEST_OPTIONS['min_micros'] opts.min_params = TEST_OPTIONS['min_params'] opts.min_float_ops = TEST_OPTIONS['min_float_ops'] opts.order_by = TEST_OPTIONS['order_by'] opts.step = -1 for p in TEST_OPTIONS['account_type_regexes']: opts.account_type_regexes.append(p) for p in TEST_OPTIONS['start_name_regexes']: opts.start_name_regexes.append(p) for p in TEST_OPTIONS['trim_name_regexes']: opts.trim_name_regexes.append(p) for p in TEST_OPTIONS['show_name_regexes']: opts.show_name_regexes.append(p) for p in TEST_OPTIONS['hide_name_regexes']: opts.hide_name_regexes.append(p) opts.account_displayed_op_only = TEST_OPTIONS[ 'account_displayed_op_only'] for p in TEST_OPTIONS['select']: opts.select.append(p) opts.output = TEST_OPTIONS['output'] with session.Session() as sess, ops.device('/cpu:0'): _ = self._BuildSmallModel() tfprof_pb = tfprof_output_pb2.GraphNodeProto() tfprof_pb.ParseFromString( print_mdl.PrintModelAnalysis( sess.graph.as_graph_def( add_shapes=True).SerializeToString(), b'', b'', b'scope', opts.SerializeToString())) expected_pb = tfprof_output_pb2.GraphNodeProto() text_format.Merge( r"""name: "_TFProfRoot" exec_micros: 0 requested_bytes: 0 total_exec_micros: 0 total_requested_bytes: 0 total_parameters: 648 children { name: "Conv2D" exec_micros: 0 requested_bytes: 0 total_exec_micros: 0 total_requested_bytes: 0 total_parameters: 0 float_ops: 0 total_float_ops: 0 input_shapes { key: 0 value { dim { size: 2 } dim { size: 6 } dim { size: 6 } dim { size: 3 } } } input_shapes { key: 1 value { dim { size: 6 } dim { size: 6 } dim { size: 3 } dim { size: 6 } } } accelerator_exec_micros: 0 cpu_exec_micros: 0 total_accelerator_exec_micros: 0 total_cpu_exec_micros: 0 run_count: 0 total_run_count: 0 total_definition_count: 1 } children { name: "DW" exec_micros: 0 requested_bytes: 0 parameters: 648 total_exec_micros: 0 total_requested_bytes: 0 total_parameters: 648 children { name: "DW/Assign" exec_micros: 0 requested_bytes: 0 total_exec_micros: 0 total_requested_bytes: 0 total_parameters: 0 float_ops: 0 total_float_ops: 0 input_shapes { key: 0 value { dim { size: 6 } dim { size: 6 } dim { size: 3 } dim { size: 6 } } } input_shapes { key: 1 value { dim { size: 6 } dim { size: 6 } dim { size: 3 } dim { size: 6 } } } accelerator_exec_micros: 0 cpu_exec_micros: 0 total_accelerator_exec_micros: 0 total_cpu_exec_micros: 0 run_count: 0 total_run_count: 0 total_definition_count: 1 } children { name: "DW/Initializer" exec_micros: 0 requested_bytes: 0 total_exec_micros: 0 total_requested_bytes: 0 total_parameters: 0 children { name: "DW/Initializer/random_normal" exec_micros: 0 requested_bytes: 0 total_exec_micros: 0 total_requested_bytes: 0 total_parameters: 0 children { name: "DW/Initializer/random_normal/RandomStandardNormal" exec_micros: 0 requested_bytes: 0 total_exec_micros: 0 total_requested_bytes: 0 total_parameters: 0 float_ops: 0 total_float_ops: 0 input_shapes { key: 0 value { dim { size: 4 } } } accelerator_exec_micros: 0 cpu_exec_micros: 0 total_accelerator_exec_micros: 0 total_cpu_exec_micros: 0 run_count: 0 total_run_count: 0 total_definition_count: 1 } children { name: "DW/Initializer/random_normal/mean" exec_micros: 0 requested_bytes: 0 total_exec_micros: 0 total_requested_bytes: 0 total_parameters: 0 float_ops: 0 total_float_ops: 0 accelerator_exec_micros: 0 cpu_exec_micros: 0 total_accelerator_exec_micros: 0 total_cpu_exec_micros: 0 run_count: 0 total_run_count: 0 total_definition_count: 1 } children { name: "DW/Initializer/random_normal/mul" exec_micros: 0 requested_bytes: 0 total_exec_micros: 0 total_requested_bytes: 0 total_parameters: 0 float_ops: 0 total_float_ops: 0 input_shapes { key: 0 value { dim { size: 6 } dim { size: 6 } dim { size: 3 } dim { size: 6 } } } input_shapes { key: 1 value { dim { size: 1 } } } accelerator_exec_micros: 0 cpu_exec_micros: 0 total_accelerator_exec_micros: 0 total_cpu_exec_micros: 0 run_count: 0 total_run_count: 0 total_definition_count: 1 } children { name: "DW/Initializer/random_normal/shape" exec_micros: 0 requested_bytes: 0 total_exec_micros: 0 total_requested_bytes: 0 total_parameters: 0 float_ops: 0 total_float_ops: 0 accelerator_exec_micros: 0 cpu_exec_micros: 0 total_accelerator_exec_micros: 0 total_cpu_exec_micros: 0 run_count: 0 total_run_count: 0 total_definition_count: 1 } children { name: "DW/Initializer/random_normal/stddev" exec_micros: 0 requested_bytes: 0 total_exec_micros: 0 total_requested_bytes: 0 total_parameters: 0 float_ops: 0 total_float_ops: 0 accelerator_exec_micros: 0 cpu_exec_micros: 0 total_accelerator_exec_micros: 0 total_cpu_exec_micros: 0 run_count: 0 total_run_count: 0 total_definition_count: 1 } float_ops: 0 total_float_ops: 0 input_shapes { key: 0 value { dim { size: 6 } dim { size: 6 } dim { size: 3 } dim { size: 6 } } } input_shapes { key: 1 value { dim { size: 1 } } } accelerator_exec_micros: 0 cpu_exec_micros: 0 total_accelerator_exec_micros: 0 total_cpu_exec_micros: 0 run_count: 0 total_run_count: 0 total_definition_count: 6 } float_ops: 0 total_float_ops: 0 accelerator_exec_micros: 0 cpu_exec_micros: 0 total_accelerator_exec_micros: 0 total_cpu_exec_micros: 0 run_count: 0 total_run_count: 0 total_definition_count: 7 } children { name: "DW/read" exec_micros: 0 requested_bytes: 0 total_exec_micros: 0 total_requested_bytes: 0 total_parameters: 0 float_ops: 0 total_float_ops: 0 input_shapes { key: 0 value { dim { size: 6 } dim { size: 6 } dim { size: 3 } dim { size: 6 } } } accelerator_exec_micros: 0 cpu_exec_micros: 0 total_accelerator_exec_micros: 0 total_cpu_exec_micros: 0 run_count: 0 total_run_count: 0 total_definition_count: 1 } float_ops: 0 total_float_ops: 0 accelerator_exec_micros: 0 cpu_exec_micros: 0 total_accelerator_exec_micros: 0 total_cpu_exec_micros: 0 run_count: 0 total_run_count: 0 total_definition_count: 10 } children { name: "zeros" exec_micros: 0 requested_bytes: 0 total_exec_micros: 0 total_requested_bytes: 0 total_parameters: 0 float_ops: 0 total_float_ops: 0 accelerator_exec_micros: 0 cpu_exec_micros: 0 total_accelerator_exec_micros: 0 total_cpu_exec_micros: 0 run_count: 0 total_run_count: 0 total_definition_count: 1 } float_ops: 0 total_float_ops: 0 accelerator_exec_micros: 0 cpu_exec_micros: 0 total_accelerator_exec_micros: 0 total_cpu_exec_micros: 0 run_count: 0 total_run_count: 0 total_definition_count: 13""", expected_pb) self.assertEqual(expected_pb, tfprof_pb)