def write_port(data): if globals.twitalu_v01_fixes == False: I2C.write_data(port_expand_A_addr, 'A', data) elif globals.twitalu_v01_fixes == True: # strip the incorrect bits bit0 = 0b00000001 & data bit1 = 0b00000010 & data bit2 = 0b00000100 & data bit3 = 0b00001000 & data # make copies of all bits bit0_copy = bit0 bit1_copy = bit1 bit2_copy = bit2 bit3_copy = bit3 # shift incorrect bits so they sit properly bit0 = bit1_copy >> 1 bit1 = bit0_copy << 1 bit2 = bit3_copy >> 1 bit3 = bit2_copy << 1 # reconstruct data data = data & 0xF0 data = data | bit0 data = data | bit1 data = data | bit2 data = data | bit3 # write corrected data to port expander I2C.write_data(port_expand_A_addr, 'A', data)
def set_zero_buffer(enable): old_value = I2C.read_data(port_expand_A_addr, 'B') # read in the previous control pins if enable == 1: mask = 0b11111110 # set zero buffer signal low new_value = old_value & mask # AND elif enable == 0: mask = 0b00000011 # set zero buffer signal high new_value = old_value | mask # OR I2C.write_data(port_expand_A_addr, 'B', new_value) # write to Port B
def set_C_IN(C_IN): old_value = I2C.read_data(port_expand_ALU_addr, 'B') # read in the previous Port B if C_IN == 0: mask = 0b11111110 new_value = old_value & mask # AND, unset elif C_IN == 1: mask = 0b00000001 new_value = old_value | mask # OR, set I2C.write_data(port_expand_ALU_addr, 'B', new_value)
def set_OR(enable): old_control_bus = I2C.read_data(port_expand_ALU_addr, 'A') # read the previous Port A if enable == 1: mask = 0b11111011 # set OR signal low new_control_bus = old_control_bus & mask # AND elif enable == 0: mask = 0b00011111 # set OR signal high new_control_bus = old_control_bus | mask # OR I2C.write_data(port_expand_ALU_addr, 'A', new_control_bus) # activate OR ouput
def clock_data(): # drive clock high old_value = I2C.read_data(port_expand_A_addr, 'B') # read in the previous control pins clock_high_mask = 0b00000100 clock_high_value = old_value | clock_high_mask # OR, set clock high I2C.write_data(port_expand_A_addr, 'B', clock_high_value) # drive clock low old_value = I2C.read_data(port_expand_A_addr, 'B') # read in the previous control pins clock_low_mask = 0b11111011 clock_low_value = old_value & clock_low_mask # AND, set clock low I2C.write_data(port_expand_A_addr, 'B', clock_low_value)
def clear_port(): I2C.write_data(port_expand_A_addr, 'A', 0x00) # write all zeros
def init(): I2C.set_IO_DIR(port_expand_A_addr, 'A', 0x00) # set port as output I2C.write_data(port_expand_A_addr, 'A', 0x00) # write all zeros I2C.set_IO_DIR(port_expand_A_addr, 'B', 0x00) # set port as output I2C.write_data(port_expand_A_addr, 'B', 0b00000011) # disable both buffers, drive clock low clear_register()
def unset_all(): I2C.write_data(port_expand_ALU_addr, 'A', 0xFF) # write all ones to Port A
def reset_ALU(): I2C.write_data(port_expand_ALU_addr, 'A', 0xFF) # write all ones to Port A I2C.write_data(port_expand_ALU_addr, 'B', 0x00000000) # clear C_IN on Port B
def write_port(data): I2C.write_data(port_expand_B_addr, 'A', data)
def set_ADL_bus(enable): if enable == 1: I2C.write_data(port_expand_ADD_addr, 'B', 0b00000001) # enable ADL buffer elif enable == 0: I2C.write_data(port_expand_ADD_addr, 'B', 0b00000011) # disable ADL buffer
def read_register(): I2C.write_data(port_expand_ADD_addr, 'B', 0b00000010) # enable ADD OUT buffer data = I2C.read_data(port_expand_ADD_addr, 'A') # I2C.write_data(port_expand_ADD_addr, 'B', 0b00000011) # disable ADD OUT buffer return data
def clock_data(): I2C.write_data(port_expand_ADD_addr, 'B', 0b00000111) # generate rising clock edge I2C.write_data(port_expand_ADD_addr, 'B', 0b00000011) # drive clock signal low
def init(): I2C.set_IO_DIR(port_expand_ADD_addr, 'A', 0xFF) # set port A as input I2C.set_IO_POL(port_expand_ADD_addr, 'A', 0x00) # set port A logic to non-inverting I2C.set_IO_DIR(port_expand_ADD_addr, 'B', 0x00) # set port B as output I2C.write_data(port_expand_ADD_addr, 'B', 0b00000011) # disable both buffers, drive clock low
