Example #1
0
def executePrintReg(command):  #list of strings in command

    regbase = command[1].lower()

    if regbase != 'x' and regbase != 'd':
        print 'Invalid print reg command'
        return
    reginfo = command[2].lower()

    if len(reginfo) != 2:
        print 'Invalid print reg command'
        return
    regtype = reginfo[0]

    if regtype != 'w' and regtype != 'x':
        print 'Invalid print reg command'
        return
    regnum = int(reginfo[1])

    if regnum < 0 or regnum > 31:
        print 'Invalid print reg command'
        return

    if regtype == 'x':
        binary = mem.regFile[regnum]
        if regbase == 'd':
            if binary[0] == '0':
                print 'Register value: ' + str(int(binary, 2))
            else:
                neg_binary = utilFunc.twosComplement(binary, 64)
                print 'Register value: -' + str(int(neg_binary, 2))
        else:
            print 'Register value: ' + utilFunc.binaryToHexStr(binary)
    elif regtype == 'w':
        binary = mem.regFile[regnum][32:64]
        if regbase == 'd':
            if binary[0] == '0':
                print 'Register value: ' + str(int(binary, 2))
            else:
                neg_binary = utilFunc.twosComplement(binary, 32)
                print 'Register value: -' + str(int(neg_binary, 2))
        else:
            print 'Register value: ' + utilFunc.binaryToHexStr(binary)
Example #2
0
def executePrintReg(command): #list of strings in command
    
    regbase=command[1].lower()
    
    if regbase!='x' and regbase!='d':
        print 'Invalid print reg command'
        return
    reginfo=command[2].lower()
    
    if len(reginfo)!=2:
        print 'Invalid print reg command'
        return
    regtype=reginfo[0]
    
    if regtype!='w' and regtype!='x':
        print 'Invalid print reg command'
        return
    regnum=int(reginfo[1])
    
    if regnum<0 or regnum>31:
        print 'Invalid print reg command'
        return
    
    if regtype == 'x':
        binary=mem.regFile[regnum]
        if regbase == 'd':            
            if binary[0]=='0':
                print 'Register value: ' + str(int(binary,2))
            else:
                neg_binary=utilFunc.twosComplement(binary, 64)
                print 'Register value: -' + str(int(neg_binary,2))
        else:
            print 'Register value: ' + utilFunc.binaryToHexStr(binary)
    elif regtype == 'w':
        binary=mem.regFile[regnum][32:64]
        if regbase == 'd':            
            if binary[0]=='0':
                print 'Register value: ' + str(int(binary,2))
            else:
                neg_binary=utilFunc.twosComplement(binary, 32)
                print 'Register value: -' + str(int(neg_binary,2))
        else:
            print 'Register value: ' + utilFunc.binaryToHexStr(binary)
Example #3
0
def mov_imm(binary, instr, inverted, N):
    rdKey = utilFunc.getRegKeyByStringKey(binary[27:32])
    hw = binary[9:11]
    pos = utilFunc.uInt(hw + '0000')

    imm16 = binary[11:27]
    result = (imm16 + '0' * pos).zfill(N)
    if (inverted == '1'):
        result = utilFunc.negate(result)
    instr = instr + str(rdKey) + ", #" + utilFunc.binaryToHexStr(result)
    utilFunc.finalize(rdKey, result.zfill(const.REG_SIZE), instr, '0')
def mov_imm(binary, instr, inverted, N):
    rdKey = utilFunc.getRegKeyByStringKey(binary[27:32])
    hw = binary[9:11]
    pos = utilFunc.uInt(hw + "0000")

    imm16 = binary[11:27]
    result = (imm16 + "0" * pos).zfill(N)
    if inverted == "1":
        result = utilFunc.negate(result)
    instr = instr + str(rdKey) + ", #" + utilFunc.binaryToHexStr(result)
    utilFunc.finalize(rdKey, result.zfill(const.REG_SIZE), instr, "0")
def execBR(binary):
    inst = 'BR X'
    rnKey=binary[22:27]
    address_binary=utilFunc.getRegValueByStringkey(rnKey, '0')
    regnum=utilFunc.uInt(rnKey)
    inst+=str(regnum)
    hexstr = utilFunc.binaryToHexStr(address_binary)
    if not armdebug.checkIfValidBreakPoint(hexstr):
        utilFunc.finalize_simple('Instruction aborted. Invalid instruction address in register.')
        return
    utilFunc.branchToAddress(int(hexstr,16))
    utilFunc.finalize_simple(inst)
Example #6
0
def execBR(binary):
    inst = 'BR X'
    rnKey = binary[22:27]
    address_binary = utilFunc.getRegValueByStringkey(rnKey, '0')
    regnum = utilFunc.uInt(rnKey)
    inst += str(regnum)
    hexstr = utilFunc.binaryToHexStr(address_binary)
    if not armdebug.checkIfValidBreakPoint(hexstr):
        utilFunc.finalize_simple(
            'Instruction aborted. Invalid instruction address in register.')
        return
    utilFunc.branchToAddress(int(hexstr, 16))
    utilFunc.finalize_simple(inst)
Example #7
0
def mov_bmi(binary, N):
    inst = 'MOV '
    rdKey = utilFunc.getRegKeyByStringKey(binary[27:32])
    if (N == 32):
        r = 'w'
    else:
        r = 'x'
    inst += r + str(rdKey)

    immr = binary[10:16]
    imms = binary[16:22]
    immN = binary[9]

    imm, temp = utilFunc.decodeBitMasks(immN, imms, immr, N)
    inst += ', #' + utilFunc.binaryToHexStr(imm)
    result = utilFunc.logical_or('0' * N, imm).zfill(const.REG_SIZE)
    utilFunc.finalize(rdKey, result, inst, '1')
def mov_bmi(binary, N):
    inst = "MOV "
    rdKey = utilFunc.getRegKeyByStringKey(binary[27:32])
    if N == 32:
        r = "w"
    else:
        r = "x"
    inst += r + str(rdKey)

    immr = binary[10:16]
    imms = binary[16:22]
    immN = binary[9]

    imm, temp = utilFunc.decodeBitMasks(immN, imms, immr, N)
    inst += ", #" + utilFunc.binaryToHexStr(imm)
    result = utilFunc.logical_or("0" * N, imm).zfill(const.REG_SIZE)
    utilFunc.finalize(rdKey, result, inst, "1")
def op_i(binary, N, instr, sub_op, setFlags):
    rdKey = utilFunc.getRegKeyByStringKey(binary[27:32])
    rnKey = utilFunc.getRegKeyByStringKey(binary[22:27])
    rnVal = utilFunc.getRegValueByStringkey(binary[22:27],'1')
    if(N == 32):
        rnVal = rnVal[32:64]
        r = 'w'
    elif(N == 64):
        r = 'x'
    imm12 = binary[10:22]
    shiftType = binary[8:10]
    instr += " " + r + str(rdKey) + ", " + r + str(rnKey) + ", #" + utilFunc.binaryToHexStr(imm12) + ", LSL"
    if shiftType == "00":
        imm12 = imm12.zfill(N)
        instr = instr + " #0"
    elif shiftType == "01":
        imm12 = (imm12 + '0' * 12).zfill(N)
        instr = instr + " #12"
        
    to_store, isSp = utilFunc.addSub(rdKey, rnVal, imm12, sub_op, N, setFlags)    
    utilFunc.finalize(rdKey, to_store.zfill(const.REG_SIZE), instr, isSp)
Example #10
0
def op_i(binary, N, instr, sub_op, setFlags):
    rdKey = utilFunc.getRegKeyByStringKey(binary[27:32])
    rnKey = utilFunc.getRegKeyByStringKey(binary[22:27])
    rnVal = utilFunc.getRegValueByStringkey(binary[22:27], '1')
    if (N == 32):
        rnVal = rnVal[32:64]
        r = 'w'
    elif (N == 64):
        r = 'x'
    imm12 = binary[10:22]
    shiftType = binary[8:10]
    instr += " " + r + str(rdKey) + ", " + r + str(
        rnKey) + ", #" + utilFunc.binaryToHexStr(imm12) + ", LSL"
    if shiftType == "00":
        imm12 = imm12.zfill(N)
        instr = instr + " #0"
    elif shiftType == "01":
        imm12 = (imm12 + '0' * 12).zfill(N)
        instr = instr + " #12"

    to_store, isSp = utilFunc.addSub(rdKey, rnVal, imm12, sub_op, N, setFlags)
    utilFunc.finalize(rdKey, to_store.zfill(const.REG_SIZE), instr, isSp)
Example #11
0
def executeRegs():
    i = 0
    for x in mem.regFile:
        print 'Register' + str(i) + ': ' + utilFunc.binaryToHexStr(x)
        i = i + 1
Example #12
0
def executeRegs():
    i=0;
    for x in mem.regFile:
        print 'Register'+str(i)+': '+utilFunc.binaryToHexStr(x)
        i=i+1