def getFields_i(binary): rdKey = utilFunc.getRegKeyByStringKey(binary[27:32]) rnKey = utilFunc.getRegKeyByStringKey(binary[22:27]) immr = binary[10:16] imms = binary[16:22] rnVal = utilFunc.getRegValueByStringkey(binary[22:27], '0') return rdKey, rnKey, rnVal, immr, imms
def getFields_r(binary): rdKey = utilFunc.getRegKeyByStringKey(binary[27:32]) rnKey = utilFunc.getRegKeyByStringKey(binary[22:27]) rmKey = utilFunc.getRegKeyByStringKey(binary[11:16]) rnVal = utilFunc.getRegValueByStringkey(binary[22:27], '0') rmVal = utilFunc.getRegValueByStringkey(binary[11:16], '0') return rdKey, rnKey, rmKey, rnVal, rmVal
def op_er(binary, N, instr, sub_op, setFlags): rdKey = utilFunc.getRegKeyByStringKey(binary[27:32]) rnKey = utilFunc.getRegKeyByStringKey(binary[22:27]) rmkey = utilFunc.getRegKeyByStringKey(binary[11:16]) option = binary[16:19] imm3 = binary[19:22] shift = int(imm3, 2) rnVal = utilFunc.getRegValueByStringkey(binary[22:27], '1') rmVal = utilFunc.getRegValueByStringkey(binary[11:16], '0') if(N == 32): rnVal = rnVal[32:64] rmVal = rmVal[32:64] r = 'w' elif(N == 64): r = 'x' if(option[1:3] == '11'): rmToPrint = 'x' else: rmToPrint = 'w' instr += " " + r + str(rdKey) + ", " + r + str(rnKey) + ", " + rmToPrint + str(rmkey) + ", " op2, instr = utilFunc.extendReg(rmVal, shift, option, instr, N) instr += " #" + str(shift) to_store, isSp = utilFunc.addSub(rdKey, rnVal, op2, sub_op, N, setFlags) utilFunc.finalize(rdKey, to_store.zfill(const.REG_SIZE), instr, isSp)
def execAnd_sr64(binary): inst = 'AND ' rdKey = utilFunc.getRegKeyByStringKey(binary[27:32]) rnKey = utilFunc.getRegKeyByStringKey(binary[22:27]) rmKey = utilFunc.getRegKeyByStringKey(binary[11:16]) inst += 'x' + str(rdKey) + ', x' + str(rnKey) + ', x' + str(rmKey) + ', ' rnValue = utilFunc.getRegValueByStringkey(binary[22:27], '0') immKey = binary[16:22] immvalue = int(immKey, 2) # amount rmValue = utilFunc.getRegValueByStringkey(binary[11:16], '0') shifttype = binary[8:10] temp = '' if shifttype == "00": temp = utilFunc.lsl(rmValue[0:64], immvalue) inst += 'LSL' elif shifttype == "01": temp = utilFunc.lsr(rmValue[0:64], immvalue) inst += 'LSR' elif shifttype == "10": temp = utilFunc.asr(rmValue[0:64], immvalue) inst += 'ASR' else: temp = utilFunc.ror(rmValue[0:64], immvalue) inst += 'ROR' inst += ' #' + str(immvalue) to_store = utilFunc.logical_and(temp, rnValue[0:64]).zfill(const.REG_SIZE) utilFunc.finalize(rdKey, to_store, inst, '0')
def op_er(binary, N, instr, sub_op, setFlags): rdKey = utilFunc.getRegKeyByStringKey(binary[27:32]) rnKey = utilFunc.getRegKeyByStringKey(binary[22:27]) rmkey = utilFunc.getRegKeyByStringKey(binary[11:16]) option = binary[16:19] imm3 = binary[19:22] shift = int(imm3, 2) rnVal = utilFunc.getRegValueByStringkey(binary[22:27], '1') rmVal = utilFunc.getRegValueByStringkey(binary[11:16], '0') if (N == 32): rnVal = rnVal[32:64] rmVal = rmVal[32:64] r = 'w' elif (N == 64): r = 'x' if (option[1:3] == '11'): rmToPrint = 'x' else: rmToPrint = 'w' instr += " " + r + str(rdKey) + ", " + r + str( rnKey) + ", " + rmToPrint + str(rmkey) + ", " op2, instr = utilFunc.extendReg(rmVal, shift, option, instr, N) instr += " #" + str(shift) to_store, isSp = utilFunc.addSub(rdKey, rnVal, op2, sub_op, N, setFlags) utilFunc.finalize(rdKey, to_store.zfill(const.REG_SIZE), instr, isSp)
def mov_reg(binary, N): rdKey = utilFunc.getRegKeyByStringKey(binary[27:32]) rmKey = utilFunc.getRegKeyByStringKey(binary[11:16]) rmVal = utilFunc.getRegValueByStringkey(binary[11:16], '0') if (N == 32): rmVal = rmVal[32:64] r = 'w' elif (N == 64): r = 'x' instr = "MOV " + r + str(rdKey) + ", " + r + str(rmKey) utilFunc.finalize(rdKey, rmVal.zfill(const.REG_SIZE), instr, '0')
def mov_reg(binary, N): rdKey = utilFunc.getRegKeyByStringKey(binary[27:32]) rmKey = utilFunc.getRegKeyByStringKey(binary[11:16]) rmVal = utilFunc.getRegValueByStringkey(binary[11:16], "0") if N == 32: rmVal = rmVal[32:64] r = "w" elif N == 64: r = "x" instr = "MOV " + r + str(rdKey) + ", " + r + str(rmKey) utilFunc.finalize(rdKey, rmVal.zfill(const.REG_SIZE), instr, "0")
def helper_reg_prei(binary, instr): rtKey = utilFunc.getRegKeyByStringKey(binary[27:32]) rnKey = utilFunc.getRegKeyByStringKey(binary[22:27]) imm9 = binary[11:20] opc = binary[8:10] size = binary[0:2] wback = True postIndex = False scale = utilFunc.uInt(size) offset = utilFunc.signExtend(imm9, 64) offset = utilFunc.sInt(offset, 64) instr += str(rtKey) + ", [x" + str(rnKey) + ", #" + str(offset) + "]!" helper_all(binary, opc, size, wback, postIndex, offset, rtKey, rnKey, scale, instr)
def helper_reg_unsignedOffset(binary, instr): rtKey = utilFunc.getRegKeyByStringKey(binary[27:32]) rnKey = utilFunc.getRegKeyByStringKey(binary[22:27]) imm12 = binary[10:22] opc = binary[8:10] size = binary[0:2] wback = False postIndex = False scale = utilFunc.uInt(size) offset = utilFunc.lsl(utilFunc.zeroExtend(imm12, 64), scale) offset = utilFunc.sInt(offset, 64) instr += str(rtKey) + ", [x" + str(rnKey) + ", #" + str(offset) + "]" helper_all(binary, opc, size, wback, postIndex, offset, rtKey, rnKey, scale, instr)
def helper_l(binary, instr): rtKey = utilFunc.getRegKeyByStringKey(binary[27:32]) imm19 = binary[8:27] opc = binary[0:2] signed = False if (opc == '00'): size = 4 elif (opc == '01'): size = 8 elif (opc == '10'): size = 4 signed = True offset = utilFunc.signExtend(imm19 + '00', 64) offset = utilFunc.sInt(offset, 64) address = armdebug.getPC() + offset dataSize = size * 8 data = utilFunc.fetchFromMemory(address, dataSize) if (data == const.TRAP): utilFunc.finalize_simple(instr) print "HEY!!! There seems to be a problem - memory location can not be accessed" print "Moving ahead without executing the instruction" return if (signed): data = utilFunc.signExtend(data, 64) instr += str(rtKey) + ", #" + str(offset) utilFunc.finalize(rtKey, data.zfill(64), instr, '0')
def helper_l(binary, instr): rtKey = utilFunc.getRegKeyByStringKey(binary[27:32]) imm19 = binary[8:27] opc = binary[0:2] signed = False if(opc == '00'): size = 4 elif(opc == '01'): size = 8 elif(opc == '10'): size = 4 signed = True offset = utilFunc.signExtend(imm19 + '00', 64) offset = utilFunc.sInt(offset, 64) address = armdebug.getPC() + offset dataSize = size * 8 data = utilFunc.fetchFromMemory(address, dataSize) if(data == const.TRAP): utilFunc.finalize_simple(instr) print "HEY!!! There seems to be a problem - memory location can not be accessed" print "Moving ahead without executing the instruction" return if(signed): data = utilFunc.signExtend(data, 64) instr += str(rtKey) + ", #" + str(offset) utilFunc.finalize(rtKey, data.zfill(64), instr, '0')
def helper_reg(binary, instr): rtKey = utilFunc.getRegKeyByStringKey(binary[27:32]) rnKey = utilFunc.getRegKeyByStringKey(binary[22:27]) rmKey = utilFunc.getRegKeyByStringKey(binary[11:16]) rnVal = utilFunc.getRegValueByStringkey(binary[22:27], '1') rmVal = utilFunc.getRegValueByStringkey(binary[11:16], '0') s = binary[19] option = binary[16:19] opc = binary[8:10] size = binary[0:2] wback = False postIndex = False scale = utilFunc.uInt(size) if s == '1': shift = scale else: shift = 0 if (option[1:3] == '10'): rmToPrint = 'w' elif (option[1:3] == '11'): rmToPrint = 'x' instr += str(rtKey) + ", [x" + str(rnKey) + ", " + rmToPrint + str( rmKey) + ", " offset, instr = utilFunc.extendReg(rmVal, shift, option, instr, 64) offset = utilFunc.sInt(offset, 64) instr += ' #' if size == '10': if s == '0': instr += '0' else: instr += '2' if size == '11': if s == '0': instr += '0' else: instr += '3' instr += ']' helper_all(binary, opc, size, wback, postIndex, offset, rtKey, rnKey, scale, instr)
def helper_reg(binary, instr): rtKey = utilFunc.getRegKeyByStringKey(binary[27:32]) rnKey = utilFunc.getRegKeyByStringKey(binary[22:27]) rmKey = utilFunc.getRegKeyByStringKey(binary[11:16]) rnVal = utilFunc.getRegValueByStringkey(binary[22:27], '1') rmVal = utilFunc.getRegValueByStringkey(binary[11:16], '0') s = binary[19] option = binary[16:19] opc = binary[8:10] size = binary[0:2] wback = False postIndex = False scale = utilFunc.uInt(size) if s == '1': shift = scale else: shift = 0 if(option[1:3] == '10'): rmToPrint = 'w' elif(option[1:3] == '11'): rmToPrint = 'x' instr += str(rtKey) + ", [x" + str(rnKey) + ", " + rmToPrint + str(rmKey) + ", " offset, instr = utilFunc.extendReg(rmVal, shift, option, instr, 64) offset = utilFunc.sInt(offset, 64) instr += ' #' if size == '10': if s == '0': instr += '0' else: instr += '2' if size == '11': if s == '0': instr += '0' else: instr += '3' instr += ']' helper_all(binary, opc, size, wback, postIndex, offset, rtKey, rnKey, scale, instr)
def mov_imm(binary, instr, inverted, N): rdKey = utilFunc.getRegKeyByStringKey(binary[27:32]) hw = binary[9:11] pos = utilFunc.uInt(hw + '0000') imm16 = binary[11:27] result = (imm16 + '0' * pos).zfill(N) if (inverted == '1'): result = utilFunc.negate(result) instr = instr + str(rdKey) + ", #" + utilFunc.binaryToHexStr(result) utilFunc.finalize(rdKey, result.zfill(const.REG_SIZE), instr, '0')
def mov_imm(binary, instr, inverted, N): rdKey = utilFunc.getRegKeyByStringKey(binary[27:32]) hw = binary[9:11] pos = utilFunc.uInt(hw + "0000") imm16 = binary[11:27] result = (imm16 + "0" * pos).zfill(N) if inverted == "1": result = utilFunc.negate(result) instr = instr + str(rdKey) + ", #" + utilFunc.binaryToHexStr(result) utilFunc.finalize(rdKey, result.zfill(const.REG_SIZE), instr, "0")
def op_i(binary, N): inst = 'AND ' rdKey = utilFunc.getRegKeyByStringKey(binary[27:32]) rnKey = utilFunc.getRegKeyByStringKey(binary[22:27]) rnValue = utilFunc.getRegValueByStringkey(binary[22:27], '0') if (N == 32): r = 'w' rnValue = rnValue[32:64] else: r = 'x' inst += r + str(rdKey) + ', ' + r + str(rnKey) immr = binary[10:16] imms = binary[16:22] immN = binary[9] imm, temp = utilFunc.decodeBitMasks(immN, imms, immr, N) inst += ', #' + str(int(imm, 2)) result = utilFunc.logical_and(rnValue, imm).zfill(const.REG_SIZE) utilFunc.finalize(rdKey, result, inst, '1')
def op_i(binary, N, instr, sub_op, setFlags): rdKey = utilFunc.getRegKeyByStringKey(binary[27:32]) rnKey = utilFunc.getRegKeyByStringKey(binary[22:27]) rnVal = utilFunc.getRegValueByStringkey(binary[22:27],'1') if(N == 32): rnVal = rnVal[32:64] r = 'w' elif(N == 64): r = 'x' imm12 = binary[10:22] shiftType = binary[8:10] instr += " " + r + str(rdKey) + ", " + r + str(rnKey) + ", #" + utilFunc.binaryToHexStr(imm12) + ", LSL" if shiftType == "00": imm12 = imm12.zfill(N) instr = instr + " #0" elif shiftType == "01": imm12 = (imm12 + '0' * 12).zfill(N) instr = instr + " #12" to_store, isSp = utilFunc.addSub(rdKey, rnVal, imm12, sub_op, N, setFlags) utilFunc.finalize(rdKey, to_store.zfill(const.REG_SIZE), instr, isSp)
def op_sr(binary, N, instr, sub_op, setFlags): rdKey = utilFunc.getRegKeyByStringKey(binary[27:32]) rnKey = utilFunc.getRegKeyByStringKey(binary[22:27]) rmkey = utilFunc.getRegKeyByStringKey(binary[11:16]) imm6 = binary[16:22] imm6Val = int(imm6, 2) rnVal = utilFunc.getRegValueByStringkey(binary[22:27], '0') rmVal = utilFunc.getRegValueByStringkey(binary[11:16], '0') if(N == 32): rnVal = rnVal[32:64] rmVal = rmVal[32:64] r = 'w' elif(N == 64): r = 'x' shiftType = binary[8:10] instr += " " + r + str(rdKey) + ", " + r + str(rnKey) + ", " + r + str(rmkey) + ", " op2, instr = fetchOp2_sr(rmVal, shiftType, imm6Val, instr) instr += " #" + str(imm6Val) to_store,isSp = utilFunc.addSub(rdKey, rnVal, op2, sub_op, N, setFlags) #isSp ignored utilFunc.finalize(rdKey, to_store.zfill(const.REG_SIZE), instr, '0')
def op_i(binary, N): inst = 'AND ' rdKey = utilFunc.getRegKeyByStringKey(binary[27:32]) rnKey = utilFunc.getRegKeyByStringKey(binary[22:27]) rnValue = utilFunc.getRegValueByStringkey(binary[22:27], '0') if(N == 32): r = 'w' rnValue = rnValue[32:64] else: r = 'x' inst += r + str(rdKey) + ', ' + r + str(rnKey) immr = binary[10:16] imms = binary[16:22] immN = binary[9] imm, temp = utilFunc.decodeBitMasks(immN, imms, immr, N) inst += ', #' + str(int(imm,2)) result = utilFunc.logical_and(rnValue,imm).zfill(const.REG_SIZE) utilFunc.finalize(rdKey, result, inst, '1')
def op_i(binary, N, instr, sub_op, setFlags): rdKey = utilFunc.getRegKeyByStringKey(binary[27:32]) rnKey = utilFunc.getRegKeyByStringKey(binary[22:27]) rnVal = utilFunc.getRegValueByStringkey(binary[22:27], '1') if (N == 32): rnVal = rnVal[32:64] r = 'w' elif (N == 64): r = 'x' imm12 = binary[10:22] shiftType = binary[8:10] instr += " " + r + str(rdKey) + ", " + r + str( rnKey) + ", #" + utilFunc.binaryToHexStr(imm12) + ", LSL" if shiftType == "00": imm12 = imm12.zfill(N) instr = instr + " #0" elif shiftType == "01": imm12 = (imm12 + '0' * 12).zfill(N) instr = instr + " #12" to_store, isSp = utilFunc.addSub(rdKey, rnVal, imm12, sub_op, N, setFlags) utilFunc.finalize(rdKey, to_store.zfill(const.REG_SIZE), instr, isSp)
def op_sr(binary, N, instr, sub_op, setFlags): rdKey = utilFunc.getRegKeyByStringKey(binary[27:32]) rnKey = utilFunc.getRegKeyByStringKey(binary[22:27]) rmkey = utilFunc.getRegKeyByStringKey(binary[11:16]) imm6 = binary[16:22] imm6Val = int(imm6, 2) rnVal = utilFunc.getRegValueByStringkey(binary[22:27], '0') rmVal = utilFunc.getRegValueByStringkey(binary[11:16], '0') if (N == 32): rnVal = rnVal[32:64] rmVal = rmVal[32:64] r = 'w' elif (N == 64): r = 'x' shiftType = binary[8:10] instr += " " + r + str(rdKey) + ", " + r + str(rnKey) + ", " + r + str( rmkey) + ", " op2, instr = fetchOp2_sr(rmVal, shiftType, imm6Val, instr) instr += " #" + str(imm6Val) to_store, isSp = utilFunc.addSub(rdKey, rnVal, op2, sub_op, N, setFlags) #isSp ignored utilFunc.finalize(rdKey, to_store.zfill(const.REG_SIZE), instr, '0')
def mov_bmi(binary, N): inst = "MOV " rdKey = utilFunc.getRegKeyByStringKey(binary[27:32]) if N == 32: r = "w" else: r = "x" inst += r + str(rdKey) immr = binary[10:16] imms = binary[16:22] immN = binary[9] imm, temp = utilFunc.decodeBitMasks(immN, imms, immr, N) inst += ", #" + utilFunc.binaryToHexStr(imm) result = utilFunc.logical_or("0" * N, imm).zfill(const.REG_SIZE) utilFunc.finalize(rdKey, result, inst, "1")
def mov_bmi(binary, N): inst = 'MOV ' rdKey = utilFunc.getRegKeyByStringKey(binary[27:32]) if (N == 32): r = 'w' else: r = 'x' inst += r + str(rdKey) immr = binary[10:16] imms = binary[16:22] immN = binary[9] imm, temp = utilFunc.decodeBitMasks(immN, imms, immr, N) inst += ', #' + utilFunc.binaryToHexStr(imm) result = utilFunc.logical_or('0' * N, imm).zfill(const.REG_SIZE) utilFunc.finalize(rdKey, result, inst, '1')
def helper_rp(wback, postIndex, binary, instr): rtKey = utilFunc.getRegKeyByStringKey(binary[27:32]) rnKey = utilFunc.getRegKeyByStringKey(binary[22:27]) rt2Key = utilFunc.getRegKeyByStringKey(binary[17:22]) imm7 = binary[10:17] l = binary[9] opc = binary[0:2] if (l == '1'): memOp = const.MEM_OP_LOAD else: memOp = const.MEM_OP_STORE signed = (opc[1] != '0') scale = 2 + utilFunc.uInt(opc[0]) dataSize = 8 << scale offset = utilFunc.lsl(utilFunc.signExtend(imm7, 64), scale) offset = utilFunc.sInt(offset, 64) dbytes = dataSize / 8 address = utilFunc.getRegValueByStringkey(binary[22:27], '1') address = utilFunc.uInt(address) if not (postIndex): address = address + offset type = binary[7:9] if (opc == '00'): r = 'w' if (opc == '10'): r = 'x' if (type == '01'): #Post-index instr += " " + r + str(rtKey) + ", " + r + str(rt2Key) + ", [x" + str( rnKey) + "], #" + str(offset) if (type == '11'): #Pre-index instr += " " + r + str(rtKey) + ", " + r + str(rt2Key) + ", [x" + str( rnKey) + ", #" + str(offset) + "]!" if (type == '10'): #Signed-offset instr += " " + r + str(rtKey) + ", " + r + str(rt2Key) + ", [x" + str( rnKey) + ", #" + str(offset) + "]" if (memOp == const.MEM_OP_STORE): data1 = utilFunc.getRegValueByStringkey(binary[27:32], '0') data2 = utilFunc.getRegValueByStringkey(binary[17:22], '0') utilFunc.storeToMemory(data1, address, dataSize) utilFunc.storeToMemory(data2, address + dbytes, dataSize) elif (memOp == const.MEM_OP_LOAD): data1 = utilFunc.fetchFromMemory(address, dataSize) data2 = utilFunc.fetchFromMemory(address + dbytes, dataSize) if (data1 == const.TRAP or data2 == const.TRAP): utilFunc.finalize_simple(instr) print "HEY!!! There seems to be a problem - memory location can not be accessed" print "Moving ahead without executing the instruction" return if (signed): data1 = utilFunc.signExtend(data1, 64) data2 = utilFunc.signExtend(data2, 64) utilFunc.setRegValue(rtKey, data1.zfill(64), '0') utilFunc.setRegValue(rt2Key, data2.zfill(64), '0') if (wback): if postIndex: address = address + offset address = utilFunc.intToBinary(address, 64) utilFunc.setRegValue(rnKey, address, '1') utilFunc.finalize_simple(instr)
def helper_rp(wback, postIndex, binary, instr): rtKey = utilFunc.getRegKeyByStringKey(binary[27:32]) rnKey = utilFunc.getRegKeyByStringKey(binary[22:27]) rt2Key = utilFunc.getRegKeyByStringKey(binary[17:22]) imm7 = binary[10:17] l = binary[9] opc = binary[0:2] if(l == '1'): memOp = const.MEM_OP_LOAD else: memOp = const.MEM_OP_STORE signed = (opc[1] != '0') scale = 2 + utilFunc.uInt(opc[0]) dataSize = 8 << scale offset = utilFunc.lsl(utilFunc.signExtend(imm7, 64), scale) offset = utilFunc.sInt(offset, 64) dbytes = dataSize / 8; address = utilFunc.getRegValueByStringkey(binary[22:27], '1') address = utilFunc.uInt(address) if not(postIndex): address = address + offset type = binary[7:9] if(opc == '00'): r = 'w' if(opc == '10'): r = 'x' if(type == '01'): #Post-index instr += " " + r + str(rtKey) +", " + r + str(rt2Key) + ", [x" + str(rnKey) + "], #" + str(offset) if(type == '11'): #Pre-index instr += " " + r + str(rtKey) +", " + r + str(rt2Key) + ", [x" + str(rnKey) + ", #" + str(offset) + "]!" if(type == '10'): #Signed-offset instr += " " + r + str(rtKey) +", " + r + str(rt2Key) + ", [x" + str(rnKey) + ", #" + str(offset) + "]" if(memOp == const.MEM_OP_STORE): data1 = utilFunc.getRegValueByStringkey(binary[27:32], '0') data2 = utilFunc.getRegValueByStringkey(binary[17:22], '0') utilFunc.storeToMemory(data1, address, dataSize) utilFunc.storeToMemory(data2, address + dbytes, dataSize) elif(memOp == const.MEM_OP_LOAD): data1 = utilFunc.fetchFromMemory(address, dataSize) data2 = utilFunc.fetchFromMemory(address + dbytes, dataSize) if(data1 == const.TRAP or data2 == const.TRAP): utilFunc.finalize_simple(instr) print "HEY!!! There seems to be a problem - memory location can not be accessed" print "Moving ahead without executing the instruction" return if(signed): data1 = utilFunc.signExtend(data1, 64) data2 = utilFunc.signExtend(data2, 64) utilFunc.setRegValue(rtKey, data1.zfill(64), '0') utilFunc.setRegValue(rt2Key, data2.zfill(64), '0') if(wback): if postIndex: address = address + offset address = utilFunc.intToBinary(address, 64) utilFunc.setRegValue(rnKey, address, '1') utilFunc.finalize_simple(instr)