def run():
segmk = Segmaker("design.bits", bits_per_word=16)
# Load params
with open("params.csv", "r") as fp:
reader = DictReader(fp)
params = [l for l in reader]
# Add tags
for p in params:
m = p["bel"][0]
tag = "CARRY8.{}CY0".format(m)
val = int(p["ncy0"])
segmk.add_site_tag(p["site"], tag, val)
segmk.compile()
segmk.write()
#!/usr/bin/env python3
# -*- coding: utf-8 -*-
#
# Copyright (C) 2020 The Project U-Ray Authors.
#
# Use of this source code is governed by a ISC-style
# license that can be found in the LICENSE file or at
# https://opensource.org/licenses/ISC
#
# SPDX-License-Identifier: ISC
from utils.segmaker import Segmaker
segmk = Segmaker("design.bits", bits_per_word=16)
print("Loading tags")
'''
site,bel,rs_inv
SLICE_X12Y100,AFF,0
SLICE_X13Y100,EFF,1
'''
f = open('params.csv', 'r')
f.readline()
for l in f:
site, bel, rs_inv = l.split(',')
rs_inv = int(rs_inv)
segmk.add_site_tag(site, "RST_ABCDINV" if bel == "AFF" else "RST_EFGHINV",
rs_inv)
segmk.compile()
segmk.write()
#
# SPDX-License-Identifier: Apache-2.0
'''
FDCE Primitive: D Flip-Flop with Clock Enable and Asynchronous Clear
FDPE Primitive: D Flip-Flop with Clock Enable and Asynchronous Preset
FDRE Primitive: D Flip-Flop with Clock Enable and Synchronous Reset
FDSE Primitive: D Flip-Flop with Clock Enable and Synchronous Set
LDCE Primitive: Transparent Data Latch with Asynchronous Clear and Gate Enable
LDPE Primitive: Transparent Data Latch with Asynchronous Preset and Gate Enable
'''
from prims import isff, isl
from utils.segmaker import Segmaker
segmk = Segmaker("design.bits", bits_per_word=16)
def loadtop():
'''
i,prim,loc,bel
0,FDPE,SLICE_X12Y100,C5FF
1,FDPE,SLICE_X15Y100,A5FF
2,FDPE_1,SLICE_X16Y100,B5FF
3,LDCE_1,SLICE_X17Y100,BFF
'''
f = open('top.txt', 'r')
f.readline()
ret = {}
for l in f:
i, prim, loc, bel, init = l.split(",")
def run():
segmk = Segmaker("design.bits", bits_per_word=16)
precyinit_bot_opts = ("C0", "C1", "AX", "CIN")
precyinit_top_opts = ("C0", "C1", "EX", "CO3")
# Load params
with open("params.csv", "r") as fp:
reader = DictReader(fp)
params = [l for l in reader]
# Add tags
for p in params:
site = p["site"]
for opt in precyinit_bot_opts:
tag = "CARRY8.PRECYINIT_BOT.{}".format(opt)
val = int(p["precyinit_bot"] == opt)
segmk.add_site_tag(site, tag, val)
for opt in precyinit_top_opts:
tag = "CARRY8.PRECYINIT_TOP.{}".format(opt)
val = int(p["precyinit_top"] == opt)
segmk.add_site_tag(site, tag, val)
is_split = int(p["is_split"])
segmk.add_site_tag(site, "CARRY8.DUAL_CY4", is_split)
segmk.compile()
segmk.write()
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
# SPDX-License-Identifier: Apache-2.0
import sys
from utils.segmaker import Segmaker
segmk = Segmaker("design_%s.bits" % sys.argv[1], bits_per_word=16)
print("Loading tags from design_%s.txt." % sys.argv[1])
with open("design_%s.txt" % sys.argv[1], "r") as f:
for line in f:
line = line.split()
site = line[0]
bel = line[1]
init = int(line[2][4:], 16)
for i in range(64):
bitname = "%s.INIT[%02d]" % (bel, i)
bitname = bitname.replace("6LUT", "LUT")
segmk.add_site_tag(site, bitname, ((init >> i) & 1) != 0)
segmk.compile()
def run():
parser = argparse.ArgumentParser()
parser.add_argument('--bits_file', default='design.bits')
parser.add_argument('--features_file', default='design.features')
parser.add_argument('--extent_features_file', default=None)
parser.add_argument('--block_type', default='CLB_IO_CLK')
parser.add_argument(
'--zero_feature_enums',
help=
"File containing features that are zero enums, and which parameter is the zero."
)
args = parser.parse_args()
zero_features = {}
if args.zero_feature_enums:
with open(args.zero_feature_enums) as f:
for l in f:
parts = l.strip().split('=')
assert len(parts) == 2, "Expected line with ="
zero_features[parts[0]] = parts[1]
db = Database(util.get_db_root(), util.get_part())
grid = db.grid()
feature_data = {}
feature_trees = {}
if args.extent_features_file:
with open(args.extent_features_file) as f:
tile_type = None
for l in f:
l = l.strip()
if l.startswith('.tiletype'):
tile_type = l.split(' ')[1]
assert tile_type not in feature_data
feature_data[tile_type] = set()
feature_data[tile_type].add(l.strip())
for tile_type in feature_data:
features = feature_data[tile_type]
split_features = []
for feature in features:
split_features.append(feature.split('.'))
split_features.sort(key=lambda x: -len(x))
tree = FeatureTree(part=tile_type)
for split_feature in split_features:
child = tree
for part in split_feature:
child = child[part]
tree.coalesce()
feature_trees[tile_type] = tree
all_features = read_features(args.features_file)
tile_types = set()
for _, tile_type in all_features.keys():
tile_types.add(tile_type)
for tile_type in tile_types:
segmk = Segmaker(args.bits_file, bits_per_word=16)
segmk.set_def_bt(args.block_type)
tree = feature_trees[tile_type]
pip_active = {}
pip_sources = {}
pip_active_per_tile = {}
for pip_feature in tree.pip_features():
dest = pip_feature.part
assert dest not in pip_active
assert dest not in pip_sources
pip_active[dest] = 0
sources = []
for child in pip_feature:
child_feature = pip_feature[child]
parts = child_feature.full_feature().split('.')
assert parts[1] == 'PIP'
if child_feature.is_leaf():
sources.append(parts[-1])
else:
src = child_feature.part
children = set(child for child in child_feature)
assert len(set(('FWD', 'REV')) | children) == 2, children
sources.extend([
'{}.FWD'.format(src),
'{}.REV'.format(src),
])
pip_sources[dest] = sources
proto_pip_active = pip_active
for (tile, a_type), features in all_features.items():
if tile_type != a_type:
continue
loc = grid.loc_of_tilename(tile)
gridinfo = grid.gridinfo_at_loc(loc)
if BlockType.CLB_IO_CLK not in gridinfo.bits:
print('*** WARNING *** Tile {} is missing bits!'.format(tile))
continue
pip_active = dict(proto_pip_active)
indicies = {}
for l in features:
parts = l.split('.')
feature = tree.find_feature(l)
# Mark active indices on vector features
if feature.index is not None and len(feature.index) > 1:
current_index = int(parts[-1].split('[')[1][:-1])
if id(feature) not in indicies:
indicies[id(feature)] = (feature, set())
indicies[id(feature)][1].add(current_index)
segmk.add_tile_tag(tile, l, 1)
if parts[0] == "PIP":
assert feature.is_leaf()
assert parts[1] in pip_active
pip_active[parts[1]] = 1
elif feature.is_leaf() and feature.index is None:
parent = feature.parent
should_emit_enum_zero = True
# Only emit 0 tags if this is not a zero feature, or if
# this is feature is the zero enum.
if parent.part in zero_features:
if zero_features[parent.part] != feature.part:
should_emit_enum_zero = False
parts = parent.full_feature().split('.')[1:]
parts.append(zero_features[parent.part])
s = '.'.join(parts)
segmk.add_tile_tag(tile, s, 0)
if should_emit_enum_zero:
for child in parent:
child_feature = parent[child]
if child_feature is not feature:
if not child_feature.is_leaf():
continue
parts = child_feature.full_feature().split(
'.')[1:]
s = '.'.join(parts)
segmk.add_tile_tag(tile, s, 0)
for feature, active_indicies in indicies.values():
min_index = min(active_indicies)
if min(feature.index) + 1 == min_index:
min_index = min(feature.index)
max_index = max(active_indicies)
if max(feature.index) - 1 == max_index:
max_index = max(feature.index)
s = '.'.join(feature.full_feature().split('.')[1:])
s = '['.join(s.split('[')[:-1])
for idx in range(min_index, max_index + 1):
if idx in active_indicies:
continue
segmk.add_tile_tag(tile, '{}[{}]'.format(s, idx), 0)
# Output disable features for pips.
pip_active_per_tile[tile] = pip_active
segmk.compile()
segmk.write(allow_empty=True,
extra_tags=output_empty_pips(tree, pip_sources,
pip_active_per_tile))