def test_simulate_hdlvar(self, run_command, find_cds_root_irun,
find_cds_root_virtuoso):
find_cds_root_irun.return_value = "cds_root_irun"
find_cds_root_virtuoso.return_value = None
simif = IncisiveInterface(prefix="prefix",
output_path=self.output_path,
hdlvar="custom_hdlvar")
config = make_config()
self.assertTrue(
simif.simulate("suite_output_path", "test_suite_name", config))
elaborate_args_file = join("suite_output_path", simif.name,
"irun_elaborate.args")
simulate_args_file = join("suite_output_path", simif.name,
"irun_simulate.args")
run_command.assert_has_calls([
mock.call(
[join("prefix", "irun"), "-f",
basename(elaborate_args_file)],
cwd=dirname(elaborate_args_file),
env=simif.get_env(),
),
mock.call(
[join("prefix", "irun"), "-f",
basename(simulate_args_file)],
cwd=dirname(simulate_args_file),
env=simif.get_env(),
),
])
for args_file in [elaborate_args_file, simulate_args_file]:
args = read_file(args_file).splitlines()
self.assertIn('-hdlvar "custom_hdlvar"', args)
def test_simulate_fail(
self, run_command, find_cds_root_irun, find_cds_root_virtuoso
):
find_cds_root_irun.return_value = "cds_root_irun"
find_cds_root_virtuoso.return_value = None
simif = IncisiveInterface(prefix="prefix", output_path=self.output_path)
config = make_config()
self.assertFalse(simif.simulate("suite_output_path", "test_suite_name", config))
elaborate_args_file = str(
Path("suite_output_path") / simif.name / "irun_elaborate.args"
)
simulate_args_file = str(
Path("suite_output_path") / simif.name / "irun_simulate.args"
)
run_command.assert_has_calls(
[
mock.call(
[
str(Path("prefix") / "irun"),
"-f",
Path(elaborate_args_file).name,
],
cwd=str(Path(elaborate_args_file).parent),
env=simif.get_env(),
),
mock.call(
[str(Path("prefix") / "irun"), "-f", Path(simulate_args_file).name],
cwd=str(Path(simulate_args_file).parent),
env=simif.get_env(),
),
]
)
def test_elaborate(self, run_command, find_cds_root_irun,
find_cds_root_virtuoso):
find_cds_root_irun.return_value = "cds_root_irun"
find_cds_root_virtuoso.return_value = None
simif = IncisiveInterface(prefix="prefix",
output_path=self.output_path)
config = make_config(verilog=True)
self.assertTrue(
simif.simulate("suite_output_path",
"test_suite_name",
config,
elaborate_only=True))
elaborate_args_file = str(
Path("suite_output_path") / simif.name / "irun_elaborate.args")
run_command.assert_has_calls([
mock.call(
[
str(Path("prefix") / "irun"),
"-f",
Path(elaborate_args_file).name,
],
cwd=str(Path(elaborate_args_file).parent),
env=simif.get_env(),
)
])
self.assertEqual(
read_file(elaborate_args_file).splitlines(),
[
"-elaborate",
"-nocopyright",
"-licqueue",
"-errormax 10",
"-nowarn WRMNZD",
"-nowarn DLCPTH",
"-nowarn DLCVAR",
"-ncerror EVBBOL",
"-ncerror EVBSTR",
"-ncerror EVBNAT",
"-work work",
'-nclibdirname "%s"' %
str(Path(self.output_path) / "libraries"),
'-cdslib "%s"' % str(Path(self.output_path) / "cds.lib"),
'-log "%s"' % str(
Path("suite_output_path") / simif.name /
"irun_elaborate.log"),
"-quiet",
"-access +r",
'-input "@run"',
"-top lib.modulename:sv",
],
)
def test_simulate_generics_and_parameters(self, run_command,
find_cds_root_irun,
find_cds_root_virtuoso):
find_cds_root_irun.return_value = "cds_root_irun"
find_cds_root_virtuoso.return_value = None
simif = IncisiveInterface(prefix="prefix",
output_path=self.output_path)
config = make_config(verilog=True,
generics={
"genstr": "genval",
"genint": 1,
"genbool": True
})
self.assertTrue(
simif.simulate("suite_output_path", "test_suite_name", config))
elaborate_args_file = str(
Path("suite_output_path") / simif.name / "irun_elaborate.args")
simulate_args_file = str(
Path("suite_output_path") / simif.name / "irun_simulate.args")
run_command.assert_has_calls([
mock.call(
[
str(Path("prefix") / "irun"),
"-f",
Path(elaborate_args_file).name,
],
cwd=str(Path(elaborate_args_file).parent),
env=simif.get_env(),
),
mock.call(
[
str(Path("prefix") / "irun"), "-f",
Path(simulate_args_file).name
],
cwd=str(Path(simulate_args_file).parent),
env=simif.get_env(),
),
])
for args_file in [elaborate_args_file, simulate_args_file]:
args = read_file(args_file).splitlines()
self.assertIn('-gpg "modulename.genstr => \\"genval\\""', args)
self.assertIn('-gpg "modulename.genint => 1"', args)
self.assertIn('-gpg "modulename.genbool => \\"True\\""', args)
def test_elaborate_fail(self, run_command, find_cds_root_irun,
find_cds_root_virtuoso):
find_cds_root_irun.return_value = "cds_root_irun"
find_cds_root_virtuoso.return_value = None
simif = IncisiveInterface(prefix="prefix",
output_path=self.output_path)
config = make_config()
self.assertFalse(
simif.simulate("suite_output_path", "test_suite_name", config))
elaborate_args_file = join("suite_output_path", simif.name,
"irun_elaborate.args")
run_command.assert_has_calls([
mock.call(
[join("prefix", "irun"), "-f",
basename(elaborate_args_file)],
cwd=dirname(elaborate_args_file),
env=simif.get_env(),
)
])
def test_simulate_extra_flags(
self, run_command, find_cds_root_irun, find_cds_root_virtuoso
):
find_cds_root_irun.return_value = "cds_root_irun"
find_cds_root_virtuoso.return_value = None
simif = IncisiveInterface(prefix="prefix", output_path=self.output_path)
config = make_config(
sim_options={"incisive.irun_sim_flags": ["custom", "flags"]}
)
self.assertTrue(simif.simulate("suite_output_path", "test_suite_name", config))
elaborate_args_file = str(
Path("suite_output_path") / simif.name / "irun_elaborate.args"
)
simulate_args_file = str(
Path("suite_output_path") / simif.name / "irun_simulate.args"
)
run_command.assert_has_calls(
[
mock.call(
[
str(Path("prefix") / "irun"),
"-f",
Path(elaborate_args_file).name,
],
cwd=str(Path(elaborate_args_file).parent),
env=simif.get_env(),
),
mock.call(
[str(Path("prefix") / "irun"), "-f", Path(simulate_args_file).name],
cwd=str(Path(simulate_args_file).parent),
env=simif.get_env(),
),
]
)
args = read_file(elaborate_args_file).splitlines()
self.assertIn("custom", args)
self.assertIn("flags", args)
args = read_file(simulate_args_file).splitlines()
self.assertIn("custom", args)
self.assertIn("flags", args)
def test_simulate_verilog(
self, run_command, find_cds_root_irun, find_cds_root_virtuoso
):
find_cds_root_irun.return_value = "cds_root_irun"
find_cds_root_virtuoso.return_value = None
simif = IncisiveInterface(prefix="prefix", output_path=self.output_path)
project = Project()
project.add_library("lib", "lib_path")
write_file("file.vhd", "")
project.add_source_file("file.vhd", "lib", file_type="vhdl")
with mock.patch(
"vunit.sim_if.check_output", autospec=True, return_value=""
) as dummy:
simif.compile_project(project)
config = make_config(verilog=True)
self.assertTrue(simif.simulate("suite_output_path", "test_suite_name", config))
elaborate_args_file = str(
Path("suite_output_path") / simif.name / "irun_elaborate.args"
)
simulate_args_file = str(
Path("suite_output_path") / simif.name / "irun_simulate.args"
)
run_command.assert_has_calls(
[
mock.call(
[
str(Path("prefix") / "irun"),
"-f",
Path(elaborate_args_file).name,
],
cwd=str(Path(elaborate_args_file).parent),
env=simif.get_env(),
),
mock.call(
[str(Path("prefix") / "irun"), "-f", Path(simulate_args_file).name],
cwd=str(Path(simulate_args_file).parent),
env=simif.get_env(),
),
]
)
self.assertEqual(
read_file(elaborate_args_file).splitlines(),
[
"-elaborate",
"-nocopyright",
"-licqueue",
"-errormax 10",
"-nowarn WRMNZD",
"-nowarn DLCPTH",
"-nowarn DLCVAR",
"-ncerror EVBBOL",
"-ncerror EVBSTR",
"-ncerror EVBNAT",
"-work work",
'-nclibdirname "%s"' % str(Path(self.output_path) / "libraries"),
'-cdslib "%s"' % str(Path(self.output_path) / "cds.lib"),
'-log "%s"'
% str(Path("suite_output_path") / simif.name / "irun_elaborate.log"),
"-quiet",
'-reflib "lib_path"',
"-access +r",
'-input "@run"',
"-top lib.modulename:sv",
],
)
self.assertEqual(
read_file(simulate_args_file).splitlines(),
[
"-nocopyright",
"-licqueue",
"-errormax 10",
"-nowarn WRMNZD",
"-nowarn DLCPTH",
"-nowarn DLCVAR",
"-ncerror EVBBOL",
"-ncerror EVBSTR",
"-ncerror EVBNAT",
"-work work",
'-nclibdirname "%s"' % str(Path(self.output_path) / "libraries"),
'-cdslib "%s"' % str(Path(self.output_path) / "cds.lib"),
'-log "%s"'
% str(Path("suite_output_path") / simif.name / "irun_simulate.log"),
"-quiet",
'-reflib "lib_path"',
"-access +r",
'-input "@run"',
"-top lib.modulename:sv",
],
)
