def test_get_fpga_capability(stc):
ctor = CScriptableCreator()
system = CStcSystem.Instance()
project = system.GetObject("project")
port = ctor.Create("port", project)
phys_cm = system.GetObject("PhysicalChassisManager")
phys_chassis = ctor.Create("PhysicalChassis", phys_cm)
phys_tm = ctor.Create("PhysicalTestModule", phys_chassis)
phys_pg = ctor.Create("PhysicalPortGroup", phys_tm)
phys_port = ctor.Create("PhysicalPort", phys_pg)
phys_port.AddObject(port, RelationType("PhysicalLogical"))
phys_tm.Set("Model", "DX-10G-S32")
phys_tm.Set("ProductFamily", "Thunderbird")
assert tsc.get_fpga_capability(port) == "SOFT_AND_HARD"
phys_tm.Set("Model", "VM-1G-V1-1P")
phys_tm.Set("ProductFamily", "VTC")
assert tsc.get_fpga_capability(port) == "SOFT_ONLY"
phys_tm.Set("Model", "CV-10G-S8")
phys_tm.Set("ProductFamily", "Pyro")
assert tsc.get_fpga_capability(port) == "HARD_ONLY"
