def FunOptBasic(fun: ir.Fun, opt_stats: Dict[str, int], allow_conv_conversion: bool): opt_stats["canonicalized"] += canonicalize.FunCanonicalize(fun) opt_stats["strength_red"] += lowering.FunStrengthReduction(fun) reaching_defs.FunComputeReachingDefs(fun) reaching_defs.FunCheckReachingDefs(fun) opt_stats["reg_prop"] = reaching_defs.FunPropagateRegs(fun) opt_stats["const_prop"] += reaching_defs.FunPropagateConsts(fun) opt_stats["const_fold"] += reaching_defs.FunConstantFold( fun, allow_conv_conversion) opt_stats["canonicalized"] += canonicalize.FunCanonicalize(fun) opt_stats["strength_red"] += lowering.FunStrengthReduction(fun) opt_stats["ls_st_simplify"] += reaching_defs.FunLoadStoreSimplify(fun) opt_stats["move_elim"] += lowering.FunMoveElimination(fun) liveness.FunComputeLivenessInfo(fun) opt_stats["useless"] = liveness.FunRemoveUselessInstructions(fun) reg_stats.FunComputeRegStatsExceptLAC(fun) reg_stats.FunComputeRegStatsLAC(fun) opt_stats["dropped_regs"] += reg_stats.FunDropUnreferencedRegs(fun) opt_stats["separated_regs"] += reg_stats.FunSeparateLocalRegUsage(fun)
def testBaseRegPropagation2(self): code = io.StringIO(r""" .fun foo NORMAL [] = [] .reg S32 [x] .reg U32 [y] .reg A32 [a counter] .bbl start poparg counter poparg y lea a counter 666 ld x = a 0 mul x = x 777 st a 334 = x lea a counter y ld x = a 0 mul x = x 777 st a 0 = x lea a counter y ld x = a 0 mul x = x 777 st a 0 = x mov a counter ld x = a 0 mul x = x 777 st a 334 = x ret """) unit = serialize.UnitParseFromAsm(code, False) fun = unit.fun_syms["foo"] bbl = fun.bbls[0] cfg.FunInitCFG(fun) liveness.FunComputeLivenessInfo(fun) reaching_defs.FunComputeReachingDefs(fun) reaching_defs.FunPropagateConsts(fun) reaching_defs.FunLoadStoreSimplify(fun) liveness.FunRemoveUselessInstructions(fun) print("\n".join(serialize.FunRenderToAsm(fun))) # all ld/st were re-written for ins in bbl.inss: self.assertIn(ins.opcode.name, { "ret", "mul", "poparg", "ld", "ld", "st", "st", })
def testBaseRegPropagation1(self): code = io.StringIO(r""" .mem COUNTER 4 RW .data 4 [0] .fun foo NORMAL [] = [] .stk array 4 4000 .reg S32 [x] .reg U32 [y] .reg A32 [counter] .bbl start lea.mem counter = COUNTER 0 ld x = counter 0 add x = x 1 st counter 0 = x lea.mem counter = COUNTER 100 ld x = counter 100 add x = x 1 st counter 300 = x mov y 666 lea.mem counter = COUNTER 0 ld x = counter y add x = x 1 st counter y = x lea.stk counter = array 0 ld x = counter 0 add x = x 1 st counter 0 = x lea.stk counter = array 100 ld x = counter 100 add x = x 1 st counter 300 = x mov y 666 lea.stk counter = array 0 ld x = counter y add x = x 1 st counter y = x ret """) unit = serialize.UnitParseFromAsm(code, False) fun = unit.fun_syms["foo"] bbl = fun.bbls[0] cfg.FunInitCFG(fun) liveness.FunComputeLivenessInfo(fun) reaching_defs.FunComputeReachingDefs(fun) reaching_defs.FunPropagateConsts(fun) # reaching_defs.FunConstantFold(fun, True) reaching_defs.FunLoadStoreSimplify(fun) liveness.FunRemoveUselessInstructions(fun) print("\n".join(serialize.FunRenderToAsm(fun))) # all ld/st were re-written for ins in bbl.inss: self.assertIn( ins.opcode.name, {"ret", "add", "ld.mem", "st.mem", "ld.stk", "st.stk"})