def test_ComplexBitMerge_1x8_to_8( setup_sim ): model, sim = setup_bit_merge( setup_sim, 8, 8 ) set_ports( model.in_, 0b11110000 ) sim.eval_combinational() assert model.out.v == 0b11110000 set_ports( model.in_, 0b01010101 ) sim.eval_combinational() assert model.out.value == 0b01010101
def test_SimpleBitMerge_8x1_to_8(setup_sim): model, sim = setup_bit_merge(setup_sim, 8) set_ports(model.in_, 0b11110000) sim.eval_combinational() assert model.out.value == 0b11110000 set_ports(model.in_, 0b01010101) sim.eval_combinational() assert model.out.value == 0b01010101 model.in_[0].value = 0 sim.eval_combinational() assert model.out.value == 0b01010100 model.in_[7].value = 1 sim.eval_combinational() assert model.out.value == 0b11010100
def test_SimpleBitMerge_16x1_to_16( setup_sim ): model, sim = setup_bit_merge( setup_sim, 16 ) set_ports( model.in_, 0b11110000 ) sim.eval_combinational() assert model.out.value == 0b11110000 set_ports( model.in_, 0b1111000011001010 ) sim.eval_combinational() assert model.out.value == 0b1111000011001010 model.in_[0].value = 1 sim.eval_combinational() assert model.out.value == 0b1111000011001011 model.in_[15].value = 0 sim.eval_combinational() assert model.out.value == 0b0111000011001011
def test_SimpleBitMerge_8x1_to_8( setup_sim ): model, sim = setup_bit_merge( setup_sim, 8 ) set_ports( model.in_, 0b11110000 ) sim.eval_combinational() assert model.out.value == 0b11110000 set_ports( model.in_, 0b01010101 ) sim.eval_combinational() assert model.out.value == 0b01010101 model.in_[0].value = 0 sim.eval_combinational() assert model.out.value == 0b01010100 model.in_[7].value = 1 sim.eval_combinational() assert model.out.value == 0b11010100