def execute(self, processor): shift_n = substring(processor.registers.get(self.m), 7, 0) result, carry = shift_c(processor.registers.get(self.n), 32, SRType.ROR, shift_n, processor.registers.cpsr.c) processor.registers.set(self.d, result) if self.setflags: processor.registers.cpsr.n = bit_at(result, 31) processor.registers.cpsr.z = 0 if result else 1 processor.registers.cpsr.c = carry
def execute(self, processor): if processor.condition_passed(): shifted, carry = shift_c(processor.registers.get(self.m), 32, self.shift_t, self.shift_n, processor.registers.cpsr.c) result = processor.registers.get(self.n) & shifted processor.registers.cpsr.n = bit_at(result, 31) processor.registers.cpsr.z = 0 if result else 1 processor.registers.cpsr.c = carry
def execute(self, processor): shift_n = processor.registers.get(self.m)[24:32].uint result, carry = shift_c(processor.registers.get(self.n), SRType.SRType_ASR, shift_n, processor.registers.cpsr.get_c()) processor.registers.set(self.d, result) if self.setflags: processor.registers.cpsr.set_n(result[0]) processor.registers.cpsr.set_z(not result.any(True)) processor.registers.cpsr.set_c(carry)
def execute(self, processor): shift_n = lower_chunk(processor.registers.get(self.s), 8) shifted, carry = shift_c(processor.registers.get(self.m), 32, self.shift_t, shift_n, processor.registers.cpsr.c) result = processor.registers.get(self.n) | shifted processor.registers.set(self.d, result) if self.setflags: processor.registers.cpsr.n = bit_at(result, 31) processor.registers.cpsr.z = 0 if result else 1 processor.registers.cpsr.c = carry
def execute(self, processor): shift_n = processor.registers.get(self.s)[24:32].uint shifted, carry = shift_c(processor.registers.get(self.m), self.shift_t, shift_n, processor.registers.cpsr.get_c()) result = processor.registers.get(self.n) & ~shifted processor.registers.set(self.d, result) if self.setflags: processor.registers.cpsr.set_n(result[0]) processor.registers.cpsr.set_z(not result.any(True)) processor.registers.cpsr.set_c(carry)
def execute(self, processor): if processor.condition_passed(): shifted, carry = shift_c(processor.registers.get(self.m), self.shift_t, self.shift_n, processor.registers.cpsr.get_c()) result = processor.registers.get(self.n) | ~shifted processor.registers.set(self.d, result) if self.setflags: processor.registers.cpsr.set_n(result[0]) processor.registers.cpsr.set_z(not result.any(True)) processor.registers.cpsr.set_c(carry)
def execute(self, processor): if processor.condition_passed(): result, carry = shift_c(processor.registers.get(self.m), 32, SRType.RRX, 1, processor.registers.cpsr.c) if self.d == 15: processor.alu_write_pc(result) else: processor.registers.set(self.d, result) if self.setflags: processor.registers.cpsr.n = bit_at(result, 31) processor.registers.cpsr.z = 0 if result else 1 processor.registers.cpsr.c = carry
def execute(self, processor): if processor.condition_passed(): result, carry = shift_c(processor.registers.get(self.m), SRType.SRType_LSR, self.shift_n, processor.registers.cpsr.get_c()) if self.d == 15: processor.alu_write_pc(result) else: processor.registers.set(self.d, result) if self.setflags: processor.registers.cpsr.set_n(result[0]) processor.registers.cpsr.set_z(not result.any(True)) processor.registers.cpsr.set_c(carry)
def execute(self, processor): if processor.condition_passed(): shifted, carry = shift_c(processor.registers.get(self.m), 32, self.shift_t, self.shift_n, processor.registers.cpsr.c) result = bit_not(shifted, 32) if self.d == 15: processor.alu_write_pc(result) else: processor.registers.set(self.d, result) if self.setflags: processor.registers.cpsr.n = bit_at(result, 31) processor.registers.cpsr.z = 0 if result else 1 processor.registers.cpsr.c = carry