} otpmapIndexDict = None otpmapDefnDict = None otpDescDiffDict = None ftfxNorMemBase = None c040hdNorMemBase = None sbLoaderVersion = gendef.kSbLoaderVersion_v1_0 # memory map memoryRange = { # ITCM_CM7, 512KByte 'itcm': MemoryRange(0x00000000, 0x80000, 'state_mem0.dat'), # ITCM_CM4, 128KByte 'itcm_cm4': MemoryRange(0x1FFE0000, 0x20000, 'state_mem0.dat'), # DTCM, 512KByte 'dtcm': MemoryRange(0x20000000, 0x80000, 'state_mem1.dat'), # OCRAM, 2MByte 'ocram': MemoryRange(0x20200000, 0x200000, 'state_mem2.dat'), # FLASH, 64KByte / 512MByte 'flash': MemoryRange(0x00000000, 0x20000000, 'state_flash_mem.dat', True, 0x10000) }
availableCommands = 0x5EFDF supportedPeripheralSpeed_uart = [4800, 9600, 19200, 57600, 115200] # @todo Verify flexspiNorMemBase0 = 0x30000000 flexspiNorMemBase1 = 0x60000000 xspiNorCfgInfoOffset = 0x400 isSipFlexspiNorDevice = False quadspiNorMemBase = None registerAddrDict = rundef.registerAddrDict_RT11yy registerDefnDict = rundef.registerDefnDict_RT11yy ftfxNorMemBase = None c040hdNorMemBase = None # memory map memoryRange = { # ITCM_CM7, 512KByte 'itcm' : MemoryRange(0x00000000, 0x80000, 'state_mem0.dat'), # ITCM_CM4, 128KByte 'itcm_cm4' : MemoryRange(0x1FFE0000, 0x20000, 'state_mem0.dat'), # DTCM, 512KByte 'dtcm' : MemoryRange(0x20000000, 0x80000, 'state_mem1.dat'), # OCRAM, 1MByte 'ocram' : MemoryRange(0x20200000, 0x100000, 'state_mem2.dat'), # FLASH, 64KByte / 512MByte 'flash': MemoryRange(0x00000000, 0x20000000, 'state_flash_mem.dat', True, 0x10000) } reservedRegionDict = { # new # OCRAM, 2MB 'ram' : [0x20203800, 0x20207F58] }
isSipFlexspiNorDevice = False isNonXipImageAppliableForXipableDeviceUnderClosedHab = None isEccTypeSetInFuseMiscConf = None isSwEccSetAsDefaultInNandOpt = None quadspiNorDevice = None quadspiNorMemBase = 0x08000000 registerAddrDict = None registerDefnDict = None efusemapIndexDict = None efusemapDefnDict = None efuseDescDiffDict = None # memory map memoryRange = { # SRAM, 3MByte 'sram': MemoryRange(0x00000000, 0x480000, 'state_mem0.dat'), # FLASH, 64KByte / 512MByte 'flash': MemoryRange(0x00000000, 0x20000000, 'state_flash_mem.dat', True, 0x10000) } reservedRegionDict = { # SRAM, 512KB 'sram': [0x20203800, 0x20207EF8] }
efuseDescDiffDict = None otpmapIndexDict = None otpmapDefnDict = None otpDescDiffDict = None ftfxNorMemBase = None c040hdNorMemBase = 0x00000000 sbLoaderVersion = gendef.kSbLoaderVersion_v2_1 # memory map memoryRange = { # SRAMX, 32KByte 'sramx': MemoryRange(0x04000000, 0x8000, 'state_mem0.dat'), # SRAM0/1/2/3/4, 272KByte 'sram': MemoryRange(0x20000000, 0x44000, 'state_mem1.dat'), # FLASH, 4KByte / 640KByte 'flash': MemoryRange(0x00000000, 0xA0000, 'state_flash_mem.dat', True, 4096, 4, 4, 16) } reservedRegionDict = { # SRAM 'sram': [0x20000000, 0x20000000] }
registerAddrDict = None registerDefnDict = None efusemapIndexDict = None efusemapDefnDict = None efuseDescDiffDict = None otpmapIndexDict = None otpmapDefnDict = None otpDescDiffDict = None ftfxNorMemBase = 0x00000000 c040hdNorMemBase = None # memory map memoryRange = { # SRAM, 1MByte 'sram': MemoryRange(0x1fff0000, 0x100000, 'state_mem0.dat'), # FLASH, 4KByte / 2MByte 'flash': MemoryRange(0x00000000, 0x200000, 'state_flash_mem.dat', True, 4096, 4, 4, 16) } reservedRegionDict = { # SRAM 'sram': [0x1fff0000, 0x1fff1d90] }
registerAddrDict = None registerDefnDict = None efusemapIndexDict = None efusemapDefnDict = None efuseDescDiffDict = None otpmapIndexDict = None otpmapDefnDict = None otpDescDiffDict = None ftfxNorMemBase = None c040hdNorMemBase = 0x00000000 # memory map memoryRange = { # SRAMX, 32KByte 'sramx' : MemoryRange(0x04000000, 0x8000, 'state_mem0.dat'), # SRAM0/1/2, 64KByte 'sram' : MemoryRange(0x20000000, 0x10000, 'state_mem1.dat'), # FLASH, 4KByte / 256KByte 'flash': MemoryRange(0x00000000, 0x40000, 'state_flash_mem.dat', True, 4096, 4, 4, 16) } reservedRegionDict = { # SRAM 'sram' : [0x20000000, 0x20000000] }