def test_register_set_first_byte(self) -> None:
r = MIIRegister(3, 4)
r.set_byte(0, 100)
assert len(r.as_bytes()) == 2
assert r.as_bytes()[0] == 100
assert r.as_bytes()[1] == 0
assert r.get_byte(0) == r.as_bytes()[0]
assert r.get_byte(1) == r.as_bytes()[1]
assert r.as_number() == 100
assert r.as_number(signed=True) == 100
def test_register_set_second_byte(self) -> None:
r = MIIRegister(3, 4)
r.set_byte(1, 0xCC)
assert len(r.as_bytes()) == 2
assert r.as_bytes()[0] == 0
assert r.as_bytes()[1] == 0xCC
assert r.get_byte(0) == r.as_bytes()[0]
assert r.get_byte(1) == r.as_bytes()[1]
assert r.as_number() == 0xCC00
assert r.as_number(signed=True) == -13312
def test_register_set_both_bytes(self) -> None:
r = MIIRegister(3, 4)
r.set_byte(0, 0xCC)
r.set_byte(1, 0xDD)
assert len(r.as_bytes()) == 2
assert r.as_bytes()[0] == 0xCC
assert r.as_bytes()[1] == 0xDD
assert r.get_byte(0) == r.as_bytes()[0]
assert r.get_byte(1) == r.as_bytes()[1]
assert r.as_number() == 0xDDCC
def test_short_field(self) -> None:
r = MIIRegister(1, 2)
f = ShortField(r, 0, 0, "test")
assert f.get_name() == "test"
assert f.get_value() == 0
assert f.is_default()
assert r.as_number() == 0
f.set_value(0xCCDD)
assert f.get_value() == 0xCCDD
assert not f.is_default()
assert r.as_number() == 0xCCDD
f.set_default()
assert f.get_value() == 0
assert f.is_default()
assert r.as_number() == 0
def test_bit_field(self) -> None:
r = MIIRegister(1, 2)
f = BitField(r, 0, False, "test")
assert f.get_name() == "test"
assert f.get_value() == False # noqa: E712
assert f.is_default()
assert r.as_number() == 0
f.set_value(True)
assert f.get_value() == True # noqa: E712
assert not f.is_default()
assert r.as_number() == 1
f.set_default()
assert f.get_value() == False # noqa: E712
assert f.is_default()
assert r.as_number() == 0
f2 = BitField(r, 10, True, "test2")
assert f2.get_name() == "test2"
assert f2.get_value() == True # noqa: E712
assert f2.is_default()
assert r.as_number() == 0b0000_0100_0000_0000
f2.set_value(False)
assert f2.get_value() == False # noqa: E712
assert not f2.is_default()
assert r.as_number() == 0
f2.set_default()
assert f2.get_value() == True # noqa: E712
assert f2.is_default()
assert r.as_number() == 0b0000_0100_0000_0000
f.set_value(True)
assert r.as_number() == 0b0000_0100_0000_0001
def test_byte_field(self) -> None:
r = MIIRegister(1, 2)
f = ByteField(r, 0, 0, "test")
assert f.get_name() == "test"
assert f.get_value() == 0
assert f.is_default()
assert r.as_number() == 0
f.set_value(0xCC)
assert f.get_value() == 0xCC
assert not f.is_default()
assert r.as_number() == 0xCC
f.set_default()
assert f.get_value() == 0
assert f.is_default()
assert r.as_number() == 0
f2 = ByteField(r, 1, 0xDD, "test2")
assert f2.get_name() == "test2"
assert f2.get_value() == 0xDD
assert f2.is_default()
assert r.as_number() == 0xDD00
f2.set_value(0xEE)
assert f2.get_value() == 0xEE
assert not f2.is_default()
assert r.as_number() == 0xEE00
f2.set_default()
assert f2.get_value() == 0xDD
assert f2.is_default()
assert r.as_number() == 0xDD00
f.set_value(0xCC)
assert r.as_number() == 0xDDCC
def test_port_list_field(self) -> None:
switch = ChipStub()
assert len(switch.ports()) == 3
r = MIIRegister(1, 2)
f = switch._create_port_list_field(r, 0, False, "test")
assert f.get_name() == "test"
assert len(f.get_ports()) == 0
for port in switch.ports():
assert not f.is_port_set(port)
f.add_port(switch.ports()[1])
assert not f.is_port_set(switch.ports()[0])
assert f.is_port_set(switch.ports()[1])
assert not f.is_port_set(switch.ports()[2])
f.set_port(switch.ports()[1], True)
assert not f.is_port_set(switch.ports()[0])
assert f.is_port_set(switch.ports()[1])
assert not f.is_port_set(switch.ports()[2])
f.set_port(switch.ports()[1], False)
assert not f.is_port_set(switch.ports()[0])
assert not f.is_port_set(switch.ports()[1])
assert not f.is_port_set(switch.ports()[2])
f.add_port(switch.ports()[1])
f.remove_port(switch.ports()[1])
assert not f.is_port_set(switch.ports()[0])
assert not f.is_port_set(switch.ports()[1])
assert not f.is_port_set(switch.ports()[2])
f.add_port(switch.ports()[1])
f.set_default()
assert not f.is_port_set(switch.ports()[0])
assert not f.is_port_set(switch.ports()[1])
assert not f.is_port_set(switch.ports()[2])
f2 = switch._create_port_list_field(r, 0, True, "test2")
assert f2.get_name() == "test2"
assert len(f2.get_ports()) == 3
for port in switch.ports():
assert f2.is_port_set(port)
def test_register_set_two_bits(self) -> None:
r = MIIRegister(3, 4)
r.set_bit(2, True)
r.set_bit(10, True)
assert r.as_bytes()[0] == 0b0000_0100
assert r.as_bytes()[1] == 0b0000_0100
assert r.get_byte(0) == r.as_bytes()[0]
assert r.get_byte(1) == r.as_bytes()[1]
assert r.get_bit(0) == 0
assert r.get_bit(1) == 0
assert r.get_bit(2) == 1
assert r.get_bit(3) == 0
assert r.get_bit(9) == 0
assert r.get_bit(10) == 1
assert r.get_bit(11) == 0
assert r.get_bit(15) == 0
assert r.as_number() == 0b0000_0100_0000_0100
assert r.as_number(signed=True) == 0b0000_0100_0000_0100
def test_register_set_bit_in_first_byte(self) -> None:
r = MIIRegister(3, 4)
r.set_bit(0, True)
assert r.address.phy == 3
assert r.address.mii == 4
assert len(r.as_bytes()) == 2
assert r.as_bytes()[0] == 1
assert r.as_bytes()[1] == 0
assert r.get_byte(0) == 1
assert r.get_byte(1) == 0
assert r.get_bit(0) == 1
assert r.get_bit(1) == 0
assert r.get_bit(8) == 0
assert r.get_bit(15) == 0
assert r.as_number() == 1
assert r.as_number(signed=True) == 1
assert r.is_default()
def test_register_zero(self) -> None:
r = MIIRegister(1, 2)
assert r.address.phy == 1
assert r.address.mii == 2
assert len(r.as_bytes()) == 2
assert r.as_bytes()[0] == 0
assert r.as_bytes()[1] == 0
assert r.get_byte(0) == 0
assert r.get_byte(1) == 0
assert r.get_bit(0) == 0
assert r.get_bit(1) == 0
assert r.get_bit(8) == 0
assert r.get_bit(15) == 0
try:
r.get_bit(16)
assert False
except ValueError:
pass
assert r.as_number() == 0
assert r.as_number(signed=True) == 0
assert r.is_default()
for i in range(16):
r.check_bit_index(i)
try:
r.check_bit_index(16)
assert False
except ValueError:
pass
r.check_byte_index(0)
r.check_byte_index(1)
try:
r.check_byte_index(2)
assert False
except ValueError:
pass
def test_register_set_all_bits(self) -> None:
r = MIIRegister(3, 4)
r.set_bits(0, 16, 0b1010_0101_1100_1111)
assert r.as_bytes()[0] == 0b1100_1111
assert r.as_bytes()[1] == 0b1010_0101
assert r.get_byte(0) == r.as_bytes()[0]
assert r.get_byte(1) == r.as_bytes()[1]
assert r.get_bit(0) == 1
assert r.get_bit(1) == 1
assert r.get_bit(2) == 1
assert r.get_bit(3) == 1
assert r.get_bit(4) == 0
assert r.get_bit(5) == 0
assert r.get_bit(6) == 1
assert r.get_bit(7) == 1
assert r.get_bit(8) == 1
assert r.get_bit(9) == 0
assert r.get_bit(10) == 1
assert r.get_bit(11) == 0
assert r.get_bit(12) == 0
assert r.get_bit(13) == 1
assert r.get_bit(14) == 0
assert r.get_bit(15) == 1
assert r.as_number() == 0b1010_0101_1100_1111
def test_register_set_bits(self) -> None:
r = MIIRegister(3, 4)
r.set_bits(6, 4, 0b1010)
assert r.as_bytes()[0] == 0b1000_0000
assert r.as_bytes()[1] == 0b0000_0010
assert r.get_byte(0) == r.as_bytes()[0]
assert r.get_byte(1) == r.as_bytes()[1]
assert r.get_bit(0) == 0
assert r.get_bit(6) == 0
assert r.get_bit(7) == 1
assert r.get_bit(8) == 0
assert r.get_bit(9) == 1
assert r.get_bit(15) == 0
assert r.as_number() == 0b0000_0010_1000_0000
def test_register_set_bit_as_signed(self) -> None:
r = MIIRegister(3, 4)
r.set_bit(15, True)
assert r.as_number() == pow(2, 15)
assert r.as_number(signed=True) == -pow(2, 15)
def test_register_reset_bit(self) -> None:
r = MIIRegister(3, 4)
r.set_bit(2, True)
r.set_bit(2, False)
assert r.as_bytes()[0] == 0
assert r.as_bytes()[1] == 0
assert r.get_byte(0) == r.as_bytes()[0]
assert r.get_byte(1) == r.as_bytes()[1]
assert r.get_bit(0) == 0
assert r.get_bit(1) == 0
assert r.get_bit(2) == 0
assert r.get_bit(3) == 0
assert r.get_bit(15) == 0
assert r.as_number() == 0
assert r.as_number(signed=True) == 0
def test_bits_field(self) -> None:
r = MIIRegister(1, 2)
f = BitsField(r, 6, 4, 0b0000, "test")
assert f.get_name() == "test"
assert f.get_value() == 0b0000
assert f.is_default()
assert r.as_number() == 0
f.set_value(0b1010)
assert f.get_value() == 0b1010
assert not f.is_default()
assert r.as_number() == 0b0000_0010_1000_0000
f.set_default()
assert f.get_value() == 0b0000
assert f.is_default()
assert r.as_number() == 0
f2 = BitsField(r, 2, 3, 0b111, "test2")
assert f2.get_name() == "test2"
assert f2.get_value() == 0b111
assert f2.is_default()
assert r.as_number() == 0b0000_0000_0001_1100
f2.set_value(0b010)
assert f2.get_value() == 0b010
assert not f2.is_default()
assert r.as_number() == 0b0000_0000_0000_1000
f2.set_default()
assert f2.get_value() == 0b111
assert f2.is_default()
assert r.as_number() == 0b0000_0000_0001_1100
f.set_value(0b1111)
assert r.as_number() == 0b0000_0011_1101_1100
f.set_bit(0, False)
assert f.get_value() == 0b1110
assert r.as_number() == 0b0000_0011_1001_1100
f.set_bit(3, False)
assert f.get_value() == 0b0110
assert r.as_number() == 0b0000_0001_1001_1100