def test_display_addr_refs_no_offset():
"""should display n/a for offset when there are no offset bits"""
refs = sim.get_addr_refs(
word_addrs=WORD_ADDRS, num_addr_bits=8,
num_tag_bits=4, num_index_bits=4, num_offset_bits=0)
ref_statuses = ['miss'] * 12
out = io.StringIO()
with contextlib.redirect_stdout(out):
sim.display_addr_refs(refs, ref_statuses, table_width=TABLE_WIDTH)
table_output = out.getvalue()
nose.assert_regexp_matches(
table_output, r'\s*{}\s*{}\s*{}'.format(
'\d\d', 'n/a', 'miss'))
def test_display_addr_refs():
"""should display table of address references"""
refs = sim.get_addr_refs(
word_addrs=WORD_ADDRS, num_addr_bits=8,
num_tag_bits=5, num_index_bits=2, num_offset_bits=1)
ref_statuses = ['miss', 'miss', 'HIT', 'miss']
out = io.StringIO()
with contextlib.redirect_stdout(out):
sim.display_addr_refs(refs, ref_statuses, table_width=TABLE_WIDTH)
table_output = out.getvalue()
num_cols = 6
col_width = TABLE_WIDTH // num_cols
nose.assert_regexp_matches(
table_output, r'{}\s*{}\s*{}\s*{}\s*{}\s*{}\n{}'.format(
'WordAddr'.rjust(col_width), 'BinAddr'.rjust(col_width),
'Tag'.rjust(col_width), 'Index'.rjust(col_width),
'Offset'.rjust(col_width), 'Hit/Miss'.rjust(col_width),
('-' * TABLE_WIDTH)))
nose.assert_regexp_matches(
table_output, r'{}\s*{}\s*{}\s*{}\s*{}\s*{}'.format(
'253'.rjust(col_width), '1111 1101'.rjust(col_width),
'11111'.rjust(col_width), '10'.rjust(col_width),
'1'.rjust(col_width), 'HIT'.rjust(col_width)))
